ia64/xen-unstable

annotate xen/arch/ia64/vmx/vmx_init.c @ 7333:760f5e85c706

Some outstanding bug fixes found in VT merge

- Consistence of region id mangling algrithm:
- Metaphysical RID is not mangled, which may conflict with other
domain's virtual RID
- Sometimes rr0 is mangled, but sometimes not
- Sometimes only rid value is saved to saved_rr0_metaphysical, but
sometimes the whole value.

- Nat bit comsumption happens but handled as priv_emulate to forward progress.
But this is definitely wrong. We found reason of nat consumption from fast_rfi,
which doesn't save unat again after spill guest states, and then use guest
unat to fill guest states when return.

- In some corner case, timer interrupt handler won't update itm and then return
directly. When that happens, machine timer interrupt disappears until guest
timer interrupt sets v_itm actively. But vti domain depends on ac_timer while
the latter will stop when above condition happens. Then if current context is
vti domain, context switch disappears and machine halt.

Also many compatibility issues to support non-vti and vti domain are solved,eg:
- Changing lazy PAL mapping switch to eager switch per domain switch, since
vti domain always depends on pal call.
- evtchn_notify should also vcpu_wake target domain, since vti domain may block for io emulation. Xenolinux is free of this issue, since it's always runnable.

Signed-off-by Kevin Tian <kevin.tian@intel.com>
Signed-off-by Anthony Xu <anthony.xu@intel.com>
author djm@kirby.fc.hp.com
date Thu Oct 13 14:24:45 2005 -0600 (2005-10-13)
parents 06d84bf87159
children b2ea26d2099a
rev   line source
djm@6458 1 /* -*- Mode:C; c-basic-offset:4; tab-width:4; indent-tabs-mode:nil -*- */
djm@6458 2 /*
djm@6458 3 * vmx_init.c: initialization work for vt specific domain
djm@6458 4 * Copyright (c) 2005, Intel Corporation.
djm@6458 5 * Kun Tian (Kevin Tian) <kevin.tian@intel.com>
djm@6458 6 * Xuefei Xu (Anthony Xu) <anthony.xu@intel.com>
djm@6458 7 * Fred Yang <fred.yang@intel.com>
djm@6458 8 *
djm@6458 9 * This program is free software; you can redistribute it and/or modify it
djm@6458 10 * under the terms and conditions of the GNU General Public License,
djm@6458 11 * version 2, as published by the Free Software Foundation.
djm@6458 12 *
djm@6458 13 * This program is distributed in the hope it will be useful, but WITHOUT
djm@6458 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
djm@6458 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
djm@6458 16 * more details.
djm@6458 17 *
djm@6458 18 * You should have received a copy of the GNU General Public License along with
djm@6458 19 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
djm@6458 20 * Place - Suite 330, Boston, MA 02111-1307 USA.
djm@6458 21 *
djm@6458 22 */
djm@6458 23
djm@6458 24 /*
djm@6458 25 * 05/08/16 Kun tian (Kevin Tian) <kevin.tian@intel.com>:
djm@6458 26 * Disable doubling mapping
djm@6458 27 *
djm@6458 28 * 05/03/23 Kun Tian (Kevin Tian) <kevin.tian@intel.com>:
djm@6458 29 * Simplied design in first step:
djm@6458 30 * - One virtual environment
djm@6458 31 * - Domain is bound to one LP
djm@6458 32 * Later to support guest SMP:
djm@6458 33 * - Need interface to handle VP scheduled to different LP
djm@6458 34 */
djm@6458 35 #include <xen/config.h>
djm@6458 36 #include <xen/types.h>
djm@6458 37 #include <xen/sched.h>
djm@6458 38 #include <asm/pal.h>
djm@6458 39 #include <asm/page.h>
djm@6458 40 #include <asm/processor.h>
djm@6458 41 #include <asm/vmx_vcpu.h>
djm@6458 42 #include <xen/lib.h>
djm@6458 43 #include <asm/vmmu.h>
djm@6458 44 #include <public/arch-ia64.h>
djm@6458 45 #include <public/io/ioreq.h>
djm@6458 46 #include <asm/vmx_phy_mode.h>
djm@6458 47 #include <asm/processor.h>
djm@6458 48 #include <asm/vmx.h>
djm@6458 49 #include <xen/mm.h>
djm@7333 50 #include <public/arch-ia64.h>
djm@6458 51
djm@6458 52 /* Global flag to identify whether Intel vmx feature is on */
djm@6458 53 u32 vmx_enabled = 0;
djm@6458 54 static u32 vm_order;
djm@6458 55 static u64 buffer_size;
djm@6458 56 static u64 vp_env_info;
djm@6458 57 static u64 vm_buffer = 0; /* Buffer required to bring up VMX feature */
djm@6458 58 u64 __vsa_base = 0; /* Run-time service base of VMX */
djm@6458 59
djm@6458 60 /* Check whether vt feature is enabled or not. */
djm@6458 61 void
djm@6458 62 identify_vmx_feature(void)
djm@6458 63 {
djm@6458 64 pal_status_t ret;
djm@6458 65 u64 avail = 1, status = 1, control = 1;
djm@6458 66
djm@6458 67 vmx_enabled = 0;
djm@6458 68 /* Check VT-i feature */
djm@6458 69 ret = ia64_pal_proc_get_features(&avail, &status, &control);
djm@6458 70 if (ret != PAL_STATUS_SUCCESS) {
djm@6458 71 printk("Get proc features failed.\n");
djm@6458 72 goto no_vti;
djm@6458 73 }
djm@6458 74
djm@6458 75 /* FIXME: do we need to check status field, to see whether
djm@6458 76 * PSR.vm is actually enabled? If yes, aonther call to
djm@6458 77 * ia64_pal_proc_set_features may be reuqired then.
djm@6458 78 */
djm@6458 79 printk("avail:0x%lx, status:0x%lx,control:0x%lx, vm?0x%lx\n",
djm@6458 80 avail, status, control, avail & PAL_PROC_VM_BIT);
djm@6458 81 if (!(avail & PAL_PROC_VM_BIT)) {
djm@6458 82 printk("No VT feature supported.\n");
djm@6458 83 goto no_vti;
djm@6458 84 }
djm@6458 85
djm@6458 86 ret = ia64_pal_vp_env_info(&buffer_size, &vp_env_info);
djm@6458 87 if (ret != PAL_STATUS_SUCCESS) {
djm@6458 88 printk("Get vp environment info failed.\n");
djm@6458 89 goto no_vti;
djm@6458 90 }
djm@6458 91
djm@6458 92 /* Does xen has ability to decode itself? */
djm@6458 93 if (!(vp_env_info & VP_OPCODE))
djm@6458 94 printk("WARNING: no opcode provided from hardware(%lx)!!!\n", vp_env_info);
djm@6458 95 vm_order = get_order(buffer_size);
djm@6458 96 printk("vm buffer size: %d, order: %d\n", buffer_size, vm_order);
djm@6458 97
djm@6458 98 vmx_enabled = 1;
djm@6458 99 no_vti:
djm@6458 100 return;
djm@6458 101 }
djm@6458 102
djm@6458 103 /*
djm@6458 104 * Init virtual environment on current LP
djm@6458 105 * vsa_base is the indicator whether it's first LP to be initialized
djm@6458 106 * for current domain.
djm@6458 107 */
djm@6458 108 void
djm@6458 109 vmx_init_env(void)
djm@6458 110 {
djm@6458 111 u64 status, tmp_base;
djm@6458 112
djm@6458 113 if (!vm_buffer) {
djm@6458 114 vm_buffer = alloc_xenheap_pages(vm_order);
djm@6458 115 ASSERT(vm_buffer);
djm@6458 116 printk("vm_buffer: 0x%lx\n", vm_buffer);
djm@6458 117 }
djm@6458 118
djm@6458 119 status=ia64_pal_vp_init_env(__vsa_base ? VP_INIT_ENV : VP_INIT_ENV_INITALIZE,
djm@6458 120 __pa(vm_buffer),
djm@6458 121 vm_buffer,
djm@6458 122 &tmp_base);
djm@6458 123
djm@6458 124 if (status != PAL_STATUS_SUCCESS) {
djm@6458 125 printk("ia64_pal_vp_init_env failed.\n");
djm@6458 126 return -1;
djm@6458 127 }
djm@6458 128
djm@6458 129 if (!__vsa_base)
djm@6458 130 __vsa_base = tmp_base;
djm@6458 131 else
djm@6458 132 ASSERT(tmp_base != __vsa_base);
djm@6458 133
djm@6458 134 #ifdef XEN_DBL_MAPPING
djm@6458 135 /* Init stub for rr7 switch */
djm@6458 136 vmx_init_double_mapping_stub();
djm@6458 137 #endif
djm@6458 138 }
djm@6458 139
djm@6458 140 typedef union {
djm@6458 141 u64 value;
djm@6458 142 struct {
djm@6458 143 u64 number : 8;
djm@6458 144 u64 revision : 8;
djm@6458 145 u64 model : 8;
djm@6458 146 u64 family : 8;
djm@6458 147 u64 archrev : 8;
djm@6458 148 u64 rv : 24;
djm@6458 149 };
djm@6458 150 } cpuid3_t;
djm@6458 151
djm@6458 152 /* Allocate vpd from xenheap */
djm@6458 153 static vpd_t *alloc_vpd(void)
djm@6458 154 {
djm@6458 155 int i;
djm@6458 156 cpuid3_t cpuid3;
djm@6458 157 vpd_t *vpd;
djm@6458 158
djm@6458 159 vpd = alloc_xenheap_pages(get_order(VPD_SIZE));
djm@6458 160 if (!vpd) {
djm@6458 161 printk("VPD allocation failed.\n");
djm@6458 162 return NULL;
djm@6458 163 }
djm@6458 164
djm@6458 165 printk("vpd base: 0x%lx, vpd size:%d\n", vpd, sizeof(vpd_t));
djm@6458 166 memset(vpd, 0, VPD_SIZE);
djm@6458 167 /* CPUID init */
djm@6458 168 for (i = 0; i < 5; i++)
djm@6458 169 vpd->vcpuid[i] = ia64_get_cpuid(i);
djm@6458 170
djm@6458 171 /* Limit the CPUID number to 5 */
djm@6458 172 cpuid3.value = vpd->vcpuid[3];
djm@6458 173 cpuid3.number = 4; /* 5 - 1 */
djm@6458 174 vpd->vcpuid[3] = cpuid3.value;
djm@6458 175
djm@6458 176 vpd->vdc.d_vmsw = 1;
djm@6458 177 return vpd;
djm@6458 178 }
djm@6458 179
djm@6458 180
djm@6458 181 /*
djm@6458 182 * Create a VP on intialized VMX environment.
djm@6458 183 */
djm@6458 184 static void
djm@6458 185 vmx_create_vp(struct vcpu *v)
djm@6458 186 {
djm@6458 187 u64 ret;
djm@6801 188 vpd_t *vpd = v->arch.privregs;
djm@6458 189 u64 ivt_base;
djm@6458 190 extern char vmx_ia64_ivt;
djm@6458 191 /* ia64_ivt is function pointer, so need this tranlation */
djm@6458 192 ivt_base = (u64) &vmx_ia64_ivt;
djm@6458 193 printk("ivt_base: 0x%lx\n", ivt_base);
djm@6458 194 ret = ia64_pal_vp_create(vpd, ivt_base, 0);
djm@6458 195 if (ret != PAL_STATUS_SUCCESS)
djm@6458 196 panic("ia64_pal_vp_create failed. \n");
djm@6458 197 }
djm@6458 198
djm@6458 199 #ifdef XEN_DBL_MAPPING
djm@6458 200 void vmx_init_double_mapping_stub(void)
djm@6458 201 {
djm@6458 202 u64 base, psr;
djm@6458 203 extern void vmx_switch_rr7(void);
djm@6458 204
djm@6458 205 base = (u64) &vmx_switch_rr7;
djm@6458 206 base = *((u64*)base);
djm@6458 207
djm@6458 208 psr = ia64_clear_ic();
djm@6458 209 ia64_itr(0x1, IA64_TR_RR7_SWITCH_STUB, XEN_RR7_SWITCH_STUB,
djm@6458 210 pte_val(pfn_pte(__pa(base) >> PAGE_SHIFT, PAGE_KERNEL)),
djm@6458 211 RR7_SWITCH_SHIFT);
djm@6458 212 ia64_set_psr(psr);
djm@6458 213 ia64_srlz_i();
djm@6458 214 printk("Add TR mapping for rr7 switch stub, with physical: 0x%lx\n", (u64)(__pa(base)));
djm@6458 215 }
djm@6458 216 #endif
djm@6458 217
djm@6458 218 /* Other non-context related tasks can be done in context switch */
djm@6458 219 void
djm@6458 220 vmx_save_state(struct vcpu *v)
djm@6458 221 {
djm@6458 222 u64 status, psr;
djm@6458 223 u64 old_rr0, dom_rr7, rr0_xen_start, rr0_vhpt;
djm@6458 224
djm@6458 225 /* FIXME: about setting of pal_proc_vector... time consuming */
djm@6801 226 status = ia64_pal_vp_save(v->arch.privregs, 0);
djm@6458 227 if (status != PAL_STATUS_SUCCESS)
djm@6458 228 panic("Save vp status failed\n");
djm@6458 229
djm@6458 230 #ifdef XEN_DBL_MAPPING
djm@6458 231 /* FIXME: Do we really need purge double mapping for old vcpu?
djm@6458 232 * Since rid is completely different between prev and next,
djm@6458 233 * it's not overlap and thus no MCA possible... */
djm@6458 234 dom_rr7 = vmx_vrrtomrr(v, VMX(v, vrr[7]));
djm@6458 235 vmx_purge_double_mapping(dom_rr7, KERNEL_START,
djm@6458 236 (u64)v->arch.vtlb->ts->vhpt->hash);
djm@6458 237 #endif
djm@6458 238
djm@6458 239 /* Need to save KR when domain switch, though HV itself doesn;t
djm@6458 240 * use them.
djm@6458 241 */
djm@6458 242 v->arch.arch_vmx.vkr[0] = ia64_get_kr(0);
djm@6458 243 v->arch.arch_vmx.vkr[1] = ia64_get_kr(1);
djm@6458 244 v->arch.arch_vmx.vkr[2] = ia64_get_kr(2);
djm@6458 245 v->arch.arch_vmx.vkr[3] = ia64_get_kr(3);
djm@6458 246 v->arch.arch_vmx.vkr[4] = ia64_get_kr(4);
djm@6458 247 v->arch.arch_vmx.vkr[5] = ia64_get_kr(5);
djm@6458 248 v->arch.arch_vmx.vkr[6] = ia64_get_kr(6);
djm@6458 249 v->arch.arch_vmx.vkr[7] = ia64_get_kr(7);
djm@6458 250 }
djm@6458 251
djm@6458 252 /* Even guest is in physical mode, we still need such double mapping */
djm@6458 253 void
djm@6458 254 vmx_load_state(struct vcpu *v)
djm@6458 255 {
djm@6458 256 u64 status, psr;
djm@6458 257 u64 old_rr0, dom_rr7, rr0_xen_start, rr0_vhpt;
djm@6458 258 u64 pte_xen, pte_vhpt;
djm@6458 259 int i;
djm@6458 260
djm@6801 261 status = ia64_pal_vp_restore(v->arch.privregs, 0);
djm@6458 262 if (status != PAL_STATUS_SUCCESS)
djm@6458 263 panic("Restore vp status failed\n");
djm@6458 264
djm@6458 265 #ifdef XEN_DBL_MAPPING
djm@6458 266 dom_rr7 = vmx_vrrtomrr(v, VMX(v, vrr[7]));
djm@6458 267 pte_xen = pte_val(pfn_pte((xen_pstart >> PAGE_SHIFT), PAGE_KERNEL));
djm@6458 268 pte_vhpt = pte_val(pfn_pte((__pa(v->arch.vtlb->ts->vhpt->hash) >> PAGE_SHIFT), PAGE_KERNEL));
djm@6458 269 vmx_insert_double_mapping(dom_rr7, KERNEL_START,
djm@6458 270 (u64)v->arch.vtlb->ts->vhpt->hash,
djm@6458 271 pte_xen, pte_vhpt);
djm@6458 272 #endif
djm@6458 273
djm@6458 274 ia64_set_kr(0, v->arch.arch_vmx.vkr[0]);
djm@6458 275 ia64_set_kr(1, v->arch.arch_vmx.vkr[1]);
djm@6458 276 ia64_set_kr(2, v->arch.arch_vmx.vkr[2]);
djm@6458 277 ia64_set_kr(3, v->arch.arch_vmx.vkr[3]);
djm@6458 278 ia64_set_kr(4, v->arch.arch_vmx.vkr[4]);
djm@6458 279 ia64_set_kr(5, v->arch.arch_vmx.vkr[5]);
djm@6458 280 ia64_set_kr(6, v->arch.arch_vmx.vkr[6]);
djm@6458 281 ia64_set_kr(7, v->arch.arch_vmx.vkr[7]);
djm@6458 282 /* Guest vTLB is not required to be switched explicitly, since
djm@6458 283 * anchored in vcpu */
djm@6458 284 }
djm@6458 285
djm@6458 286 #ifdef XEN_DBL_MAPPING
djm@6458 287 /* Purge old double mapping and insert new one, due to rr7 change */
djm@6458 288 void
djm@6458 289 vmx_change_double_mapping(struct vcpu *v, u64 oldrr7, u64 newrr7)
djm@6458 290 {
djm@6458 291 u64 pte_xen, pte_vhpt, vhpt_base;
djm@6458 292
djm@6458 293 vhpt_base = (u64)v->arch.vtlb->ts->vhpt->hash;
djm@6458 294 vmx_purge_double_mapping(oldrr7, KERNEL_START,
djm@6458 295 vhpt_base);
djm@6458 296
djm@6458 297 pte_xen = pte_val(pfn_pte((xen_pstart >> PAGE_SHIFT), PAGE_KERNEL));
djm@6458 298 pte_vhpt = pte_val(pfn_pte((__pa(vhpt_base) >> PAGE_SHIFT), PAGE_KERNEL));
djm@6458 299 vmx_insert_double_mapping(newrr7, KERNEL_START,
djm@6458 300 vhpt_base,
djm@6458 301 pte_xen, pte_vhpt);
djm@6458 302 }
djm@6458 303 #endif // XEN_DBL_MAPPING
djm@6458 304
djm@6458 305 /*
djm@6458 306 * Initialize VMX envirenment for guest. Only the 1st vp/vcpu
djm@6458 307 * is registered here.
djm@6458 308 */
djm@6458 309 void
djm@6458 310 vmx_final_setup_domain(struct domain *d)
djm@6458 311 {
djm@6458 312 struct vcpu *v = d->vcpu[0];
djm@6458 313 vpd_t *vpd;
djm@6458 314
djm@6458 315 /* Allocate resources for vcpu 0 */
djm@6458 316 //memset(&v->arch.arch_vmx, 0, sizeof(struct arch_vmx_struct));
djm@6458 317
djm@6458 318 vpd = alloc_vpd();
djm@6458 319 ASSERT(vpd);
djm@6458 320
djm@6801 321 // v->arch.arch_vmx.vpd = vpd;
djm@6801 322 v->arch.privregs = vpd;
djm@6458 323 vpd->virt_env_vaddr = vm_buffer;
djm@6458 324
djm@6878 325 /* Per-domain vTLB and vhpt implementation. Now vmx domain will stick
djm@6878 326 * to this solution. Maybe it can be deferred until we know created
djm@6878 327 * one as vmx domain */
djm@6878 328 v->arch.vtlb = init_domain_tlb(v);
djm@6878 329
djm@6458 330 /* v->arch.schedule_tail = arch_vmx_do_launch; */
djm@6458 331 vmx_create_vp(v);
djm@6458 332
djm@6458 333 /* Set this ed to be vmx */
djm@6458 334 set_bit(ARCH_VMX_VMCS_LOADED, &v->arch.arch_vmx.flags);
djm@6458 335
djm@6458 336 /* Physical mode emulation initialization, including
djm@6458 337 * emulation ID allcation and related memory request
djm@6458 338 */
djm@6458 339 physical_mode_init(v);
djm@6458 340
djm@6458 341 vlsapic_reset(v);
djm@6458 342 vtm_init(v);
djm@6458 343
djm@6458 344 /* Other vmx specific initialization work */
djm@6458 345 }
djm@6799 346
djm@6799 347 typedef struct io_range {
djm@6799 348 unsigned long start;
djm@6799 349 unsigned long size;
djm@6799 350 unsigned long type;
djm@6799 351 } io_range_t;
djm@6799 352
djm@6799 353 io_range_t io_ranges[] = {
djm@6799 354 {VGA_IO_START, VGA_IO_SIZE, GPFN_FRAME_BUFFER},
djm@6799 355 {MMIO_START, MMIO_SIZE, GPFN_LOW_MMIO},
djm@6799 356 {LEGACY_IO_START, LEGACY_IO_SIZE, GPFN_LEGACY_IO},
djm@6799 357 {IO_SAPIC_START, IO_SAPIC_SIZE, GPFN_IOSAPIC},
djm@6799 358 {PIB_START, PIB_SIZE, GPFN_PIB},
djm@6799 359 };
djm@6799 360
djm@7333 361 #define VMX_SYS_PAGES (2 + (GFW_SIZE >> PAGE_SHIFT))
djm@6799 362 #define VMX_CONFIG_PAGES(d) ((d)->max_pages - VMX_SYS_PAGES)
djm@6799 363
djm@6799 364 int vmx_alloc_contig_pages(struct domain *d)
djm@6799 365 {
djm@7333 366 unsigned int order;
djm@7333 367 unsigned long i, j, start, end, pgnr, conf_nr;
djm@6799 368 struct pfn_info *page;
djm@6799 369 struct vcpu *v = d->vcpu[0];
djm@6799 370
djm@6799 371 ASSERT(!test_bit(ARCH_VMX_CONTIG_MEM, &v->arch.arch_vmx.flags));
djm@6799 372
djm@7333 373 /* Mark I/O ranges */
djm@7333 374 for (i = 0; i < (sizeof(io_ranges) / sizeof(io_range_t)); i++) {
djm@7333 375 for (j = io_ranges[i].start;
djm@7333 376 j < io_ranges[i].start + io_ranges[i].size;
djm@7333 377 j += PAGE_SIZE)
djm@7333 378 map_domain_page(d, j, io_ranges[i].type);
djm@7333 379 }
djm@7333 380
djm@6799 381 conf_nr = VMX_CONFIG_PAGES(d);
djm@6799 382 order = get_order_from_pages(conf_nr);
djm@6799 383 if (unlikely((page = alloc_domheap_pages(d, order, 0)) == NULL)) {
djm@6799 384 printk("Could not allocate order=%d pages for vmx contig alloc\n",
djm@6799 385 order);
djm@6799 386 return -1;
djm@6799 387 }
djm@6799 388
djm@6799 389 /* Map normal memory below 3G */
djm@6799 390 pgnr = page_to_pfn(page);
djm@6799 391 end = conf_nr << PAGE_SHIFT;
djm@6799 392 for (i = 0;
djm@6799 393 i < (end < MMIO_START ? end : MMIO_START);
djm@6799 394 i += PAGE_SIZE, pgnr++)
djm@6799 395 map_domain_page(d, i, pgnr << PAGE_SHIFT);
djm@6799 396
djm@6799 397 /* Map normal memory beyond 4G */
djm@6799 398 if (unlikely(end > MMIO_START)) {
djm@6799 399 start = 4 * MEM_G;
djm@6799 400 end = start + (end - 3 * MEM_G);
djm@6799 401 for (i = start; i < end; i += PAGE_SIZE, pgnr++)
djm@6799 402 map_domain_page(d, i, pgnr << PAGE_SHIFT);
djm@6799 403 }
djm@6799 404
djm@6799 405 d->arch.max_pfn = end >> PAGE_SHIFT;
djm@6799 406
djm@7333 407 order = get_order_from_pages(GFW_SIZE >> PAGE_SHIFT);
djm@6799 408 if (unlikely((page = alloc_domheap_pages(d, order, 0)) == NULL)) {
djm@6799 409 printk("Could not allocate order=%d pages for vmx contig alloc\n",
djm@6799 410 order);
djm@6799 411 return -1;
djm@6799 412 }
djm@6799 413
djm@7333 414 /* Map guest firmware */
djm@7333 415 pgnr = page_to_pfn(page);
djm@7333 416 for (i = GFW_START; i < GFW_START + GFW_SIZE; i += PAGE_SIZE, pgnr++)
djm@7333 417 map_domain_page(d, i, pgnr << PAGE_SHIFT);
djm@7333 418
djm@7333 419 if (unlikely((page = alloc_domheap_pages(d, 1, 0)) == NULL)) {
djm@7333 420 printk("Could not allocate order=1 pages for vmx contig alloc\n");
djm@7333 421 return -1;
djm@7333 422 }
djm@7333 423
djm@6799 424 /* Map for shared I/O page and xenstore */
djm@6799 425 pgnr = page_to_pfn(page);
djm@6799 426 map_domain_page(d, IO_PAGE_START, pgnr << PAGE_SHIFT);
djm@6799 427 pgnr++;
djm@6799 428 map_domain_page(d, STORE_PAGE_START, pgnr << PAGE_SHIFT);
djm@6799 429
djm@6799 430 set_bit(ARCH_VMX_CONTIG_MEM, &v->arch.arch_vmx.flags);
djm@6799 431 return 0;
djm@6799 432 }
djm@7333 433
djm@7333 434 void vmx_setup_platform(struct vcpu *v, struct vcpu_guest_context *c)
djm@7333 435 {
djm@7333 436 struct domain *d = v->domain;
djm@7333 437 shared_iopage_t *sp;
djm@7333 438
djm@7333 439 ASSERT(d != dom0); /* only for non-privileged vti domain */
djm@7333 440 d->arch.vmx_platform.shared_page_va =
djm@7333 441 __va(__gpa_to_mpa(d, IO_PAGE_START));
djm@7333 442 sp = get_sp(d);
djm@7333 443 //memset((char *)sp,0,PAGE_SIZE);
djm@7333 444 //sp->sp_global.eport = 2;
djm@7333 445 #ifdef V_IOSAPIC_READY
djm@7333 446 sp->vcpu_number = 1;
djm@7333 447 #endif
djm@7333 448 /* TEMP */
djm@7333 449 d->arch.vmx_platform.pib_base = 0xfee00000UL;
djm@7333 450
djm@7333 451 /* One more step to enable interrupt assist */
djm@7333 452 set_bit(ARCH_VMX_INTR_ASSIST, &v->arch.arch_vmx.flags);
djm@7333 453 /* Only open one port for I/O and interrupt emulation */
djm@7333 454 if (v == d->vcpu[0]) {
djm@7333 455 memset(&d->shared_info->evtchn_mask[0], 0xff,
djm@7333 456 sizeof(d->shared_info->evtchn_mask));
djm@7333 457 clear_bit(iopacket_port(d), &d->shared_info->evtchn_mask[0]);
djm@7333 458 }
djm@7333 459
djm@7333 460 /* FIXME: only support PMT table continuously by far */
djm@7333 461 // d->arch.pmt = __va(c->pt_base);
djm@7333 462
djm@7333 463
djm@7333 464 vmx_final_setup_domain(d);
djm@7333 465 }
djm@7333 466
djm@7333 467