ia64/xen-unstable

annotate xen/arch/ia64/vmx/vmx_init.c @ 9982:6e979aa0e6d2

[IA64] panic -> panic domain

This patch uses panic domain instead of panic when the
panic happening is only related to current domain not whole system.

Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
author awilliam@xenbuild.aw
date Tue May 09 15:23:33 2006 -0600 (2006-05-09)
parents 7c7bcf173f8b
children 4fc1110f09c9
rev   line source
djm@6458 1 /* -*- Mode:C; c-basic-offset:4; tab-width:4; indent-tabs-mode:nil -*- */
djm@6458 2 /*
djm@6458 3 * vmx_init.c: initialization work for vt specific domain
djm@6458 4 * Copyright (c) 2005, Intel Corporation.
djm@6458 5 * Kun Tian (Kevin Tian) <kevin.tian@intel.com>
djm@6458 6 * Xuefei Xu (Anthony Xu) <anthony.xu@intel.com>
djm@6458 7 * Fred Yang <fred.yang@intel.com>
djm@6458 8 *
djm@6458 9 * This program is free software; you can redistribute it and/or modify it
djm@6458 10 * under the terms and conditions of the GNU General Public License,
djm@6458 11 * version 2, as published by the Free Software Foundation.
djm@6458 12 *
djm@6458 13 * This program is distributed in the hope it will be useful, but WITHOUT
djm@6458 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
djm@6458 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
djm@6458 16 * more details.
djm@6458 17 *
djm@6458 18 * You should have received a copy of the GNU General Public License along with
djm@6458 19 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
djm@6458 20 * Place - Suite 330, Boston, MA 02111-1307 USA.
djm@6458 21 *
djm@6458 22 */
djm@6458 23
djm@6458 24 /*
djm@6458 25 * 05/08/16 Kun tian (Kevin Tian) <kevin.tian@intel.com>:
djm@6458 26 * Disable doubling mapping
djm@6458 27 *
djm@6458 28 * 05/03/23 Kun Tian (Kevin Tian) <kevin.tian@intel.com>:
djm@6458 29 * Simplied design in first step:
djm@6458 30 * - One virtual environment
djm@6458 31 * - Domain is bound to one LP
djm@6458 32 * Later to support guest SMP:
djm@6458 33 * - Need interface to handle VP scheduled to different LP
djm@6458 34 */
djm@6458 35 #include <xen/config.h>
djm@6458 36 #include <xen/types.h>
djm@6458 37 #include <xen/sched.h>
djm@6458 38 #include <asm/pal.h>
djm@6458 39 #include <asm/page.h>
djm@6458 40 #include <asm/processor.h>
djm@6458 41 #include <asm/vmx_vcpu.h>
djm@6458 42 #include <xen/lib.h>
djm@6458 43 #include <asm/vmmu.h>
djm@6458 44 #include <public/arch-ia64.h>
kaf24@8492 45 #include <public/hvm/ioreq.h>
djm@6458 46 #include <asm/vmx_phy_mode.h>
djm@6458 47 #include <asm/processor.h>
djm@6458 48 #include <asm/vmx.h>
djm@6458 49 #include <xen/mm.h>
djm@7333 50 #include <public/arch-ia64.h>
kaf24@8708 51 #include <asm/hvm/vioapic.h>
kaf24@8971 52 #include <public/event_channel.h>
awilliam@9169 53 #include <xen/event.h>
awilliam@9169 54 #include <asm/vlsapic.h>
djm@6458 55
djm@6458 56 /* Global flag to identify whether Intel vmx feature is on */
djm@6458 57 u32 vmx_enabled = 0;
kaf24@7720 58 unsigned int opt_vmx_debug_level = 0;
djm@6458 59 static u32 vm_order;
djm@6458 60 static u64 buffer_size;
djm@6458 61 static u64 vp_env_info;
djm@6458 62 static u64 vm_buffer = 0; /* Buffer required to bring up VMX feature */
djm@6458 63 u64 __vsa_base = 0; /* Run-time service base of VMX */
djm@6458 64
djm@6458 65 /* Check whether vt feature is enabled or not. */
djm@6458 66 void
djm@6458 67 identify_vmx_feature(void)
djm@6458 68 {
djm@6458 69 pal_status_t ret;
djm@6458 70 u64 avail = 1, status = 1, control = 1;
djm@6458 71
djm@6458 72 vmx_enabled = 0;
djm@6458 73 /* Check VT-i feature */
djm@6458 74 ret = ia64_pal_proc_get_features(&avail, &status, &control);
djm@6458 75 if (ret != PAL_STATUS_SUCCESS) {
djm@6458 76 printk("Get proc features failed.\n");
djm@6458 77 goto no_vti;
djm@6458 78 }
djm@6458 79
djm@6458 80 /* FIXME: do we need to check status field, to see whether
djm@6458 81 * PSR.vm is actually enabled? If yes, aonther call to
djm@6458 82 * ia64_pal_proc_set_features may be reuqired then.
djm@6458 83 */
djm@6458 84 printk("avail:0x%lx, status:0x%lx,control:0x%lx, vm?0x%lx\n",
djm@6458 85 avail, status, control, avail & PAL_PROC_VM_BIT);
djm@6458 86 if (!(avail & PAL_PROC_VM_BIT)) {
djm@6458 87 printk("No VT feature supported.\n");
djm@6458 88 goto no_vti;
djm@6458 89 }
djm@6458 90
djm@6458 91 ret = ia64_pal_vp_env_info(&buffer_size, &vp_env_info);
djm@6458 92 if (ret != PAL_STATUS_SUCCESS) {
djm@6458 93 printk("Get vp environment info failed.\n");
djm@6458 94 goto no_vti;
djm@6458 95 }
djm@6458 96
djm@6458 97 /* Does xen has ability to decode itself? */
djm@6458 98 if (!(vp_env_info & VP_OPCODE))
djm@6458 99 printk("WARNING: no opcode provided from hardware(%lx)!!!\n", vp_env_info);
djm@6458 100 vm_order = get_order(buffer_size);
awilliam@9164 101 printk("vm buffer size: %ld, order: %d\n", buffer_size, vm_order);
djm@6458 102
djm@6458 103 vmx_enabled = 1;
djm@6458 104 no_vti:
djm@6458 105 return;
djm@6458 106 }
djm@6458 107
djm@6458 108 /*
djm@6458 109 * Init virtual environment on current LP
djm@6458 110 * vsa_base is the indicator whether it's first LP to be initialized
djm@6458 111 * for current domain.
djm@6458 112 */
djm@6458 113 void
djm@6458 114 vmx_init_env(void)
djm@6458 115 {
djm@6458 116 u64 status, tmp_base;
djm@6458 117
djm@6458 118 if (!vm_buffer) {
awilliam@8916 119 vm_buffer = (unsigned long)alloc_xenheap_pages(vm_order);
djm@6458 120 ASSERT(vm_buffer);
djm@6458 121 printk("vm_buffer: 0x%lx\n", vm_buffer);
djm@6458 122 }
djm@6458 123
djm@6458 124 status=ia64_pal_vp_init_env(__vsa_base ? VP_INIT_ENV : VP_INIT_ENV_INITALIZE,
djm@6458 125 __pa(vm_buffer),
djm@6458 126 vm_buffer,
djm@6458 127 &tmp_base);
djm@6458 128
djm@6458 129 if (status != PAL_STATUS_SUCCESS) {
djm@6458 130 printk("ia64_pal_vp_init_env failed.\n");
awilliam@8916 131 return ;
djm@6458 132 }
djm@6458 133
djm@6458 134 if (!__vsa_base)
djm@6458 135 __vsa_base = tmp_base;
djm@6458 136 else
djm@6458 137 ASSERT(tmp_base != __vsa_base);
djm@6458 138
djm@6458 139 }
djm@6458 140
djm@6458 141 typedef union {
djm@6458 142 u64 value;
djm@6458 143 struct {
djm@6458 144 u64 number : 8;
djm@6458 145 u64 revision : 8;
djm@6458 146 u64 model : 8;
djm@6458 147 u64 family : 8;
djm@6458 148 u64 archrev : 8;
djm@6458 149 u64 rv : 24;
djm@6458 150 };
djm@6458 151 } cpuid3_t;
djm@6458 152
djm@6458 153 /* Allocate vpd from xenheap */
djm@6458 154 static vpd_t *alloc_vpd(void)
djm@6458 155 {
djm@6458 156 int i;
djm@6458 157 cpuid3_t cpuid3;
djm@6458 158 vpd_t *vpd;
djm@6458 159
djm@6458 160 vpd = alloc_xenheap_pages(get_order(VPD_SIZE));
djm@6458 161 if (!vpd) {
djm@6458 162 printk("VPD allocation failed.\n");
djm@6458 163 return NULL;
djm@6458 164 }
djm@6458 165
awilliam@9169 166 printk("vpd base: 0x%p, vpd size:%ld\n", vpd, sizeof(vpd_t));
djm@6458 167 memset(vpd, 0, VPD_SIZE);
djm@6458 168 /* CPUID init */
djm@6458 169 for (i = 0; i < 5; i++)
djm@6458 170 vpd->vcpuid[i] = ia64_get_cpuid(i);
djm@6458 171
djm@6458 172 /* Limit the CPUID number to 5 */
djm@6458 173 cpuid3.value = vpd->vcpuid[3];
djm@6458 174 cpuid3.number = 4; /* 5 - 1 */
djm@6458 175 vpd->vcpuid[3] = cpuid3.value;
djm@6458 176
awilliam@9011 177 vpd->vac.a_from_int_cr = 1;
awilliam@9011 178 vpd->vac.a_to_int_cr = 1;
awilliam@9011 179 vpd->vac.a_from_psr = 1;
awilliam@9011 180 vpd->vac.a_from_cpuid = 1;
awilliam@9011 181 vpd->vac.a_cover = 1;
awilliam@9011 182 vpd->vac.a_bsw = 1;
awilliam@9011 183
djm@6458 184 vpd->vdc.d_vmsw = 1;
awilliam@9011 185
djm@6458 186 return vpd;
djm@6458 187 }
djm@6458 188
awilliam@9376 189 /* Free vpd to xenheap */
awilliam@9376 190 static void
awilliam@9376 191 free_vpd(struct vcpu *v)
awilliam@9376 192 {
awilliam@9376 193 if ( v->arch.privregs )
awilliam@9376 194 free_xenheap_pages(v->arch.privregs, get_order(VPD_SIZE));
awilliam@9376 195 }
djm@6458 196
djm@6458 197 /*
djm@6458 198 * Create a VP on intialized VMX environment.
djm@6458 199 */
djm@6458 200 static void
djm@6458 201 vmx_create_vp(struct vcpu *v)
djm@6458 202 {
djm@6458 203 u64 ret;
djm@6801 204 vpd_t *vpd = v->arch.privregs;
djm@6458 205 u64 ivt_base;
djm@6458 206 extern char vmx_ia64_ivt;
djm@6458 207 /* ia64_ivt is function pointer, so need this tranlation */
djm@6458 208 ivt_base = (u64) &vmx_ia64_ivt;
djm@6458 209 printk("ivt_base: 0x%lx\n", ivt_base);
awilliam@8916 210 ret = ia64_pal_vp_create((u64 *)vpd, (u64 *)ivt_base, 0);
awilliam@9982 211 if (ret != PAL_STATUS_SUCCESS){
awilliam@9982 212 panic_domain(vcpu_regs(v),"ia64_pal_vp_create failed. \n");
awilliam@9982 213 }
djm@6458 214 }
djm@6458 215
djm@6458 216 /* Other non-context related tasks can be done in context switch */
djm@6458 217 void
djm@6458 218 vmx_save_state(struct vcpu *v)
djm@6458 219 {
awilliam@8916 220 u64 status;
djm@6458 221
djm@6458 222 /* FIXME: about setting of pal_proc_vector... time consuming */
awilliam@8916 223 status = ia64_pal_vp_save((u64 *)v->arch.privregs, 0);
awilliam@9982 224 if (status != PAL_STATUS_SUCCESS){
awilliam@9982 225 panic_domain(vcpu_regs(v),"Save vp status failed\n");
awilliam@9982 226 }
djm@6458 227
djm@6458 228
djm@6458 229 /* Need to save KR when domain switch, though HV itself doesn;t
djm@6458 230 * use them.
djm@6458 231 */
djm@6458 232 v->arch.arch_vmx.vkr[0] = ia64_get_kr(0);
djm@6458 233 v->arch.arch_vmx.vkr[1] = ia64_get_kr(1);
djm@6458 234 v->arch.arch_vmx.vkr[2] = ia64_get_kr(2);
djm@6458 235 v->arch.arch_vmx.vkr[3] = ia64_get_kr(3);
djm@6458 236 v->arch.arch_vmx.vkr[4] = ia64_get_kr(4);
djm@6458 237 v->arch.arch_vmx.vkr[5] = ia64_get_kr(5);
djm@6458 238 v->arch.arch_vmx.vkr[6] = ia64_get_kr(6);
djm@6458 239 v->arch.arch_vmx.vkr[7] = ia64_get_kr(7);
djm@6458 240 }
djm@6458 241
djm@6458 242 /* Even guest is in physical mode, we still need such double mapping */
djm@6458 243 void
djm@6458 244 vmx_load_state(struct vcpu *v)
djm@6458 245 {
awilliam@8916 246 u64 status;
djm@6458 247
awilliam@9169 248 status = ia64_pal_vp_restore((u64 *)v->arch.privregs, 0);
awilliam@9982 249 if (status != PAL_STATUS_SUCCESS){
awilliam@9982 250 panic_domain(vcpu_regs(v),"Restore vp status failed\n");
awilliam@9982 251 }
djm@6458 252
djm@6458 253 ia64_set_kr(0, v->arch.arch_vmx.vkr[0]);
djm@6458 254 ia64_set_kr(1, v->arch.arch_vmx.vkr[1]);
djm@6458 255 ia64_set_kr(2, v->arch.arch_vmx.vkr[2]);
djm@6458 256 ia64_set_kr(3, v->arch.arch_vmx.vkr[3]);
djm@6458 257 ia64_set_kr(4, v->arch.arch_vmx.vkr[4]);
djm@6458 258 ia64_set_kr(5, v->arch.arch_vmx.vkr[5]);
djm@6458 259 ia64_set_kr(6, v->arch.arch_vmx.vkr[6]);
djm@6458 260 ia64_set_kr(7, v->arch.arch_vmx.vkr[7]);
djm@6458 261 /* Guest vTLB is not required to be switched explicitly, since
djm@6458 262 * anchored in vcpu */
djm@6458 263 }
djm@6458 264
djm@6458 265 /*
djm@6458 266 * Initialize VMX envirenment for guest. Only the 1st vp/vcpu
djm@6458 267 * is registered here.
djm@6458 268 */
djm@6458 269 void
kaf24@7720 270 vmx_final_setup_guest(struct vcpu *v)
djm@6458 271 {
djm@6458 272 vpd_t *vpd;
djm@6458 273
awilliam@9376 274 free_xenheap_pages(v->arch.privregs, get_order(sizeof(mapped_regs_t)));
awilliam@9376 275
djm@6458 276 vpd = alloc_vpd();
djm@6458 277 ASSERT(vpd);
djm@6458 278
kaf24@7720 279 v->arch.privregs = vpd;
djm@6458 280 vpd->virt_env_vaddr = vm_buffer;
djm@6458 281
djm@6878 282 /* Per-domain vTLB and vhpt implementation. Now vmx domain will stick
djm@6878 283 * to this solution. Maybe it can be deferred until we know created
djm@6878 284 * one as vmx domain */
awilliam@9765 285 #ifndef HASH_VHPT
awilliam@9765 286 init_domain_tlb(v);
awilliam@9765 287 #endif
djm@6458 288 /* v->arch.schedule_tail = arch_vmx_do_launch; */
djm@6458 289 vmx_create_vp(v);
djm@6458 290
djm@6458 291 /* Set this ed to be vmx */
djm@6458 292 set_bit(ARCH_VMX_VMCS_LOADED, &v->arch.arch_vmx.flags);
djm@6458 293
djm@6458 294 /* Physical mode emulation initialization, including
djm@6458 295 * emulation ID allcation and related memory request
djm@6458 296 */
djm@6458 297 physical_mode_init(v);
djm@6458 298
djm@6458 299 vlsapic_reset(v);
djm@6458 300 vtm_init(v);
djm@6458 301
kaf24@7720 302 /* One more step to enable interrupt assist */
kaf24@7720 303 set_bit(ARCH_VMX_INTR_ASSIST, &v->arch.arch_vmx.flags);
djm@6458 304 }
djm@6799 305
awilliam@9376 306 void
awilliam@9376 307 vmx_relinquish_vcpu_resources(struct vcpu *v)
awilliam@9376 308 {
awilliam@9376 309 vtime_t *vtm = &(v->arch.arch_vmx.vtm);
awilliam@9376 310
awilliam@9376 311 kill_timer(&vtm->vtm_timer);
awilliam@9376 312
awilliam@9376 313 free_domain_tlb(v);
awilliam@9376 314 free_vpd(v);
awilliam@9376 315 }
awilliam@9376 316
djm@6799 317 typedef struct io_range {
djm@6799 318 unsigned long start;
djm@6799 319 unsigned long size;
djm@6799 320 unsigned long type;
djm@6799 321 } io_range_t;
djm@6799 322
djm@6799 323 io_range_t io_ranges[] = {
djm@6799 324 {VGA_IO_START, VGA_IO_SIZE, GPFN_FRAME_BUFFER},
djm@6799 325 {MMIO_START, MMIO_SIZE, GPFN_LOW_MMIO},
djm@6799 326 {LEGACY_IO_START, LEGACY_IO_SIZE, GPFN_LEGACY_IO},
djm@6799 327 {IO_SAPIC_START, IO_SAPIC_SIZE, GPFN_IOSAPIC},
djm@6799 328 {PIB_START, PIB_SIZE, GPFN_PIB},
djm@6799 329 };
djm@6799 330
djm@7333 331 #define VMX_SYS_PAGES (2 + (GFW_SIZE >> PAGE_SHIFT))
djm@6799 332 #define VMX_CONFIG_PAGES(d) ((d)->max_pages - VMX_SYS_PAGES)
djm@6799 333
awilliam@9489 334 int vmx_build_physmap_table(struct domain *d)
djm@6799 335 {
awilliam@9489 336 unsigned long i, j, start, tmp, end, mfn;
djm@6799 337 struct vcpu *v = d->vcpu[0];
awilliam@9489 338 struct list_head *list_ent = d->page_list.next;
djm@6799 339
awilliam@9489 340 ASSERT(!d->arch.physmap_built);
djm@6799 341 ASSERT(!test_bit(ARCH_VMX_CONTIG_MEM, &v->arch.arch_vmx.flags));
awilliam@9489 342 ASSERT(d->max_pages == d->tot_pages);
djm@6799 343
djm@7333 344 /* Mark I/O ranges */
djm@7333 345 for (i = 0; i < (sizeof(io_ranges) / sizeof(io_range_t)); i++) {
djm@7333 346 for (j = io_ranges[i].start;
djm@7333 347 j < io_ranges[i].start + io_ranges[i].size;
djm@7333 348 j += PAGE_SIZE)
awilliam@8778 349 assign_domain_page(d, j, io_ranges[i].type);
djm@7333 350 }
djm@7333 351
awilliam@9489 352 /* Map normal memory below 3G */
awilliam@9489 353 end = VMX_CONFIG_PAGES(d) << PAGE_SHIFT;
awilliam@9489 354 tmp = end < MMIO_START ? end : MMIO_START;
awilliam@9489 355 for (i = 0; (i < tmp) && (list_ent != &d->page_list); i += PAGE_SIZE) {
awilliam@9489 356 mfn = page_to_mfn(list_entry(
awilliam@9489 357 list_ent, struct page_info, list));
awilliam@9489 358 assign_domain_page(d, i, mfn << PAGE_SHIFT);
awilliam@9489 359 list_ent = mfn_to_page(mfn)->list.next;
djm@6799 360 }
awilliam@9489 361 ASSERT(list_ent != &d->page_list);
awilliam@9011 362
djm@6799 363 /* Map normal memory beyond 4G */
djm@6799 364 if (unlikely(end > MMIO_START)) {
djm@6799 365 start = 4 * MEM_G;
djm@6799 366 end = start + (end - 3 * MEM_G);
awilliam@9489 367 for (i = start; (i < end) &&
awilliam@9489 368 (list_ent != &d->page_list); i += PAGE_SIZE) {
awilliam@9489 369 mfn = page_to_mfn(list_entry(
awilliam@9489 370 list_ent, struct page_info, list));
awilliam@9489 371 assign_domain_page(d, i, mfn << PAGE_SHIFT);
awilliam@9489 372 list_ent = mfn_to_page(mfn)->list.next;
awilliam@9489 373 }
awilliam@9489 374 ASSERT(list_ent != &d->page_list);
awilliam@9011 375 }
awilliam@9489 376
awilliam@9489 377 /* Map guest firmware */
awilliam@9489 378 for (i = GFW_START; (i < GFW_START + GFW_SIZE) &&
awilliam@9489 379 (list_ent != &d->page_list); i += PAGE_SIZE) {
awilliam@9489 380 mfn = page_to_mfn(list_entry(
awilliam@9489 381 list_ent, struct page_info, list));
awilliam@9489 382 assign_domain_page(d, i, mfn << PAGE_SHIFT);
awilliam@9489 383 list_ent = mfn_to_page(mfn)->list.next;
djm@6799 384 }
awilliam@9489 385 ASSERT(list_ent != &d->page_list);
awilliam@9489 386
awilliam@9489 387 /* Map for shared I/O page and xenstore */
awilliam@9489 388 mfn = page_to_mfn(list_entry(list_ent, struct page_info, list));
awilliam@9489 389 assign_domain_page(d, IO_PAGE_START, mfn << PAGE_SHIFT);
awilliam@9489 390 list_ent = mfn_to_page(mfn)->list.next;
awilliam@9489 391 ASSERT(list_ent != &d->page_list);
awilliam@9489 392
awilliam@9489 393 mfn = page_to_mfn(list_entry(list_ent, struct page_info, list));
awilliam@9489 394 assign_domain_page(d, STORE_PAGE_START, mfn << PAGE_SHIFT);
awilliam@9489 395 list_ent = mfn_to_page(mfn)->list.next;
awilliam@9489 396 ASSERT(list_ent == &d->page_list);
djm@6799 397
djm@6799 398 d->arch.max_pfn = end >> PAGE_SHIFT;
awilliam@9489 399 d->arch.physmap_built = 1;
djm@6799 400 set_bit(ARCH_VMX_CONTIG_MEM, &v->arch.arch_vmx.flags);
djm@6799 401 return 0;
djm@6799 402 }
djm@7333 403
kaf24@7720 404 void vmx_setup_platform(struct domain *d, struct vcpu_guest_context *c)
djm@7333 405 {
djm@7333 406 ASSERT(d != dom0); /* only for non-privileged vti domain */
awilliam@9489 407
awilliam@9489 408 if (!d->arch.physmap_built)
awilliam@9489 409 vmx_build_physmap_table(d);
awilliam@9489 410
djm@7333 411 d->arch.vmx_platform.shared_page_va =
awilliam@8916 412 (unsigned long)__va(__gpa_to_mpa(d, IO_PAGE_START));
djm@7333 413 /* TEMP */
djm@7333 414 d->arch.vmx_platform.pib_base = 0xfee00000UL;
djm@7333 415
djm@7333 416 /* Only open one port for I/O and interrupt emulation */
kaf24@7720 417 memset(&d->shared_info->evtchn_mask[0], 0xff,
kaf24@7720 418 sizeof(d->shared_info->evtchn_mask));
djm@7333 419
kaf24@7720 420 /* Initialize the virtual interrupt lines */
kaf24@7720 421 vmx_virq_line_init(d);
djm@7333 422
kaf24@7720 423 /* Initialize iosapic model within hypervisor */
kaf24@8708 424 hvm_vioapic_init(d);
djm@7333 425 }
djm@7333 426
kaf24@8971 427 void vmx_do_launch(struct vcpu *v)
kaf24@8971 428 {
kaf24@8971 429 if (evtchn_bind_vcpu(iopacket_port(v), v->vcpu_id) < 0) {
kaf24@8971 430 printk("VMX domain bind port %d to vcpu %d failed!\n",
kaf24@8971 431 iopacket_port(v), v->vcpu_id);
kaf24@8971 432 domain_crash_synchronous();
kaf24@8971 433 }
djm@7333 434
kaf24@8971 435 clear_bit(iopacket_port(v),
kaf24@8971 436 &v->domain->shared_info->evtchn_mask[0]);
kaf24@8971 437
kaf24@8971 438 vmx_load_all_rr(v);
kaf24@8971 439 }