ia64/xen-unstable

annotate xen/arch/x86/setup.c @ 3334:60e5912b6b28

bitkeeper revision 1.1159.170.68 (41d2b498y1kgB6L3q_YXZmDzui_mSQ)

Pull command-line option declarations to files in which they are used,
rather than having a single list of them in common/kernel.c.
author kaf24@scramble.cl.cam.ac.uk
date Wed Dec 29 13:43:52 2004 +0000 (2004-12-29)
parents 708bd9c8362b
children b2fa96909734 4b44501cd54c
rev   line source
kaf24@1452 1
kaf24@1452 2 #include <xen/config.h>
kaf24@1452 3 #include <xen/init.h>
kaf24@1452 4 #include <xen/lib.h>
kaf24@1452 5 #include <xen/sched.h>
kaf24@1452 6 #include <xen/pci.h>
kaf24@1452 7 #include <xen/serial.h>
kaf24@1506 8 #include <xen/softirq.h>
kaf24@1452 9 #include <xen/acpi.h>
kaf24@1452 10 #include <asm/bitops.h>
kaf24@1452 11 #include <asm/smp.h>
kaf24@1452 12 #include <asm/processor.h>
kaf24@1452 13 #include <asm/mpspec.h>
kaf24@1452 14 #include <asm/apic.h>
kaf24@1452 15 #include <asm/desc.h>
kaf24@1452 16 #include <asm/domain_page.h>
kaf24@1452 17 #include <asm/pdb.h>
kaf24@1452 18
kaf24@3334 19 /* opt_noht: If true, Hyperthreading is ignored. */
kaf24@3334 20 int opt_noht = 0;
kaf24@3334 21 boolean_param("noht", opt_noht);
kaf24@3334 22
kaf24@3334 23 /* opt_noacpi: If true, ACPI tables are not parsed. */
kaf24@3334 24 static int opt_noacpi = 0;
kaf24@3334 25 boolean_param("noacpi", opt_noacpi);
kaf24@3334 26
kaf24@3334 27 /* opt_nosmp: If true, secondary processors are ignored. */
kaf24@3334 28 static int opt_nosmp = 0;
kaf24@3334 29 boolean_param("nosmp", opt_nosmp);
kaf24@3334 30
kaf24@3334 31 /* opt_ignorebiostables: If true, ACPI and MP tables are ignored. */
kaf24@3334 32 /* NB. This flag implies 'nosmp' and 'noacpi'. */
kaf24@3334 33 static int opt_ignorebiostables = 0;
kaf24@3334 34 boolean_param("ignorebiostables", opt_ignorebiostables);
kaf24@3334 35
kaf24@3334 36 /* opt_watchdog: If true, run a watchdog NMI on each processor. */
kaf24@3334 37 static int opt_watchdog = 0;
kaf24@3334 38 boolean_param("watchdog", opt_watchdog);
kaf24@3334 39
kaf24@2298 40 extern void arch_init_memory(void);
kaf24@1589 41 extern void init_IRQ(void);
kaf24@1589 42 extern void trap_init(void);
kaf24@1589 43 extern void time_init(void);
kaf24@1589 44 extern void ac_timer_init(void);
kaf24@1589 45 extern void initialize_keytable();
kaf24@1589 46 extern int do_timer_lists_from_pit;
kaf24@1589 47
kaf24@1452 48 char ignore_irq13; /* set if exception 16 works */
kaf24@1480 49 struct cpuinfo_x86 boot_cpu_data = { 0, 0, 0, 0, -1 };
kaf24@1452 50
kaf24@1670 51 #if defined(__x86_64__)
kaf24@1670 52 unsigned long mmu_cr4_features = X86_CR4_PSE | X86_CR4_PGE | X86_CR4_PAE;
kaf24@1670 53 #else
kaf24@1452 54 unsigned long mmu_cr4_features = X86_CR4_PSE | X86_CR4_PGE;
kaf24@1670 55 #endif
kaf24@1452 56 EXPORT_SYMBOL(mmu_cr4_features);
kaf24@1452 57
kaf24@1452 58 unsigned long wait_init_idle;
kaf24@1452 59
kaf24@1505 60 struct domain *idle_task[NR_CPUS] = { &idle0_task };
kaf24@1452 61
kaf24@1452 62 #ifdef CONFIG_ACPI_INTERPRETER
kaf24@1452 63 int acpi_disabled = 0;
kaf24@1452 64 #else
kaf24@1452 65 int acpi_disabled = 1;
kaf24@1452 66 #endif
kaf24@1452 67 EXPORT_SYMBOL(acpi_disabled);
kaf24@1452 68
kaf24@1452 69 int phys_proc_id[NR_CPUS];
kaf24@1452 70 int logical_proc_id[NR_CPUS];
kaf24@1452 71
kaf24@1672 72 #if defined(__i386__)
kaf24@1672 73
kaf24@1452 74 /* Standard macro to see if a specific flag is changeable */
kaf24@1452 75 static inline int flag_is_changeable_p(u32 flag)
kaf24@1452 76 {
kaf24@1452 77 u32 f1, f2;
kaf24@1452 78
kaf24@1452 79 asm("pushfl\n\t"
kaf24@1452 80 "pushfl\n\t"
kaf24@1452 81 "popl %0\n\t"
kaf24@1452 82 "movl %0,%1\n\t"
kaf24@1452 83 "xorl %2,%0\n\t"
kaf24@1452 84 "pushl %0\n\t"
kaf24@1452 85 "popfl\n\t"
kaf24@1452 86 "pushfl\n\t"
kaf24@1452 87 "popl %0\n\t"
kaf24@1452 88 "popfl\n\t"
kaf24@1452 89 : "=&r" (f1), "=&r" (f2)
kaf24@1452 90 : "ir" (flag));
kaf24@1452 91
kaf24@1452 92 return ((f1^f2) & flag) != 0;
kaf24@1452 93 }
kaf24@1452 94
kaf24@1452 95 /* Probe for the CPUID instruction */
kaf24@1452 96 static int __init have_cpuid_p(void)
kaf24@1452 97 {
kaf24@1452 98 return flag_is_changeable_p(X86_EFLAGS_ID);
kaf24@1452 99 }
kaf24@1452 100
kaf24@1672 101 #elif defined(__x86_64__)
kaf24@1672 102
kaf24@1672 103 #define have_cpuid_p() (1)
kaf24@1672 104
kaf24@1672 105 #endif
kaf24@1672 106
kaf24@1452 107 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
kaf24@1452 108 {
kaf24@1452 109 char *v = c->x86_vendor_id;
kaf24@1452 110
kaf24@1452 111 if (!strcmp(v, "GenuineIntel"))
kaf24@1452 112 c->x86_vendor = X86_VENDOR_INTEL;
kaf24@1452 113 else if (!strcmp(v, "AuthenticAMD"))
kaf24@1452 114 c->x86_vendor = X86_VENDOR_AMD;
kaf24@1452 115 else if (!strcmp(v, "CyrixInstead"))
kaf24@1452 116 c->x86_vendor = X86_VENDOR_CYRIX;
kaf24@1452 117 else if (!strcmp(v, "UMC UMC UMC "))
kaf24@1452 118 c->x86_vendor = X86_VENDOR_UMC;
kaf24@1452 119 else if (!strcmp(v, "CentaurHauls"))
kaf24@1452 120 c->x86_vendor = X86_VENDOR_CENTAUR;
kaf24@1452 121 else if (!strcmp(v, "NexGenDriven"))
kaf24@1452 122 c->x86_vendor = X86_VENDOR_NEXGEN;
kaf24@1452 123 else if (!strcmp(v, "RiseRiseRise"))
kaf24@1452 124 c->x86_vendor = X86_VENDOR_RISE;
kaf24@1452 125 else if (!strcmp(v, "GenuineTMx86") ||
kaf24@1452 126 !strcmp(v, "TransmetaCPU"))
kaf24@1452 127 c->x86_vendor = X86_VENDOR_TRANSMETA;
kaf24@1452 128 else
kaf24@1452 129 c->x86_vendor = X86_VENDOR_UNKNOWN;
kaf24@1452 130 }
kaf24@1452 131
kaf24@1452 132 static void __init init_intel(struct cpuinfo_x86 *c)
kaf24@1452 133 {
kaf24@1452 134 /* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it */
kaf24@1452 135 if ( c->x86 == 6 && c->x86_model < 3 && c->x86_mask < 3 )
kaf24@1452 136 clear_bit(X86_FEATURE_SEP, &c->x86_capability);
kaf24@1452 137
kaf24@1452 138 #ifdef CONFIG_SMP
kaf24@1452 139 if ( test_bit(X86_FEATURE_HT, &c->x86_capability) )
kaf24@1452 140 {
kaf24@1452 141 u32 eax, ebx, ecx, edx;
kaf24@1452 142 int initial_apic_id, siblings, cpu = smp_processor_id();
kaf24@1452 143
kaf24@1452 144 cpuid(1, &eax, &ebx, &ecx, &edx);
cl349@2703 145 ht_per_core = siblings = (ebx & 0xff0000) >> 16;
cl349@2703 146
cl349@2703 147 if ( opt_noht )
cl349@2703 148 clear_bit(X86_FEATURE_HT, &c->x86_capability[0]);
cl349@2703 149
kaf24@1452 150 if ( siblings <= 1 )
kaf24@1452 151 {
kaf24@1452 152 printk(KERN_INFO "CPU#%d: Hyper-Threading is disabled\n", cpu);
kaf24@1452 153 }
kaf24@1452 154 else if ( siblings > 2 )
kaf24@1452 155 {
kaf24@1452 156 panic("We don't support more than two logical CPUs per package!");
kaf24@1452 157 }
kaf24@1452 158 else
kaf24@1452 159 {
kaf24@1452 160 initial_apic_id = ebx >> 24 & 0xff;
kaf24@1452 161 phys_proc_id[cpu] = initial_apic_id >> 1;
kaf24@1452 162 logical_proc_id[cpu] = initial_apic_id & 1;
kaf24@1452 163 printk(KERN_INFO "CPU#%d: Physical ID: %d, Logical ID: %d\n",
kaf24@1452 164 cpu, phys_proc_id[cpu], logical_proc_id[cpu]);
kaf24@1452 165 }
kaf24@1452 166 }
kaf24@1452 167 #endif
kaf24@1452 168 }
kaf24@1452 169
kaf24@1452 170 static void __init init_amd(struct cpuinfo_x86 *c)
kaf24@1452 171 {
kaf24@1452 172 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
kaf24@1452 173 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
kaf24@1452 174 clear_bit(0*32+31, &c->x86_capability);
kaf24@1452 175
kaf24@1452 176 switch(c->x86)
kaf24@1452 177 {
kaf24@1452 178 case 5:
kaf24@1452 179 panic("AMD K6 is not supported.\n");
kaf24@1452 180 case 6: /* An Athlon/Duron. We can trust the BIOS probably */
kaf24@1452 181 break;
kaf24@1452 182 }
kaf24@1452 183 }
kaf24@1452 184
kaf24@1452 185 /*
kaf24@1452 186 * This does the hard work of actually picking apart the CPU stuff...
kaf24@1452 187 */
kaf24@1452 188 void __init identify_cpu(struct cpuinfo_x86 *c)
kaf24@1452 189 {
kaf24@1452 190 int junk, i, cpu = smp_processor_id();
kaf24@1452 191 u32 xlvl, tfms;
kaf24@1452 192
kaf24@1452 193 phys_proc_id[cpu] = cpu;
kaf24@1452 194 logical_proc_id[cpu] = 0;
kaf24@1452 195
kaf24@1452 196 c->x86_vendor = X86_VENDOR_UNKNOWN;
kaf24@1452 197 c->cpuid_level = -1; /* CPUID not detected */
kaf24@1452 198 c->x86_model = c->x86_mask = 0; /* So far unknown... */
kaf24@1452 199 c->x86_vendor_id[0] = '\0'; /* Unset */
kaf24@1452 200 memset(&c->x86_capability, 0, sizeof c->x86_capability);
kaf24@1452 201
kaf24@1452 202 if ( !have_cpuid_p() )
kaf24@1452 203 panic("Ancient processors not supported\n");
kaf24@1452 204
kaf24@1452 205 /* Get vendor name */
kaf24@1452 206 cpuid(0x00000000, &c->cpuid_level,
kaf24@1452 207 (int *)&c->x86_vendor_id[0],
kaf24@1452 208 (int *)&c->x86_vendor_id[8],
kaf24@1452 209 (int *)&c->x86_vendor_id[4]);
kaf24@1452 210
kaf24@1452 211 get_cpu_vendor(c);
kaf24@1452 212
kaf24@1452 213 if ( c->cpuid_level == 0 )
kaf24@1452 214 panic("Decrepit CPUID not supported\n");
kaf24@1452 215
kaf24@1452 216 cpuid(0x00000001, &tfms, &junk, &junk,
kaf24@1452 217 &c->x86_capability[0]);
kaf24@1452 218 c->x86 = (tfms >> 8) & 15;
kaf24@1452 219 c->x86_model = (tfms >> 4) & 15;
kaf24@1452 220 c->x86_mask = tfms & 15;
kaf24@1452 221
kaf24@1452 222 /* AMD-defined flags: level 0x80000001 */
kaf24@1452 223 xlvl = cpuid_eax(0x80000000);
kaf24@1452 224 if ( (xlvl & 0xffff0000) == 0x80000000 ) {
kaf24@1452 225 if ( xlvl >= 0x80000001 )
kaf24@1452 226 c->x86_capability[1] = cpuid_edx(0x80000001);
kaf24@1452 227 }
kaf24@1452 228
kaf24@1452 229 /* Transmeta-defined flags: level 0x80860001 */
kaf24@1452 230 xlvl = cpuid_eax(0x80860000);
kaf24@1452 231 if ( (xlvl & 0xffff0000) == 0x80860000 ) {
kaf24@1452 232 if ( xlvl >= 0x80860001 )
kaf24@1452 233 c->x86_capability[2] = cpuid_edx(0x80860001);
kaf24@1452 234 }
kaf24@1452 235
kaf24@1452 236 printk("CPU%d: Before vendor init, caps: %08x %08x %08x, vendor = %d\n",
kaf24@1452 237 smp_processor_id(),
kaf24@1452 238 c->x86_capability[0],
kaf24@1452 239 c->x86_capability[1],
kaf24@1452 240 c->x86_capability[2],
kaf24@1452 241 c->x86_vendor);
kaf24@1452 242
kaf24@1452 243 switch ( c->x86_vendor ) {
kaf24@1452 244 case X86_VENDOR_INTEL:
kaf24@1452 245 init_intel(c);
kaf24@1452 246 break;
kaf24@1452 247 case X86_VENDOR_AMD:
kaf24@1452 248 init_amd(c);
kaf24@1452 249 break;
kaf24@1452 250 case X86_VENDOR_UNKNOWN: /* Connectix Virtual PC reports this */
kaf24@1452 251 break;
kaf24@1452 252 case X86_VENDOR_CENTAUR:
kaf24@1452 253 break;
kaf24@1452 254 default:
kaf24@1452 255 printk("Unknown CPU identifier (%d): continuing anyway, "
kaf24@1452 256 "but might fail.\n", c->x86_vendor);
kaf24@1452 257 }
kaf24@1452 258
kaf24@1452 259 printk("CPU caps: %08x %08x %08x %08x\n",
kaf24@1452 260 c->x86_capability[0],
kaf24@1452 261 c->x86_capability[1],
kaf24@1452 262 c->x86_capability[2],
kaf24@1452 263 c->x86_capability[3]);
kaf24@1452 264
kaf24@1452 265 /*
kaf24@1452 266 * On SMP, boot_cpu_data holds the common feature set between
kaf24@1452 267 * all CPUs; so make sure that we indicate which features are
kaf24@1452 268 * common between the CPUs. The first time this routine gets
kaf24@1452 269 * executed, c == &boot_cpu_data.
kaf24@1452 270 */
kaf24@1452 271 if ( c != &boot_cpu_data ) {
kaf24@1452 272 /* AND the already accumulated flags with these */
kaf24@1452 273 for ( i = 0 ; i < NCAPINTS ; i++ )
kaf24@1452 274 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
kaf24@1452 275 }
kaf24@1452 276 }
kaf24@1452 277
kaf24@1452 278
kaf24@1452 279 unsigned long cpu_initialized;
kaf24@1452 280 void __init cpu_init(void)
kaf24@1452 281 {
kaf24@1672 282 #if defined(__i386__) /* XXX */
kaf24@1452 283 int nr = smp_processor_id();
kaf24@1452 284 struct tss_struct * t = &init_tss[nr];
kaf24@1452 285
kaf24@1452 286 if ( test_and_set_bit(nr, &cpu_initialized) )
kaf24@1452 287 panic("CPU#%d already initialized!!!\n", nr);
kaf24@1452 288 printk("Initializing CPU#%d\n", nr);
kaf24@1452 289
kaf24@3050 290 t->bitmap = IOBMP_INVALID_OFFSET;
kaf24@1486 291 memset(t->io_bitmap, ~0, sizeof(t->io_bitmap));
kaf24@1486 292
kaf24@1452 293 /* Set up GDT and IDT. */
kaf24@1452 294 SET_GDT_ENTRIES(current, DEFAULT_GDT_ENTRIES);
kaf24@1452 295 SET_GDT_ADDRESS(current, DEFAULT_GDT_ADDRESS);
kaf24@1452 296 __asm__ __volatile__("lgdt %0": "=m" (*current->mm.gdt));
kaf24@1452 297 __asm__ __volatile__("lidt %0": "=m" (idt_descr));
kaf24@1452 298
kaf24@1452 299 /* No nested task. */
kaf24@1452 300 __asm__("pushfl ; andl $0xffffbfff,(%esp) ; popfl");
kaf24@1452 301
kaf24@1452 302 /* Ensure FPU gets initialised for each domain. */
kaf24@1452 303 stts();
kaf24@1452 304
kaf24@1452 305 /* Set up and load the per-CPU TSS and LDT. */
kaf24@1452 306 t->ss0 = __HYPERVISOR_DS;
kaf24@1452 307 t->esp0 = get_stack_top();
kaf24@1452 308 set_tss_desc(nr,t);
kaf24@1452 309 load_TR(nr);
kaf24@1452 310 __asm__ __volatile__("lldt %%ax"::"a" (0));
kaf24@1452 311
kaf24@1452 312 /* Clear all 6 debug registers. */
kaf24@1452 313 #define CD(register) __asm__("movl %0,%%db" #register ::"r"(0) );
kaf24@1452 314 CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7);
kaf24@1452 315 #undef CD
kaf24@1452 316
kaf24@1452 317 /* Install correct page table. */
kaf24@1452 318 write_ptbase(&current->mm);
kaf24@1452 319
kaf24@1452 320 init_idle_task();
kaf24@1672 321 #endif
kaf24@1452 322 }
kaf24@1452 323
kaf24@1452 324 static void __init do_initcalls(void)
kaf24@1452 325 {
kaf24@1452 326 initcall_t *call;
kaf24@1452 327 for ( call = &__initcall_start; call < &__initcall_end; call++ )
kaf24@1452 328 (*call)();
kaf24@1452 329 }
kaf24@1452 330
kaf24@1452 331 unsigned long pci_mem_start = 0x10000000;
kaf24@1452 332
kaf24@1452 333 void __init start_of_day(void)
kaf24@1452 334 {
kaf24@1452 335 unsigned long low_mem_size;
kaf24@1452 336
kaf24@1452 337 #ifdef MEMORY_GUARD
kaf24@1452 338 /* Unmap the first page of CPU0's stack. */
kaf24@1452 339 extern unsigned long cpu0_stack[];
kaf24@1452 340 memguard_guard_range(cpu0_stack, PAGE_SIZE);
kaf24@1452 341 #endif
kaf24@1452 342
kaf24@1505 343 open_softirq(NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ, new_tlbflush_clock_period);
kaf24@1452 344
kaf24@1452 345 if ( opt_watchdog )
kaf24@1452 346 nmi_watchdog = NMI_LOCAL_APIC;
kaf24@1452 347
kaf24@3120 348 sort_exception_tables();
kaf24@3120 349
kaf24@3272 350 arch_do_createdomain(current);
kaf24@3272 351
kaf24@1452 352 /* Tell the PCI layer not to allocate too close to the RAM area.. */
kaf24@1452 353 low_mem_size = ((max_page << PAGE_SHIFT) + 0xfffff) & ~0xfffff;
kaf24@1452 354 if ( low_mem_size > pci_mem_start ) pci_mem_start = low_mem_size;
kaf24@1452 355
kaf24@1452 356 identify_cpu(&boot_cpu_data); /* get CPU type info */
kaf24@1452 357 if ( cpu_has_fxsr ) set_in_cr4(X86_CR4_OSFXSR);
kaf24@1452 358 if ( cpu_has_xmm ) set_in_cr4(X86_CR4_OSXMMEXCPT);
kaf24@1452 359 #ifdef CONFIG_SMP
kaf24@1452 360 if ( opt_ignorebiostables )
kaf24@1452 361 {
kaf24@1452 362 opt_nosmp = 1; /* No SMP without configuration */
kaf24@1452 363 opt_noacpi = 1; /* ACPI will just confuse matters also */
kaf24@1452 364 }
kaf24@1452 365 else
kaf24@1452 366 {
kaf24@1452 367 find_smp_config();
kaf24@1452 368 smp_alloc_memory(); /* trampoline which other CPUs jump at */
kaf24@1452 369 }
kaf24@1452 370 #endif
kaf24@1452 371 paging_init(); /* not much here now, but sets up fixmap */
kaf24@1452 372 if ( !opt_noacpi )
kaf24@1452 373 acpi_boot_init();
kaf24@1452 374 #ifdef CONFIG_SMP
kaf24@1452 375 if ( smp_found_config )
kaf24@1452 376 get_smp_config();
kaf24@1452 377 #endif
kaf24@1452 378 scheduler_init();
kaf24@1497 379 init_IRQ(); /* installs simple interrupt wrappers. Starts HZ clock. */
kaf24@1452 380 trap_init();
kaf24@1452 381 time_init(); /* installs software handler for HZ clock. */
kaf24@1452 382 init_apic_mappings(); /* make APICs addressable in our pagetables. */
kaf24@1452 383
kaf24@2298 384 arch_init_memory();
kaf24@2298 385
kaf24@1452 386 #ifndef CONFIG_SMP
kaf24@1452 387 APIC_init_uniprocessor();
kaf24@1452 388 #else
kaf24@1452 389 if ( opt_nosmp )
kaf24@1452 390 APIC_init_uniprocessor();
kaf24@1452 391 else
kaf24@1452 392 smp_boot_cpus();
kaf24@1452 393 /*
kaf24@1452 394 * Does loads of stuff, including kicking the local
kaf24@1452 395 * APIC, and the IO APIC after other CPUs are booted.
kaf24@1452 396 * Each IRQ is preferably handled by IO-APIC, but
kaf24@1452 397 * fall thru to 8259A if we have to (but slower).
kaf24@1452 398 */
kaf24@1452 399 #endif
kaf24@1452 400
kaf24@1452 401 __sti();
kaf24@1452 402
kaf24@1505 403 initialize_keytable(); /* call back handling for key codes */
kaf24@1452 404
kaf24@1452 405 serial_init_stage2();
kaf24@1452 406
kaf24@1452 407 #ifdef XEN_DEBUGGER
kaf24@1452 408 initialize_pdb(); /* pervasive debugger */
kaf24@1452 409 #endif
kaf24@1452 410
kaf24@1452 411 if ( !cpu_has_apic )
kaf24@1452 412 {
kaf24@1452 413 do_timer_lists_from_pit = 1;
kaf24@1452 414 if ( smp_num_cpus != 1 )
kaf24@1452 415 panic("We need local APICs on SMP machines!");
kaf24@1452 416 }
kaf24@1452 417
kaf24@1452 418 ac_timer_init(); /* init accurate timers */
kaf24@1452 419 init_xen_time(); /* initialise the time */
kaf24@1452 420 schedulers_start(); /* start scheduler for each CPU */
kaf24@1452 421
kaf24@1452 422 check_nmi_watchdog();
kaf24@1452 423
kaf24@1452 424 #ifdef CONFIG_PCI
kaf24@1452 425 pci_init();
kaf24@1452 426 #endif
kaf24@1452 427 do_initcalls();
kaf24@1452 428
kaf24@1452 429 #ifdef CONFIG_SMP
kaf24@1452 430 wait_init_idle = cpu_online_map;
kaf24@1452 431 clear_bit(smp_processor_id(), &wait_init_idle);
kaf24@1452 432 smp_threads_ready = 1;
kaf24@1452 433 smp_commence(); /* Tell other CPUs that state of the world is stable. */
kaf24@2344 434 while ( wait_init_idle != 0 )
kaf24@1452 435 {
kaf24@1452 436 cpu_relax();
kaf24@1452 437 barrier();
kaf24@1452 438 }
kaf24@1452 439 #endif
kaf24@1452 440
kaf24@1452 441 watchdog_on = 1;
kaf24@1452 442 }