ia64/xen-unstable

annotate xen/arch/ia64/linux-xen/setup.c @ 7332:54b112b314fe

Initial SMP support
Signed-off by: Tristan Gingold <Tristan.Gingold@bull.net>
author djm@kirby.fc.hp.com
date Wed Oct 12 17:12:59 2005 -0600 (2005-10-12)
parents 06d84bf87159
children bd9cb8dc97b6
rev   line source
adsharma@5974 1 /*
adsharma@5974 2 * Architecture-specific setup.
adsharma@5974 3 *
adsharma@5974 4 * Copyright (C) 1998-2001, 2003-2004 Hewlett-Packard Co
adsharma@5974 5 * David Mosberger-Tang <davidm@hpl.hp.com>
adsharma@5974 6 * Stephane Eranian <eranian@hpl.hp.com>
djm@6454 7 * Copyright (C) 2000, 2004 Intel Corp
djm@6454 8 * Rohit Seth <rohit.seth@intel.com>
djm@6454 9 * Suresh Siddha <suresh.b.siddha@intel.com>
djm@6454 10 * Gordon Jin <gordon.jin@intel.com>
adsharma@5974 11 * Copyright (C) 1999 VA Linux Systems
adsharma@5974 12 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
adsharma@5974 13 *
djm@6454 14 * 12/26/04 S.Siddha, G.Jin, R.Seth
djm@6454 15 * Add multi-threading and multi-core detection
adsharma@5974 16 * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
adsharma@5974 17 * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
adsharma@5974 18 * 03/31/00 R.Seth cpu_initialized and current->processor fixes
adsharma@5974 19 * 02/04/00 D.Mosberger some more get_cpuinfo fixes...
adsharma@5974 20 * 02/01/00 R.Seth fixed get_cpuinfo for SMP
adsharma@5974 21 * 01/07/99 S.Eranian added the support for command line argument
adsharma@5974 22 * 06/24/99 W.Drummond added boot_cpu_data.
djm@6454 23 * 05/28/05 Z. Menyhart Dynamic stride size for "flush_icache_range()"
adsharma@5974 24 */
adsharma@5974 25 #include <linux/config.h>
adsharma@5974 26 #include <linux/module.h>
adsharma@5974 27 #include <linux/init.h>
adsharma@5974 28
adsharma@5974 29 #include <linux/acpi.h>
adsharma@5974 30 #include <linux/bootmem.h>
adsharma@5974 31 #include <linux/console.h>
adsharma@5974 32 #include <linux/delay.h>
adsharma@5974 33 #include <linux/kernel.h>
adsharma@5974 34 #include <linux/reboot.h>
adsharma@5974 35 #include <linux/sched.h>
adsharma@5974 36 #include <linux/seq_file.h>
adsharma@5974 37 #include <linux/string.h>
adsharma@5974 38 #include <linux/threads.h>
adsharma@5974 39 #include <linux/tty.h>
adsharma@5974 40 #include <linux/serial.h>
adsharma@5974 41 #include <linux/serial_core.h>
adsharma@5974 42 #include <linux/efi.h>
adsharma@5974 43 #include <linux/initrd.h>
djm@6454 44 #ifndef XEN
djm@6454 45 #include <linux/platform.h>
djm@6454 46 #include <linux/pm.h>
djm@6454 47 #endif
adsharma@5974 48
adsharma@5974 49 #include <asm/ia32.h>
adsharma@5974 50 #include <asm/machvec.h>
adsharma@5974 51 #include <asm/mca.h>
adsharma@5974 52 #include <asm/meminit.h>
adsharma@5974 53 #include <asm/page.h>
adsharma@5974 54 #include <asm/patch.h>
adsharma@5974 55 #include <asm/pgtable.h>
adsharma@5974 56 #include <asm/processor.h>
adsharma@5974 57 #include <asm/sal.h>
adsharma@5974 58 #include <asm/sections.h>
adsharma@5974 59 #include <asm/serial.h>
adsharma@5974 60 #include <asm/setup.h>
adsharma@5974 61 #include <asm/smp.h>
adsharma@5974 62 #include <asm/system.h>
adsharma@5974 63 #include <asm/unistd.h>
djm@6454 64 #ifdef XEN
adsharma@5974 65 #include <asm/vmx.h>
adsharma@5974 66 #include <asm/io.h>
djm@6454 67 #endif
adsharma@5974 68
adsharma@5974 69 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
adsharma@5974 70 # error "struct cpuinfo_ia64 too big!"
adsharma@5974 71 #endif
adsharma@5974 72
adsharma@5974 73 #ifdef CONFIG_SMP
adsharma@5974 74 unsigned long __per_cpu_offset[NR_CPUS];
adsharma@5974 75 EXPORT_SYMBOL(__per_cpu_offset);
adsharma@5974 76 #endif
adsharma@5974 77
adsharma@5974 78 DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
djm@6454 79 #ifdef XEN
ydong@5982 80 DEFINE_PER_CPU(cpu_kr_ia64_t, cpu_kr);
djm@6454 81 #endif
adsharma@5974 82 DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
adsharma@5974 83 DEFINE_PER_CPU(unsigned long, ia64_phys_stacked_size_p8);
adsharma@5974 84 unsigned long ia64_cycles_per_usec;
adsharma@5974 85 struct ia64_boot_param *ia64_boot_param;
adsharma@5974 86 struct screen_info screen_info;
djm@6454 87 unsigned long vga_console_iobase;
djm@6454 88 unsigned long vga_console_membase;
adsharma@5974 89
adsharma@5974 90 unsigned long ia64_max_cacheline_size;
adsharma@5974 91 unsigned long ia64_iobase; /* virtual address for I/O accesses */
adsharma@5974 92 EXPORT_SYMBOL(ia64_iobase);
adsharma@5974 93 struct io_space io_space[MAX_IO_SPACES];
adsharma@5974 94 EXPORT_SYMBOL(io_space);
adsharma@5974 95 unsigned int num_io_spaces;
adsharma@5974 96
djm@6454 97 /*
djm@6454 98 * "flush_icache_range()" needs to know what processor dependent stride size to use
djm@6454 99 * when it makes i-cache(s) coherent with d-caches.
djm@6454 100 */
djm@6454 101 #define I_CACHE_STRIDE_SHIFT 5 /* Safest way to go: 32 bytes by 32 bytes */
djm@6454 102 unsigned long ia64_i_cache_stride_shift = ~0;
adsharma@5974 103
adsharma@5974 104 /*
adsharma@5974 105 * The merge_mask variable needs to be set to (max(iommu_page_size(iommu)) - 1). This
adsharma@5974 106 * mask specifies a mask of address bits that must be 0 in order for two buffers to be
adsharma@5974 107 * mergeable by the I/O MMU (i.e., the end address of the first buffer and the start
adsharma@5974 108 * address of the second buffer must be aligned to (merge_mask+1) in order to be
adsharma@5974 109 * mergeable). By default, we assume there is no I/O MMU which can merge physically
adsharma@5974 110 * discontiguous buffers, so we set the merge_mask to ~0UL, which corresponds to a iommu
adsharma@5974 111 * page-size of 2^64.
adsharma@5974 112 */
adsharma@5974 113 unsigned long ia64_max_iommu_merge_mask = ~0UL;
adsharma@5974 114 EXPORT_SYMBOL(ia64_max_iommu_merge_mask);
adsharma@5974 115
adsharma@5974 116 /*
adsharma@5974 117 * We use a special marker for the end of memory and it uses the extra (+1) slot
adsharma@5974 118 */
adsharma@5974 119 struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
adsharma@5974 120 int num_rsvd_regions;
adsharma@5974 121
adsharma@5974 122
adsharma@5974 123 /*
adsharma@5974 124 * Filter incoming memory segments based on the primitive map created from the boot
adsharma@5974 125 * parameters. Segments contained in the map are removed from the memory ranges. A
adsharma@5974 126 * caller-specified function is called with the memory ranges that remain after filtering.
adsharma@5974 127 * This routine does not assume the incoming segments are sorted.
adsharma@5974 128 */
adsharma@5974 129 int
adsharma@5974 130 filter_rsvd_memory (unsigned long start, unsigned long end, void *arg)
adsharma@5974 131 {
adsharma@5974 132 unsigned long range_start, range_end, prev_start;
adsharma@5974 133 void (*func)(unsigned long, unsigned long, int);
adsharma@5974 134 int i;
adsharma@5974 135
adsharma@5974 136 #if IGNORE_PFN0
adsharma@5974 137 if (start == PAGE_OFFSET) {
adsharma@5974 138 printk(KERN_WARNING "warning: skipping physical page 0\n");
adsharma@5974 139 start += PAGE_SIZE;
adsharma@5974 140 if (start >= end) return 0;
adsharma@5974 141 }
adsharma@5974 142 #endif
adsharma@5974 143 /*
adsharma@5974 144 * lowest possible address(walker uses virtual)
adsharma@5974 145 */
adsharma@5974 146 prev_start = PAGE_OFFSET;
adsharma@5974 147 func = arg;
adsharma@5974 148
adsharma@5974 149 for (i = 0; i < num_rsvd_regions; ++i) {
adsharma@5974 150 range_start = max(start, prev_start);
adsharma@5974 151 range_end = min(end, rsvd_region[i].start);
adsharma@5974 152
adsharma@5974 153 if (range_start < range_end)
adsharma@5974 154 #ifdef XEN
adsharma@5974 155 {
adsharma@5974 156 /* init_boot_pages requires "ps, pe" */
adsharma@5974 157 printk("Init boot pages: 0x%lx -> 0x%lx.\n",
adsharma@5974 158 __pa(range_start), __pa(range_end));
adsharma@5974 159 (*func)(__pa(range_start), __pa(range_end), 0);
adsharma@5974 160 }
adsharma@5974 161 #else
adsharma@5974 162 call_pernode_memory(__pa(range_start), range_end - range_start, func);
adsharma@5974 163 #endif
adsharma@5974 164
adsharma@5974 165 /* nothing more available in this segment */
adsharma@5974 166 if (range_end == end) return 0;
adsharma@5974 167
adsharma@5974 168 prev_start = rsvd_region[i].end;
adsharma@5974 169 }
adsharma@5974 170 /* end of memory marker allows full processing inside loop body */
adsharma@5974 171 return 0;
adsharma@5974 172 }
adsharma@5974 173
adsharma@5974 174 static void
adsharma@5974 175 sort_regions (struct rsvd_region *rsvd_region, int max)
adsharma@5974 176 {
adsharma@5974 177 int j;
adsharma@5974 178
adsharma@5974 179 /* simple bubble sorting */
adsharma@5974 180 while (max--) {
adsharma@5974 181 for (j = 0; j < max; ++j) {
adsharma@5974 182 if (rsvd_region[j].start > rsvd_region[j+1].start) {
adsharma@5974 183 struct rsvd_region tmp;
adsharma@5974 184 tmp = rsvd_region[j];
adsharma@5974 185 rsvd_region[j] = rsvd_region[j + 1];
adsharma@5974 186 rsvd_region[j + 1] = tmp;
adsharma@5974 187 }
adsharma@5974 188 }
adsharma@5974 189 }
adsharma@5974 190 }
adsharma@5974 191
adsharma@5974 192 /**
adsharma@5974 193 * reserve_memory - setup reserved memory areas
adsharma@5974 194 *
adsharma@5974 195 * Setup the reserved memory areas set aside for the boot parameters,
adsharma@5974 196 * initrd, etc. There are currently %IA64_MAX_RSVD_REGIONS defined,
adsharma@5974 197 * see include/asm-ia64/meminit.h if you need to define more.
adsharma@5974 198 */
adsharma@5974 199 void
adsharma@5974 200 reserve_memory (void)
adsharma@5974 201 {
adsharma@5974 202 int n = 0;
adsharma@5974 203
adsharma@5974 204 /*
adsharma@5974 205 * none of the entries in this table overlap
adsharma@5974 206 */
adsharma@5974 207 rsvd_region[n].start = (unsigned long) ia64_boot_param;
adsharma@5974 208 rsvd_region[n].end = rsvd_region[n].start + sizeof(*ia64_boot_param);
adsharma@5974 209 n++;
adsharma@5974 210
adsharma@5974 211 rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
adsharma@5974 212 rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
adsharma@5974 213 n++;
adsharma@5974 214
adsharma@5974 215 rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
adsharma@5974 216 rsvd_region[n].end = (rsvd_region[n].start
adsharma@5974 217 + strlen(__va(ia64_boot_param->command_line)) + 1);
adsharma@5974 218 n++;
adsharma@5974 219
adsharma@5974 220 rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
adsharma@5974 221 #ifdef XEN
adsharma@5974 222 /* Reserve xen image/bitmap/xen-heap */
adsharma@5974 223 rsvd_region[n].end = rsvd_region[n].start + xenheap_size;
adsharma@5974 224 #else
adsharma@5974 225 rsvd_region[n].end = (unsigned long) ia64_imva(_end);
adsharma@5974 226 #endif
adsharma@5974 227 n++;
adsharma@5974 228
adsharma@5974 229 #ifdef CONFIG_BLK_DEV_INITRD
adsharma@5974 230 if (ia64_boot_param->initrd_start) {
adsharma@5974 231 rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
adsharma@5974 232 rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->initrd_size;
adsharma@5974 233 n++;
adsharma@5974 234 }
adsharma@5974 235 #endif
adsharma@5974 236
adsharma@5974 237 /* end of memory marker */
adsharma@5974 238 rsvd_region[n].start = ~0UL;
adsharma@5974 239 rsvd_region[n].end = ~0UL;
adsharma@5974 240 n++;
adsharma@5974 241
adsharma@5974 242 num_rsvd_regions = n;
adsharma@5974 243
adsharma@5974 244 sort_regions(rsvd_region, num_rsvd_regions);
adsharma@5974 245 }
adsharma@5974 246
adsharma@5974 247 /**
adsharma@5974 248 * find_initrd - get initrd parameters from the boot parameter structure
adsharma@5974 249 *
adsharma@5974 250 * Grab the initrd start and end from the boot parameter struct given us by
adsharma@5974 251 * the boot loader.
adsharma@5974 252 */
adsharma@5974 253 void
adsharma@5974 254 find_initrd (void)
adsharma@5974 255 {
adsharma@5974 256 #ifdef CONFIG_BLK_DEV_INITRD
adsharma@5974 257 if (ia64_boot_param->initrd_start) {
adsharma@5974 258 initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
adsharma@5974 259 initrd_end = initrd_start+ia64_boot_param->initrd_size;
adsharma@5974 260
adsharma@5974 261 printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n",
adsharma@5974 262 initrd_start, ia64_boot_param->initrd_size);
adsharma@5974 263 }
adsharma@5974 264 #endif
adsharma@5974 265 }
adsharma@5974 266
adsharma@5974 267 static void __init
adsharma@5974 268 io_port_init (void)
adsharma@5974 269 {
adsharma@5974 270 extern unsigned long ia64_iobase;
adsharma@5974 271 unsigned long phys_iobase;
adsharma@5974 272
adsharma@5974 273 /*
adsharma@5974 274 * Set `iobase' to the appropriate address in region 6 (uncached access range).
adsharma@5974 275 *
adsharma@5974 276 * The EFI memory map is the "preferred" location to get the I/O port space base,
adsharma@5974 277 * rather the relying on AR.KR0. This should become more clear in future SAL
adsharma@5974 278 * specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is
adsharma@5974 279 * found in the memory map.
adsharma@5974 280 */
adsharma@5974 281 phys_iobase = efi_get_iobase();
adsharma@5974 282 if (phys_iobase)
adsharma@5974 283 /* set AR.KR0 since this is all we use it for anyway */
fred@5987 284 ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
adsharma@5974 285 else {
fred@5987 286 phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
adsharma@5974 287 printk(KERN_INFO "No I/O port range found in EFI memory map, falling back "
adsharma@5974 288 "to AR.KR0\n");
adsharma@5974 289 printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
adsharma@5974 290 }
adsharma@5974 291 ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
adsharma@5974 292
adsharma@5974 293 /* setup legacy IO port space */
adsharma@5974 294 io_space[0].mmio_base = ia64_iobase;
adsharma@5974 295 io_space[0].sparse = 1;
adsharma@5974 296 num_io_spaces = 1;
adsharma@5974 297 }
adsharma@5974 298
adsharma@5974 299 /**
adsharma@5974 300 * early_console_setup - setup debugging console
adsharma@5974 301 *
adsharma@5974 302 * Consoles started here require little enough setup that we can start using
adsharma@5974 303 * them very early in the boot process, either right after the machine
adsharma@5974 304 * vector initialization, or even before if the drivers can detect their hw.
adsharma@5974 305 *
adsharma@5974 306 * Returns non-zero if a console couldn't be setup.
adsharma@5974 307 */
adsharma@5974 308 static inline int __init
adsharma@5974 309 early_console_setup (char *cmdline)
adsharma@5974 310 {
djm@6454 311 int earlycons = 0;
djm@6454 312
adsharma@5974 313 #ifdef CONFIG_SERIAL_SGI_L1_CONSOLE
adsharma@5974 314 {
adsharma@5974 315 extern int sn_serial_console_early_setup(void);
adsharma@5974 316 if (!sn_serial_console_early_setup())
djm@6454 317 earlycons++;
adsharma@5974 318 }
adsharma@5974 319 #endif
adsharma@5974 320 #ifdef CONFIG_EFI_PCDP
adsharma@5974 321 if (!efi_setup_pcdp_console(cmdline))
djm@6454 322 earlycons++;
adsharma@5974 323 #endif
adsharma@5974 324 #ifdef CONFIG_SERIAL_8250_CONSOLE
adsharma@5974 325 if (!early_serial_console_init(cmdline))
djm@6454 326 earlycons++;
adsharma@5974 327 #endif
adsharma@5974 328
djm@6454 329 return (earlycons) ? 0 : -1;
adsharma@5974 330 }
adsharma@5974 331
adsharma@5974 332 static inline void
adsharma@5974 333 mark_bsp_online (void)
adsharma@5974 334 {
adsharma@5974 335 #ifdef CONFIG_SMP
adsharma@5974 336 /* If we register an early console, allow CPU 0 to printk */
adsharma@5974 337 cpu_set(smp_processor_id(), cpu_online_map);
adsharma@5974 338 #endif
adsharma@5974 339 }
adsharma@5974 340
djm@6454 341 #ifdef CONFIG_SMP
djm@6454 342 static void
djm@6454 343 check_for_logical_procs (void)
djm@6454 344 {
djm@6454 345 pal_logical_to_physical_t info;
djm@6454 346 s64 status;
djm@6454 347
djm@6454 348 status = ia64_pal_logical_to_phys(0, &info);
djm@6454 349 if (status == -1) {
djm@6454 350 printk(KERN_INFO "No logical to physical processor mapping "
djm@6454 351 "available\n");
djm@6454 352 return;
djm@6454 353 }
djm@6454 354 if (status) {
djm@6454 355 printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
djm@6454 356 status);
djm@6454 357 return;
djm@6454 358 }
djm@6454 359 /*
djm@6454 360 * Total number of siblings that BSP has. Though not all of them
djm@6454 361 * may have booted successfully. The correct number of siblings
djm@6454 362 * booted is in info.overview_num_log.
djm@6454 363 */
djm@6454 364 smp_num_siblings = info.overview_tpc;
djm@6454 365 smp_num_cpucores = info.overview_cpp;
djm@6454 366 }
djm@6454 367 #endif
djm@6454 368
djm@7332 369 void __init
adsharma@5974 370 #ifdef XEN
adsharma@5974 371 early_setup_arch (char **cmdline_p)
adsharma@5974 372 #else
adsharma@5974 373 setup_arch (char **cmdline_p)
adsharma@5974 374 #endif
adsharma@5974 375 {
adsharma@5974 376 unw_init();
adsharma@5974 377
adsharma@5974 378 ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
adsharma@5974 379
adsharma@5974 380 *cmdline_p = __va(ia64_boot_param->command_line);
djm@7332 381 #ifndef XEN
adsharma@5974 382 strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
djm@7332 383 #endif
adsharma@5974 384
adsharma@5974 385 efi_init();
adsharma@5974 386 io_port_init();
adsharma@5974 387
adsharma@5974 388 #ifdef CONFIG_IA64_GENERIC
adsharma@5974 389 {
adsharma@5974 390 const char *mvec_name = strstr (*cmdline_p, "machvec=");
adsharma@5974 391 char str[64];
adsharma@5974 392
adsharma@5974 393 if (mvec_name) {
adsharma@5974 394 const char *end;
adsharma@5974 395 size_t len;
adsharma@5974 396
adsharma@5974 397 mvec_name += 8;
adsharma@5974 398 end = strchr (mvec_name, ' ');
adsharma@5974 399 if (end)
adsharma@5974 400 len = end - mvec_name;
adsharma@5974 401 else
adsharma@5974 402 len = strlen (mvec_name);
adsharma@5974 403 len = min(len, sizeof (str) - 1);
adsharma@5974 404 strncpy (str, mvec_name, len);
adsharma@5974 405 str[len] = '\0';
adsharma@5974 406 mvec_name = str;
adsharma@5974 407 } else
adsharma@5974 408 mvec_name = acpi_get_sysname();
adsharma@5974 409 machvec_init(mvec_name);
adsharma@5974 410 }
adsharma@5974 411 #endif
adsharma@5974 412
adsharma@5974 413 #ifdef XEN
adsharma@5974 414 early_cmdline_parse(cmdline_p);
adsharma@5974 415 cmdline_parse(*cmdline_p);
adsharma@5974 416 #endif
adsharma@5974 417 if (early_console_setup(*cmdline_p) == 0)
adsharma@5974 418 mark_bsp_online();
adsharma@5974 419
djm@7332 420 #ifdef XEN
djm@7332 421 }
djm@7332 422
djm@7332 423 void __init
djm@7332 424 late_setup_arch (char **cmdline_p)
djm@7332 425 {
djm@7332 426 #endif
adsharma@5974 427 #ifdef CONFIG_ACPI_BOOT
adsharma@5974 428 /* Initialize the ACPI boot-time table parser */
adsharma@5974 429 acpi_table_init();
adsharma@5974 430 # ifdef CONFIG_ACPI_NUMA
adsharma@5974 431 acpi_numa_init();
adsharma@5974 432 # endif
adsharma@5974 433 #else
adsharma@5974 434 # ifdef CONFIG_SMP
adsharma@5974 435 smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
adsharma@5974 436 # endif
adsharma@5974 437 #endif /* CONFIG_APCI_BOOT */
adsharma@5974 438
adsharma@5974 439 #ifndef XEN
adsharma@5974 440 find_memory();
djm@7332 441 #endif
adsharma@5974 442
adsharma@5974 443 /* process SAL system table: */
adsharma@5974 444 ia64_sal_init(efi.sal_systab);
adsharma@5974 445
adsharma@5974 446 #ifdef CONFIG_SMP
djm@7332 447 #ifdef XEN
djm@7332 448 init_smp_config ();
djm@7332 449 #endif
djm@7332 450
adsharma@5974 451 cpu_physical_id(0) = hard_smp_processor_id();
djm@6454 452
djm@6454 453 cpu_set(0, cpu_sibling_map[0]);
djm@6454 454 cpu_set(0, cpu_core_map[0]);
djm@6454 455
djm@6454 456 check_for_logical_procs();
djm@6454 457 if (smp_num_cpucores > 1)
djm@6454 458 printk(KERN_INFO
djm@6454 459 "cpu package is Multi-Core capable: number of cores=%d\n",
djm@6454 460 smp_num_cpucores);
djm@6454 461 if (smp_num_siblings > 1)
djm@6454 462 printk(KERN_INFO
djm@6454 463 "cpu package is Multi-Threading capable: number of siblings=%d\n",
djm@6454 464 smp_num_siblings);
adsharma@5974 465 #endif
adsharma@5974 466
fred@5986 467 #ifdef XEN
adsharma@5974 468 identify_vmx_feature();
fred@5986 469 #endif
adsharma@5974 470
adsharma@5974 471 cpu_init(); /* initialize the bootstrap CPU */
adsharma@5974 472
adsharma@5974 473 #ifdef CONFIG_ACPI_BOOT
adsharma@5974 474 acpi_boot_init();
adsharma@5974 475 #endif
adsharma@5974 476
adsharma@5974 477 #ifdef CONFIG_VT
adsharma@5974 478 if (!conswitchp) {
adsharma@5974 479 # if defined(CONFIG_DUMMY_CONSOLE)
adsharma@5974 480 conswitchp = &dummy_con;
adsharma@5974 481 # endif
adsharma@5974 482 # if defined(CONFIG_VGA_CONSOLE)
adsharma@5974 483 /*
adsharma@5974 484 * Non-legacy systems may route legacy VGA MMIO range to system
adsharma@5974 485 * memory. vga_con probes the MMIO hole, so memory looks like
adsharma@5974 486 * a VGA device to it. The EFI memory map can tell us if it's
adsharma@5974 487 * memory so we can avoid this problem.
adsharma@5974 488 */
adsharma@5974 489 if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
adsharma@5974 490 conswitchp = &vga_con;
adsharma@5974 491 # endif
adsharma@5974 492 }
adsharma@5974 493 #endif
adsharma@5974 494
adsharma@5974 495 /* enable IA-64 Machine Check Abort Handling unless disabled */
adsharma@5974 496 if (!strstr(saved_command_line, "nomca"))
adsharma@5974 497 ia64_mca_init();
adsharma@5974 498
adsharma@5974 499 platform_setup(cmdline_p);
adsharma@5974 500 paging_init();
adsharma@5974 501 }
adsharma@5974 502
adsharma@5974 503 /*
adsharma@5974 504 * Display cpu info for all cpu's.
adsharma@5974 505 */
adsharma@5974 506 static int
adsharma@5974 507 show_cpuinfo (struct seq_file *m, void *v)
adsharma@5974 508 {
adsharma@5974 509 #ifdef CONFIG_SMP
adsharma@5974 510 # define lpj c->loops_per_jiffy
adsharma@5974 511 # define cpunum c->cpu
adsharma@5974 512 #else
adsharma@5974 513 # define lpj loops_per_jiffy
adsharma@5974 514 # define cpunum 0
adsharma@5974 515 #endif
adsharma@5974 516 static struct {
adsharma@5974 517 unsigned long mask;
adsharma@5974 518 const char *feature_name;
adsharma@5974 519 } feature_bits[] = {
adsharma@5974 520 { 1UL << 0, "branchlong" },
adsharma@5974 521 { 1UL << 1, "spontaneous deferral"},
adsharma@5974 522 { 1UL << 2, "16-byte atomic ops" }
adsharma@5974 523 };
adsharma@5974 524 char family[32], features[128], *cp, sep;
adsharma@5974 525 struct cpuinfo_ia64 *c = v;
adsharma@5974 526 unsigned long mask;
adsharma@5974 527 int i;
adsharma@5974 528
adsharma@5974 529 mask = c->features;
adsharma@5974 530
adsharma@5974 531 switch (c->family) {
adsharma@5974 532 case 0x07: memcpy(family, "Itanium", 8); break;
adsharma@5974 533 case 0x1f: memcpy(family, "Itanium 2", 10); break;
adsharma@5974 534 default: sprintf(family, "%u", c->family); break;
adsharma@5974 535 }
adsharma@5974 536
adsharma@5974 537 /* build the feature string: */
adsharma@5974 538 memcpy(features, " standard", 10);
adsharma@5974 539 cp = features;
adsharma@5974 540 sep = 0;
adsharma@5974 541 for (i = 0; i < (int) ARRAY_SIZE(feature_bits); ++i) {
adsharma@5974 542 if (mask & feature_bits[i].mask) {
adsharma@5974 543 if (sep)
adsharma@5974 544 *cp++ = sep;
adsharma@5974 545 sep = ',';
adsharma@5974 546 *cp++ = ' ';
adsharma@5974 547 strcpy(cp, feature_bits[i].feature_name);
adsharma@5974 548 cp += strlen(feature_bits[i].feature_name);
adsharma@5974 549 mask &= ~feature_bits[i].mask;
adsharma@5974 550 }
adsharma@5974 551 }
adsharma@5974 552 if (mask) {
adsharma@5974 553 /* print unknown features as a hex value: */
adsharma@5974 554 if (sep)
adsharma@5974 555 *cp++ = sep;
adsharma@5974 556 sprintf(cp, " 0x%lx", mask);
adsharma@5974 557 }
adsharma@5974 558
adsharma@5974 559 seq_printf(m,
adsharma@5974 560 "processor : %d\n"
adsharma@5974 561 "vendor : %s\n"
adsharma@5974 562 "arch : IA-64\n"
adsharma@5974 563 "family : %s\n"
adsharma@5974 564 "model : %u\n"
adsharma@5974 565 "revision : %u\n"
adsharma@5974 566 "archrev : %u\n"
adsharma@5974 567 "features :%s\n" /* don't change this---it _is_ right! */
adsharma@5974 568 "cpu number : %lu\n"
adsharma@5974 569 "cpu regs : %u\n"
adsharma@5974 570 "cpu MHz : %lu.%06lu\n"
adsharma@5974 571 "itc MHz : %lu.%06lu\n"
djm@6454 572 "BogoMIPS : %lu.%02lu\n",
adsharma@5974 573 cpunum, c->vendor, family, c->model, c->revision, c->archrev,
adsharma@5974 574 features, c->ppn, c->number,
adsharma@5974 575 c->proc_freq / 1000000, c->proc_freq % 1000000,
adsharma@5974 576 c->itc_freq / 1000000, c->itc_freq % 1000000,
adsharma@5974 577 lpj*HZ/500000, (lpj*HZ/5000) % 100);
djm@6454 578 #ifdef CONFIG_SMP
djm@6454 579 seq_printf(m, "siblings : %u\n", c->num_log);
djm@6454 580 if (c->threads_per_core > 1 || c->cores_per_socket > 1)
djm@6454 581 seq_printf(m,
djm@6454 582 "physical id: %u\n"
djm@6454 583 "core id : %u\n"
djm@6454 584 "thread id : %u\n",
djm@6454 585 c->socket_id, c->core_id, c->thread_id);
djm@6454 586 #endif
djm@6454 587 seq_printf(m,"\n");
djm@6454 588
adsharma@5974 589 return 0;
adsharma@5974 590 }
adsharma@5974 591
adsharma@5974 592 static void *
adsharma@5974 593 c_start (struct seq_file *m, loff_t *pos)
adsharma@5974 594 {
adsharma@5974 595 #ifdef CONFIG_SMP
adsharma@5974 596 while (*pos < NR_CPUS && !cpu_isset(*pos, cpu_online_map))
adsharma@5974 597 ++*pos;
adsharma@5974 598 #endif
adsharma@5974 599 return *pos < NR_CPUS ? cpu_data(*pos) : NULL;
adsharma@5974 600 }
adsharma@5974 601
adsharma@5974 602 static void *
adsharma@5974 603 c_next (struct seq_file *m, void *v, loff_t *pos)
adsharma@5974 604 {
adsharma@5974 605 ++*pos;
adsharma@5974 606 return c_start(m, pos);
adsharma@5974 607 }
adsharma@5974 608
adsharma@5974 609 static void
adsharma@5974 610 c_stop (struct seq_file *m, void *v)
adsharma@5974 611 {
adsharma@5974 612 }
adsharma@5974 613
adsharma@5974 614 #ifndef XEN
adsharma@5974 615 struct seq_operations cpuinfo_op = {
adsharma@5974 616 .start = c_start,
adsharma@5974 617 .next = c_next,
adsharma@5974 618 .stop = c_stop,
adsharma@5974 619 .show = show_cpuinfo
adsharma@5974 620 };
adsharma@5974 621 #endif
adsharma@5974 622
adsharma@5974 623 void
adsharma@5974 624 identify_cpu (struct cpuinfo_ia64 *c)
adsharma@5974 625 {
adsharma@5974 626 union {
adsharma@5974 627 unsigned long bits[5];
adsharma@5974 628 struct {
adsharma@5974 629 /* id 0 & 1: */
adsharma@5974 630 char vendor[16];
adsharma@5974 631
adsharma@5974 632 /* id 2 */
adsharma@5974 633 u64 ppn; /* processor serial number */
adsharma@5974 634
adsharma@5974 635 /* id 3: */
adsharma@5974 636 unsigned number : 8;
adsharma@5974 637 unsigned revision : 8;
adsharma@5974 638 unsigned model : 8;
adsharma@5974 639 unsigned family : 8;
adsharma@5974 640 unsigned archrev : 8;
adsharma@5974 641 unsigned reserved : 24;
adsharma@5974 642
adsharma@5974 643 /* id 4: */
adsharma@5974 644 u64 features;
adsharma@5974 645 } field;
adsharma@5974 646 } cpuid;
adsharma@5974 647 pal_vm_info_1_u_t vm1;
adsharma@5974 648 pal_vm_info_2_u_t vm2;
adsharma@5974 649 pal_status_t status;
adsharma@5974 650 unsigned long impl_va_msb = 50, phys_addr_size = 44; /* Itanium defaults */
adsharma@5974 651 int i;
adsharma@5974 652
adsharma@5974 653 for (i = 0; i < 5; ++i)
adsharma@5974 654 cpuid.bits[i] = ia64_get_cpuid(i);
adsharma@5974 655
adsharma@5974 656 memcpy(c->vendor, cpuid.field.vendor, 16);
adsharma@5974 657 #ifdef CONFIG_SMP
adsharma@5974 658 c->cpu = smp_processor_id();
djm@6454 659
djm@6454 660 /* below default values will be overwritten by identify_siblings()
djm@6454 661 * for Multi-Threading/Multi-Core capable cpu's
djm@6454 662 */
djm@6454 663 c->threads_per_core = c->cores_per_socket = c->num_log = 1;
djm@6454 664 c->socket_id = -1;
djm@6454 665
djm@6454 666 identify_siblings(c);
adsharma@5974 667 #endif
adsharma@5974 668 c->ppn = cpuid.field.ppn;
adsharma@5974 669 c->number = cpuid.field.number;
adsharma@5974 670 c->revision = cpuid.field.revision;
adsharma@5974 671 c->model = cpuid.field.model;
adsharma@5974 672 c->family = cpuid.field.family;
adsharma@5974 673 c->archrev = cpuid.field.archrev;
adsharma@5974 674 c->features = cpuid.field.features;
adsharma@5974 675
adsharma@5974 676 status = ia64_pal_vm_summary(&vm1, &vm2);
adsharma@5974 677 if (status == PAL_STATUS_SUCCESS) {
adsharma@5974 678 impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
adsharma@5974 679 phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
adsharma@5974 680 }
adsharma@5974 681 c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
adsharma@5974 682 c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
adsharma@5974 683
fred@5986 684 #ifdef XEN
adsharma@5974 685 /* If vmx feature is on, do necessary initialization for vmx */
adsharma@5974 686 if (vmx_enabled)
adsharma@5974 687 vmx_init_env();
adsharma@5974 688 #endif
adsharma@5974 689 }
adsharma@5974 690
adsharma@5974 691 void
adsharma@5974 692 setup_per_cpu_areas (void)
adsharma@5974 693 {
adsharma@5974 694 /* start_kernel() requires this... */
adsharma@5974 695 }
adsharma@5974 696
djm@6454 697 /*
djm@6454 698 * Calculate the max. cache line size.
djm@6454 699 *
djm@6454 700 * In addition, the minimum of the i-cache stride sizes is calculated for
djm@6454 701 * "flush_icache_range()".
djm@6454 702 */
adsharma@5974 703 static void
adsharma@5974 704 get_max_cacheline_size (void)
adsharma@5974 705 {
adsharma@5974 706 unsigned long line_size, max = 1;
adsharma@5974 707 u64 l, levels, unique_caches;
adsharma@5974 708 pal_cache_config_info_t cci;
adsharma@5974 709 s64 status;
adsharma@5974 710
adsharma@5974 711 status = ia64_pal_cache_summary(&levels, &unique_caches);
adsharma@5974 712 if (status != 0) {
adsharma@5974 713 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
adsharma@5974 714 __FUNCTION__, status);
adsharma@5974 715 max = SMP_CACHE_BYTES;
djm@6454 716 /* Safest setup for "flush_icache_range()" */
djm@6454 717 ia64_i_cache_stride_shift = I_CACHE_STRIDE_SHIFT;
adsharma@5974 718 goto out;
adsharma@5974 719 }
adsharma@5974 720
adsharma@5974 721 for (l = 0; l < levels; ++l) {
adsharma@5974 722 status = ia64_pal_cache_config_info(l, /* cache_type (data_or_unified)= */ 2,
adsharma@5974 723 &cci);
adsharma@5974 724 if (status != 0) {
adsharma@5974 725 printk(KERN_ERR
djm@6454 726 "%s: ia64_pal_cache_config_info(l=%lu, 2) failed (status=%ld)\n",
adsharma@5974 727 __FUNCTION__, l, status);
adsharma@5974 728 max = SMP_CACHE_BYTES;
djm@6454 729 /* The safest setup for "flush_icache_range()" */
djm@6454 730 cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
djm@6454 731 cci.pcci_unified = 1;
adsharma@5974 732 }
adsharma@5974 733 line_size = 1 << cci.pcci_line_size;
adsharma@5974 734 if (line_size > max)
adsharma@5974 735 max = line_size;
djm@6454 736 if (!cci.pcci_unified) {
djm@6454 737 status = ia64_pal_cache_config_info(l,
djm@6454 738 /* cache_type (instruction)= */ 1,
djm@6454 739 &cci);
djm@6454 740 if (status != 0) {
djm@6454 741 printk(KERN_ERR
djm@6454 742 "%s: ia64_pal_cache_config_info(l=%lu, 1) failed (status=%ld)\n",
djm@6454 743 __FUNCTION__, l, status);
djm@6454 744 /* The safest setup for "flush_icache_range()" */
djm@6454 745 cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
djm@6454 746 }
djm@6454 747 }
djm@6454 748 if (cci.pcci_stride < ia64_i_cache_stride_shift)
djm@6454 749 ia64_i_cache_stride_shift = cci.pcci_stride;
djm@6454 750 }
adsharma@5974 751 out:
adsharma@5974 752 if (max > ia64_max_cacheline_size)
adsharma@5974 753 ia64_max_cacheline_size = max;
adsharma@5974 754 }
adsharma@5974 755
adsharma@5974 756 /*
adsharma@5974 757 * cpu_init() initializes state that is per-CPU. This function acts
adsharma@5974 758 * as a 'CPU state barrier', nothing should get across.
adsharma@5974 759 */
adsharma@5974 760 void
adsharma@5974 761 cpu_init (void)
adsharma@5974 762 {
adsharma@5974 763 extern void __devinit ia64_mmu_init (void *);
adsharma@5974 764 unsigned long num_phys_stacked;
adsharma@5974 765 pal_vm_info_2_u_t vmi;
adsharma@5974 766 unsigned int max_ctx;
adsharma@5974 767 struct cpuinfo_ia64 *cpu_info;
adsharma@5974 768 void *cpu_data;
adsharma@5974 769
adsharma@5974 770 cpu_data = per_cpu_init();
adsharma@5974 771
djm@7332 772 #ifdef XEN
djm@7332 773 printf ("cpu_init: current=%p, current->domain->arch.mm=%p\n",
djm@7332 774 current, current->domain->arch.mm);
djm@7332 775 #endif
djm@7332 776
adsharma@5974 777 /*
adsharma@5974 778 * We set ar.k3 so that assembly code in MCA handler can compute
adsharma@5974 779 * physical addresses of per cpu variables with a simple:
adsharma@5974 780 * phys = ar.k3 + &per_cpu_var
adsharma@5974 781 */
fred@5987 782 ia64_set_kr(IA64_KR_PER_CPU_DATA,
fred@5987 783 ia64_tpa(cpu_data) - (long) __per_cpu_start);
adsharma@5974 784
adsharma@5974 785 get_max_cacheline_size();
adsharma@5974 786
adsharma@5974 787 /*
adsharma@5974 788 * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
adsharma@5974 789 * ia64_mmu_init() yet. And we can't call ia64_mmu_init() first because it
adsharma@5974 790 * depends on the data returned by identify_cpu(). We break the dependency by
adsharma@5974 791 * accessing cpu_data() through the canonical per-CPU address.
adsharma@5974 792 */
adsharma@5974 793 cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(cpu_info) - __per_cpu_start);
adsharma@5974 794 identify_cpu(cpu_info);
adsharma@5974 795
adsharma@5974 796 #ifdef CONFIG_MCKINLEY
adsharma@5974 797 {
adsharma@5974 798 # define FEATURE_SET 16
adsharma@5974 799 struct ia64_pal_retval iprv;
adsharma@5974 800
adsharma@5974 801 if (cpu_info->family == 0x1f) {
adsharma@5974 802 PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
adsharma@5974 803 if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
adsharma@5974 804 PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
adsharma@5974 805 (iprv.v1 | 0x80), FEATURE_SET, 0);
adsharma@5974 806 }
adsharma@5974 807 }
adsharma@5974 808 #endif
adsharma@5974 809
adsharma@5974 810 /* Clear the stack memory reserved for pt_regs: */
adsharma@5974 811 memset(ia64_task_regs(current), 0, sizeof(struct pt_regs));
adsharma@5974 812
fred@5987 813 ia64_set_kr(IA64_KR_FPU_OWNER, 0);
adsharma@5974 814
adsharma@5974 815 /*
djm@6454 816 * Initialize the page-table base register to a global
djm@6454 817 * directory with all zeroes. This ensure that we can handle
djm@6454 818 * TLB-misses to user address-space even before we created the
djm@6454 819 * first user address-space. This may happen, e.g., due to
djm@6454 820 * aggressive use of lfetch.fault.
djm@6454 821 */
djm@6454 822 ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
djm@6454 823
djm@6454 824 /*
djm@6454 825 * Initialize default control register to defer speculative faults except
djm@6454 826 * for those arising from TLB misses, which are not deferred. The
adsharma@5974 827 * kernel MUST NOT depend on a particular setting of these bits (in other words,
adsharma@5974 828 * the kernel must have recovery code for all speculative accesses). Turn on
adsharma@5974 829 * dcr.lc as per recommendation by the architecture team. Most IA-32 apps
adsharma@5974 830 * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
adsharma@5974 831 * be fine).
adsharma@5974 832 */
djm@6869 833 #ifdef XEN
djm@6869 834 ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
djm@6869 835 | IA64_DCR_PP | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
djm@6869 836 #else
adsharma@5974 837 ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
adsharma@5974 838 | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
djm@6869 839 #endif
adsharma@5974 840 atomic_inc(&init_mm.mm_count);
adsharma@5974 841 current->active_mm = &init_mm;
adsharma@5974 842 #ifdef XEN
adsharma@5974 843 if (current->domain->arch.mm)
adsharma@5974 844 #else
adsharma@5974 845 if (current->mm)
adsharma@5974 846 #endif
adsharma@5974 847 BUG();
adsharma@5974 848
adsharma@5974 849 ia64_mmu_init(ia64_imva(cpu_data));
adsharma@5974 850 ia64_mca_cpu_init(ia64_imva(cpu_data));
adsharma@5974 851
adsharma@5974 852 #ifdef CONFIG_IA32_SUPPORT
adsharma@5974 853 ia32_cpu_init();
adsharma@5974 854 #endif
adsharma@5974 855
adsharma@5974 856 /* Clear ITC to eliminiate sched_clock() overflows in human time. */
adsharma@5974 857 ia64_set_itc(0);
adsharma@5974 858
adsharma@5974 859 /* disable all local interrupt sources: */
adsharma@5974 860 ia64_set_itv(1 << 16);
adsharma@5974 861 ia64_set_lrr0(1 << 16);
adsharma@5974 862 ia64_set_lrr1(1 << 16);
adsharma@5974 863 ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
adsharma@5974 864 ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
adsharma@5974 865
adsharma@5974 866 /* clear TPR & XTP to enable all interrupt classes: */
adsharma@5974 867 ia64_setreg(_IA64_REG_CR_TPR, 0);
adsharma@5974 868 #ifdef CONFIG_SMP
adsharma@5974 869 normal_xtp();
adsharma@5974 870 #endif
adsharma@5974 871
adsharma@5974 872 /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
adsharma@5974 873 if (ia64_pal_vm_summary(NULL, &vmi) == 0)
adsharma@5974 874 max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
adsharma@5974 875 else {
adsharma@5974 876 printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
adsharma@5974 877 max_ctx = (1U << 15) - 1; /* use architected minimum */
adsharma@5974 878 }
adsharma@5974 879 while (max_ctx < ia64_ctx.max_ctx) {
adsharma@5974 880 unsigned int old = ia64_ctx.max_ctx;
adsharma@5974 881 if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
adsharma@5974 882 break;
adsharma@5974 883 }
adsharma@5974 884
adsharma@5974 885 if (ia64_pal_rse_info(&num_phys_stacked, NULL) != 0) {
adsharma@5974 886 printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
adsharma@5974 887 "stacked regs\n");
adsharma@5974 888 num_phys_stacked = 96;
adsharma@5974 889 }
adsharma@5974 890 /* size of physical stacked register partition plus 8 bytes: */
adsharma@5974 891 __get_cpu_var(ia64_phys_stacked_size_p8) = num_phys_stacked*8 + 8;
adsharma@5974 892 platform_cpu_init();
djm@6454 893 #ifndef XEN
djm@6454 894 pm_idle = default_idle;
djm@6454 895 #endif
djm@7332 896
djm@7332 897 #ifdef XEN
djm@7332 898 /* surrender usage of kernel registers to domain, use percpu area instead */
djm@7332 899 __get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE] = ia64_get_kr(IA64_KR_IO_BASE);
djm@7332 900 __get_cpu_var(cpu_kr)._kr[IA64_KR_PER_CPU_DATA] = ia64_get_kr(IA64_KR_PER_CPU_DATA);
djm@7332 901 __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT_STACK] = ia64_get_kr(IA64_KR_CURRENT_STACK);
djm@7332 902 __get_cpu_var(cpu_kr)._kr[IA64_KR_FPU_OWNER] = ia64_get_kr(IA64_KR_FPU_OWNER);
djm@7332 903 __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT] = ia64_get_kr(IA64_KR_CURRENT);
djm@7332 904 __get_cpu_var(cpu_kr)._kr[IA64_KR_PT_BASE] = ia64_get_kr(IA64_KR_PT_BASE);
djm@7332 905 #endif
adsharma@5974 906 }
adsharma@5974 907
adsharma@5974 908 void
adsharma@5974 909 check_bugs (void)
adsharma@5974 910 {
adsharma@5974 911 ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
adsharma@5974 912 (unsigned long) __end___mckinley_e9_bundles);
adsharma@5974 913 }