ia64/xen-unstable

annotate xen/arch/ia64/linux-xen/setup.c @ 5986:1ec2225aa8c6

First step to remove CONFIG_VTI for final supporting xen0+xenU+xenVTI at runtime. This changeset mainly addresses common code like domain creation and rid allocation policy, including:

- Boot time vti feature detection
- Uniform arch_do_createdomain, new_thread, arch_set_infoguest, and construct_dom0. Now these function level CONFIG_VTIs have been removed with several specific lines still protected by CONFIG_VTIs. With more feature cleanup later, these lines will be free out grandually.
- Use same rid allocation policy including physical emulation
- Remove duplicated definition rr_t.

Verified breaking nothing. ;-)

Signed-off-by Kevin Tian <kevin.tian@intel.com>
author fred@xuni-t01.sc.intel.com
date Fri Aug 19 21:19:39 2005 -0800 (2005-08-19)
parents 97675c2dbb40
children 5f1ed597f107
rev   line source
adsharma@5974 1 /*
adsharma@5974 2 * Architecture-specific setup.
adsharma@5974 3 *
adsharma@5974 4 * Copyright (C) 1998-2001, 2003-2004 Hewlett-Packard Co
adsharma@5974 5 * David Mosberger-Tang <davidm@hpl.hp.com>
adsharma@5974 6 * Stephane Eranian <eranian@hpl.hp.com>
adsharma@5974 7 * Copyright (C) 2000, Rohit Seth <rohit.seth@intel.com>
adsharma@5974 8 * Copyright (C) 1999 VA Linux Systems
adsharma@5974 9 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
adsharma@5974 10 *
adsharma@5974 11 * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
adsharma@5974 12 * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
adsharma@5974 13 * 03/31/00 R.Seth cpu_initialized and current->processor fixes
adsharma@5974 14 * 02/04/00 D.Mosberger some more get_cpuinfo fixes...
adsharma@5974 15 * 02/01/00 R.Seth fixed get_cpuinfo for SMP
adsharma@5974 16 * 01/07/99 S.Eranian added the support for command line argument
adsharma@5974 17 * 06/24/99 W.Drummond added boot_cpu_data.
adsharma@5974 18 */
adsharma@5974 19 #include <linux/config.h>
adsharma@5974 20 #include <linux/module.h>
adsharma@5974 21 #include <linux/init.h>
adsharma@5974 22
adsharma@5974 23 #include <linux/acpi.h>
adsharma@5974 24 #include <linux/bootmem.h>
adsharma@5974 25 #include <linux/console.h>
adsharma@5974 26 #include <linux/delay.h>
adsharma@5974 27 #include <linux/kernel.h>
adsharma@5974 28 #include <linux/reboot.h>
adsharma@5974 29 #include <linux/sched.h>
adsharma@5974 30 #include <linux/seq_file.h>
adsharma@5974 31 #include <linux/string.h>
adsharma@5974 32 #include <linux/threads.h>
adsharma@5974 33 #include <linux/tty.h>
adsharma@5974 34 #include <linux/serial.h>
adsharma@5974 35 #include <linux/serial_core.h>
adsharma@5974 36 #include <linux/efi.h>
adsharma@5974 37 #include <linux/initrd.h>
adsharma@5974 38
adsharma@5974 39 #include <asm/ia32.h>
adsharma@5974 40 #include <asm/machvec.h>
adsharma@5974 41 #include <asm/mca.h>
adsharma@5974 42 #include <asm/meminit.h>
adsharma@5974 43 #include <asm/page.h>
adsharma@5974 44 #include <asm/patch.h>
adsharma@5974 45 #include <asm/pgtable.h>
adsharma@5974 46 #include <asm/processor.h>
adsharma@5974 47 #include <asm/sal.h>
adsharma@5974 48 #include <asm/sections.h>
adsharma@5974 49 #include <asm/serial.h>
adsharma@5974 50 #include <asm/setup.h>
adsharma@5974 51 #include <asm/smp.h>
adsharma@5974 52 #include <asm/system.h>
adsharma@5974 53 #include <asm/unistd.h>
adsharma@5974 54 #include <asm/vmx.h>
adsharma@5974 55 #include <asm/io.h>
adsharma@5974 56
adsharma@5974 57 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
adsharma@5974 58 # error "struct cpuinfo_ia64 too big!"
adsharma@5974 59 #endif
adsharma@5974 60
adsharma@5974 61 #ifdef CONFIG_SMP
adsharma@5974 62 unsigned long __per_cpu_offset[NR_CPUS];
adsharma@5974 63 EXPORT_SYMBOL(__per_cpu_offset);
adsharma@5974 64 #endif
adsharma@5974 65
adsharma@5974 66 DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
ydong@5982 67 DEFINE_PER_CPU(cpu_kr_ia64_t, cpu_kr);
adsharma@5974 68 DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
adsharma@5974 69 DEFINE_PER_CPU(unsigned long, ia64_phys_stacked_size_p8);
adsharma@5974 70 unsigned long ia64_cycles_per_usec;
adsharma@5974 71 struct ia64_boot_param *ia64_boot_param;
adsharma@5974 72 struct screen_info screen_info;
adsharma@5974 73
adsharma@5974 74 unsigned long ia64_max_cacheline_size;
adsharma@5974 75 unsigned long ia64_iobase; /* virtual address for I/O accesses */
adsharma@5974 76 EXPORT_SYMBOL(ia64_iobase);
adsharma@5974 77 struct io_space io_space[MAX_IO_SPACES];
adsharma@5974 78 EXPORT_SYMBOL(io_space);
adsharma@5974 79 unsigned int num_io_spaces;
adsharma@5974 80
adsharma@5974 81 unsigned char aux_device_present = 0xaa; /* XXX remove this when legacy I/O is gone */
adsharma@5974 82
adsharma@5974 83 /*
adsharma@5974 84 * The merge_mask variable needs to be set to (max(iommu_page_size(iommu)) - 1). This
adsharma@5974 85 * mask specifies a mask of address bits that must be 0 in order for two buffers to be
adsharma@5974 86 * mergeable by the I/O MMU (i.e., the end address of the first buffer and the start
adsharma@5974 87 * address of the second buffer must be aligned to (merge_mask+1) in order to be
adsharma@5974 88 * mergeable). By default, we assume there is no I/O MMU which can merge physically
adsharma@5974 89 * discontiguous buffers, so we set the merge_mask to ~0UL, which corresponds to a iommu
adsharma@5974 90 * page-size of 2^64.
adsharma@5974 91 */
adsharma@5974 92 unsigned long ia64_max_iommu_merge_mask = ~0UL;
adsharma@5974 93 EXPORT_SYMBOL(ia64_max_iommu_merge_mask);
adsharma@5974 94
adsharma@5974 95 /*
adsharma@5974 96 * We use a special marker for the end of memory and it uses the extra (+1) slot
adsharma@5974 97 */
adsharma@5974 98 struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
adsharma@5974 99 int num_rsvd_regions;
adsharma@5974 100
adsharma@5974 101
adsharma@5974 102 /*
adsharma@5974 103 * Filter incoming memory segments based on the primitive map created from the boot
adsharma@5974 104 * parameters. Segments contained in the map are removed from the memory ranges. A
adsharma@5974 105 * caller-specified function is called with the memory ranges that remain after filtering.
adsharma@5974 106 * This routine does not assume the incoming segments are sorted.
adsharma@5974 107 */
adsharma@5974 108 int
adsharma@5974 109 filter_rsvd_memory (unsigned long start, unsigned long end, void *arg)
adsharma@5974 110 {
adsharma@5974 111 unsigned long range_start, range_end, prev_start;
adsharma@5974 112 void (*func)(unsigned long, unsigned long, int);
adsharma@5974 113 int i;
adsharma@5974 114
adsharma@5974 115 #if IGNORE_PFN0
adsharma@5974 116 if (start == PAGE_OFFSET) {
adsharma@5974 117 printk(KERN_WARNING "warning: skipping physical page 0\n");
adsharma@5974 118 start += PAGE_SIZE;
adsharma@5974 119 if (start >= end) return 0;
adsharma@5974 120 }
adsharma@5974 121 #endif
adsharma@5974 122 /*
adsharma@5974 123 * lowest possible address(walker uses virtual)
adsharma@5974 124 */
adsharma@5974 125 prev_start = PAGE_OFFSET;
adsharma@5974 126 func = arg;
adsharma@5974 127
adsharma@5974 128 for (i = 0; i < num_rsvd_regions; ++i) {
adsharma@5974 129 range_start = max(start, prev_start);
adsharma@5974 130 range_end = min(end, rsvd_region[i].start);
adsharma@5974 131
adsharma@5974 132 if (range_start < range_end)
adsharma@5974 133 #ifdef XEN
adsharma@5974 134 {
adsharma@5974 135 /* init_boot_pages requires "ps, pe" */
adsharma@5974 136 printk("Init boot pages: 0x%lx -> 0x%lx.\n",
adsharma@5974 137 __pa(range_start), __pa(range_end));
adsharma@5974 138 (*func)(__pa(range_start), __pa(range_end), 0);
adsharma@5974 139 }
adsharma@5974 140 #else
adsharma@5974 141 call_pernode_memory(__pa(range_start), range_end - range_start, func);
adsharma@5974 142 #endif
adsharma@5974 143
adsharma@5974 144 /* nothing more available in this segment */
adsharma@5974 145 if (range_end == end) return 0;
adsharma@5974 146
adsharma@5974 147 prev_start = rsvd_region[i].end;
adsharma@5974 148 }
adsharma@5974 149 /* end of memory marker allows full processing inside loop body */
adsharma@5974 150 return 0;
adsharma@5974 151 }
adsharma@5974 152
adsharma@5974 153 static void
adsharma@5974 154 sort_regions (struct rsvd_region *rsvd_region, int max)
adsharma@5974 155 {
adsharma@5974 156 int j;
adsharma@5974 157
adsharma@5974 158 /* simple bubble sorting */
adsharma@5974 159 while (max--) {
adsharma@5974 160 for (j = 0; j < max; ++j) {
adsharma@5974 161 if (rsvd_region[j].start > rsvd_region[j+1].start) {
adsharma@5974 162 struct rsvd_region tmp;
adsharma@5974 163 tmp = rsvd_region[j];
adsharma@5974 164 rsvd_region[j] = rsvd_region[j + 1];
adsharma@5974 165 rsvd_region[j + 1] = tmp;
adsharma@5974 166 }
adsharma@5974 167 }
adsharma@5974 168 }
adsharma@5974 169 }
adsharma@5974 170
adsharma@5974 171 /**
adsharma@5974 172 * reserve_memory - setup reserved memory areas
adsharma@5974 173 *
adsharma@5974 174 * Setup the reserved memory areas set aside for the boot parameters,
adsharma@5974 175 * initrd, etc. There are currently %IA64_MAX_RSVD_REGIONS defined,
adsharma@5974 176 * see include/asm-ia64/meminit.h if you need to define more.
adsharma@5974 177 */
adsharma@5974 178 void
adsharma@5974 179 reserve_memory (void)
adsharma@5974 180 {
adsharma@5974 181 int n = 0;
adsharma@5974 182
adsharma@5974 183 /*
adsharma@5974 184 * none of the entries in this table overlap
adsharma@5974 185 */
adsharma@5974 186 rsvd_region[n].start = (unsigned long) ia64_boot_param;
adsharma@5974 187 rsvd_region[n].end = rsvd_region[n].start + sizeof(*ia64_boot_param);
adsharma@5974 188 n++;
adsharma@5974 189
adsharma@5974 190 rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
adsharma@5974 191 rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
adsharma@5974 192 n++;
adsharma@5974 193
adsharma@5974 194 rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
adsharma@5974 195 rsvd_region[n].end = (rsvd_region[n].start
adsharma@5974 196 + strlen(__va(ia64_boot_param->command_line)) + 1);
adsharma@5974 197 n++;
adsharma@5974 198
adsharma@5974 199 rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
adsharma@5974 200 #ifdef XEN
adsharma@5974 201 /* Reserve xen image/bitmap/xen-heap */
adsharma@5974 202 rsvd_region[n].end = rsvd_region[n].start + xenheap_size;
adsharma@5974 203 #else
adsharma@5974 204 rsvd_region[n].end = (unsigned long) ia64_imva(_end);
adsharma@5974 205 #endif
adsharma@5974 206 n++;
adsharma@5974 207
adsharma@5974 208 #ifdef CONFIG_BLK_DEV_INITRD
adsharma@5974 209 if (ia64_boot_param->initrd_start) {
adsharma@5974 210 rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
adsharma@5974 211 rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->initrd_size;
adsharma@5974 212 n++;
adsharma@5974 213 }
adsharma@5974 214 #endif
adsharma@5974 215
adsharma@5974 216 /* end of memory marker */
adsharma@5974 217 rsvd_region[n].start = ~0UL;
adsharma@5974 218 rsvd_region[n].end = ~0UL;
adsharma@5974 219 n++;
adsharma@5974 220
adsharma@5974 221 num_rsvd_regions = n;
adsharma@5974 222
adsharma@5974 223 sort_regions(rsvd_region, num_rsvd_regions);
adsharma@5974 224 }
adsharma@5974 225
adsharma@5974 226 /**
adsharma@5974 227 * find_initrd - get initrd parameters from the boot parameter structure
adsharma@5974 228 *
adsharma@5974 229 * Grab the initrd start and end from the boot parameter struct given us by
adsharma@5974 230 * the boot loader.
adsharma@5974 231 */
adsharma@5974 232 void
adsharma@5974 233 find_initrd (void)
adsharma@5974 234 {
adsharma@5974 235 #ifdef CONFIG_BLK_DEV_INITRD
adsharma@5974 236 if (ia64_boot_param->initrd_start) {
adsharma@5974 237 initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
adsharma@5974 238 initrd_end = initrd_start+ia64_boot_param->initrd_size;
adsharma@5974 239
adsharma@5974 240 printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n",
adsharma@5974 241 initrd_start, ia64_boot_param->initrd_size);
adsharma@5974 242 }
adsharma@5974 243 #endif
adsharma@5974 244 }
adsharma@5974 245
adsharma@5974 246 static void __init
adsharma@5974 247 io_port_init (void)
adsharma@5974 248 {
adsharma@5974 249 extern unsigned long ia64_iobase;
adsharma@5974 250 unsigned long phys_iobase;
adsharma@5974 251
adsharma@5974 252 /*
adsharma@5974 253 * Set `iobase' to the appropriate address in region 6 (uncached access range).
adsharma@5974 254 *
adsharma@5974 255 * The EFI memory map is the "preferred" location to get the I/O port space base,
adsharma@5974 256 * rather the relying on AR.KR0. This should become more clear in future SAL
adsharma@5974 257 * specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is
adsharma@5974 258 * found in the memory map.
adsharma@5974 259 */
adsharma@5974 260 phys_iobase = efi_get_iobase();
adsharma@5974 261 if (phys_iobase)
adsharma@5974 262 /* set AR.KR0 since this is all we use it for anyway */
ydong@5982 263 __get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE]=phys_iobase;
adsharma@5974 264 else {
ydong@5982 265 phys_iobase=__get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE];
adsharma@5974 266 printk(KERN_INFO "No I/O port range found in EFI memory map, falling back "
adsharma@5974 267 "to AR.KR0\n");
adsharma@5974 268 printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
adsharma@5974 269 }
adsharma@5974 270 ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
adsharma@5974 271
adsharma@5974 272 /* setup legacy IO port space */
adsharma@5974 273 io_space[0].mmio_base = ia64_iobase;
adsharma@5974 274 io_space[0].sparse = 1;
adsharma@5974 275 num_io_spaces = 1;
adsharma@5974 276 }
adsharma@5974 277
adsharma@5974 278 /**
adsharma@5974 279 * early_console_setup - setup debugging console
adsharma@5974 280 *
adsharma@5974 281 * Consoles started here require little enough setup that we can start using
adsharma@5974 282 * them very early in the boot process, either right after the machine
adsharma@5974 283 * vector initialization, or even before if the drivers can detect their hw.
adsharma@5974 284 *
adsharma@5974 285 * Returns non-zero if a console couldn't be setup.
adsharma@5974 286 */
adsharma@5974 287 static inline int __init
adsharma@5974 288 early_console_setup (char *cmdline)
adsharma@5974 289 {
adsharma@5974 290 #ifdef CONFIG_SERIAL_SGI_L1_CONSOLE
adsharma@5974 291 {
adsharma@5974 292 extern int sn_serial_console_early_setup(void);
adsharma@5974 293 if (!sn_serial_console_early_setup())
adsharma@5974 294 return 0;
adsharma@5974 295 }
adsharma@5974 296 #endif
adsharma@5974 297 #ifdef CONFIG_EFI_PCDP
adsharma@5974 298 if (!efi_setup_pcdp_console(cmdline))
adsharma@5974 299 return 0;
adsharma@5974 300 #endif
adsharma@5974 301 #ifdef CONFIG_SERIAL_8250_CONSOLE
adsharma@5974 302 if (!early_serial_console_init(cmdline))
adsharma@5974 303 return 0;
adsharma@5974 304 #endif
adsharma@5974 305
adsharma@5974 306 return -1;
adsharma@5974 307 }
adsharma@5974 308
adsharma@5974 309 static inline void
adsharma@5974 310 mark_bsp_online (void)
adsharma@5974 311 {
adsharma@5974 312 #ifdef CONFIG_SMP
adsharma@5974 313 /* If we register an early console, allow CPU 0 to printk */
adsharma@5974 314 cpu_set(smp_processor_id(), cpu_online_map);
adsharma@5974 315 #endif
adsharma@5974 316 }
adsharma@5974 317
adsharma@5974 318 void __init
adsharma@5974 319 #ifdef XEN
adsharma@5974 320 early_setup_arch (char **cmdline_p)
adsharma@5974 321 #else
adsharma@5974 322 setup_arch (char **cmdline_p)
adsharma@5974 323 #endif
adsharma@5974 324 {
adsharma@5974 325 unw_init();
adsharma@5974 326
adsharma@5974 327 ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
adsharma@5974 328
adsharma@5974 329 *cmdline_p = __va(ia64_boot_param->command_line);
adsharma@5974 330 #ifdef XEN
adsharma@5974 331 efi_init();
adsharma@5974 332 #else
adsharma@5974 333 strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
adsharma@5974 334
adsharma@5974 335 efi_init();
adsharma@5974 336 io_port_init();
adsharma@5974 337 #endif
adsharma@5974 338
adsharma@5974 339 #ifdef CONFIG_IA64_GENERIC
adsharma@5974 340 {
adsharma@5974 341 const char *mvec_name = strstr (*cmdline_p, "machvec=");
adsharma@5974 342 char str[64];
adsharma@5974 343
adsharma@5974 344 if (mvec_name) {
adsharma@5974 345 const char *end;
adsharma@5974 346 size_t len;
adsharma@5974 347
adsharma@5974 348 mvec_name += 8;
adsharma@5974 349 end = strchr (mvec_name, ' ');
adsharma@5974 350 if (end)
adsharma@5974 351 len = end - mvec_name;
adsharma@5974 352 else
adsharma@5974 353 len = strlen (mvec_name);
adsharma@5974 354 len = min(len, sizeof (str) - 1);
adsharma@5974 355 strncpy (str, mvec_name, len);
adsharma@5974 356 str[len] = '\0';
adsharma@5974 357 mvec_name = str;
adsharma@5974 358 } else
adsharma@5974 359 mvec_name = acpi_get_sysname();
adsharma@5974 360 machvec_init(mvec_name);
adsharma@5974 361 }
adsharma@5974 362 #endif
adsharma@5974 363
adsharma@5974 364 #ifdef XEN
adsharma@5974 365 early_cmdline_parse(cmdline_p);
adsharma@5974 366 cmdline_parse(*cmdline_p);
adsharma@5974 367 #undef CONFIG_ACPI_BOOT
adsharma@5974 368 #endif
adsharma@5974 369 if (early_console_setup(*cmdline_p) == 0)
adsharma@5974 370 mark_bsp_online();
adsharma@5974 371
adsharma@5974 372 #ifdef CONFIG_ACPI_BOOT
adsharma@5974 373 /* Initialize the ACPI boot-time table parser */
adsharma@5974 374 acpi_table_init();
adsharma@5974 375 # ifdef CONFIG_ACPI_NUMA
adsharma@5974 376 acpi_numa_init();
adsharma@5974 377 # endif
adsharma@5974 378 #else
adsharma@5974 379 # ifdef CONFIG_SMP
adsharma@5974 380 smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
adsharma@5974 381 # endif
adsharma@5974 382 #endif /* CONFIG_APCI_BOOT */
adsharma@5974 383
adsharma@5974 384 #ifndef XEN
adsharma@5974 385 find_memory();
adsharma@5974 386 #else
adsharma@5974 387 io_port_init();
adsharma@5974 388 }
adsharma@5974 389
adsharma@5974 390 void __init
adsharma@5974 391 late_setup_arch (char **cmdline_p)
adsharma@5974 392 {
adsharma@5974 393 #undef CONFIG_ACPI_BOOT
adsharma@5974 394 acpi_table_init();
adsharma@5974 395 #endif
adsharma@5974 396 /* process SAL system table: */
adsharma@5974 397 ia64_sal_init(efi.sal_systab);
adsharma@5974 398
adsharma@5974 399 #ifdef CONFIG_SMP
adsharma@5974 400 cpu_physical_id(0) = hard_smp_processor_id();
adsharma@5974 401 #endif
adsharma@5974 402
fred@5986 403 #ifdef XEN
adsharma@5974 404 identify_vmx_feature();
fred@5986 405 #endif
adsharma@5974 406
adsharma@5974 407 cpu_init(); /* initialize the bootstrap CPU */
adsharma@5974 408
adsharma@5974 409 #ifdef CONFIG_ACPI_BOOT
adsharma@5974 410 acpi_boot_init();
adsharma@5974 411 #endif
adsharma@5974 412
adsharma@5974 413 #ifdef CONFIG_VT
adsharma@5974 414 if (!conswitchp) {
adsharma@5974 415 # if defined(CONFIG_DUMMY_CONSOLE)
adsharma@5974 416 conswitchp = &dummy_con;
adsharma@5974 417 # endif
adsharma@5974 418 # if defined(CONFIG_VGA_CONSOLE)
adsharma@5974 419 /*
adsharma@5974 420 * Non-legacy systems may route legacy VGA MMIO range to system
adsharma@5974 421 * memory. vga_con probes the MMIO hole, so memory looks like
adsharma@5974 422 * a VGA device to it. The EFI memory map can tell us if it's
adsharma@5974 423 * memory so we can avoid this problem.
adsharma@5974 424 */
adsharma@5974 425 if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
adsharma@5974 426 conswitchp = &vga_con;
adsharma@5974 427 # endif
adsharma@5974 428 }
adsharma@5974 429 #endif
adsharma@5974 430
adsharma@5974 431 /* enable IA-64 Machine Check Abort Handling unless disabled */
adsharma@5974 432 if (!strstr(saved_command_line, "nomca"))
adsharma@5974 433 ia64_mca_init();
adsharma@5974 434
adsharma@5974 435 platform_setup(cmdline_p);
adsharma@5974 436 paging_init();
adsharma@5974 437 }
adsharma@5974 438
adsharma@5974 439 /*
adsharma@5974 440 * Display cpu info for all cpu's.
adsharma@5974 441 */
adsharma@5974 442 static int
adsharma@5974 443 show_cpuinfo (struct seq_file *m, void *v)
adsharma@5974 444 {
adsharma@5974 445 #ifdef CONFIG_SMP
adsharma@5974 446 # define lpj c->loops_per_jiffy
adsharma@5974 447 # define cpunum c->cpu
adsharma@5974 448 #else
adsharma@5974 449 # define lpj loops_per_jiffy
adsharma@5974 450 # define cpunum 0
adsharma@5974 451 #endif
adsharma@5974 452 static struct {
adsharma@5974 453 unsigned long mask;
adsharma@5974 454 const char *feature_name;
adsharma@5974 455 } feature_bits[] = {
adsharma@5974 456 { 1UL << 0, "branchlong" },
adsharma@5974 457 { 1UL << 1, "spontaneous deferral"},
adsharma@5974 458 { 1UL << 2, "16-byte atomic ops" }
adsharma@5974 459 };
adsharma@5974 460 char family[32], features[128], *cp, sep;
adsharma@5974 461 struct cpuinfo_ia64 *c = v;
adsharma@5974 462 unsigned long mask;
adsharma@5974 463 int i;
adsharma@5974 464
adsharma@5974 465 mask = c->features;
adsharma@5974 466
adsharma@5974 467 switch (c->family) {
adsharma@5974 468 case 0x07: memcpy(family, "Itanium", 8); break;
adsharma@5974 469 case 0x1f: memcpy(family, "Itanium 2", 10); break;
adsharma@5974 470 default: sprintf(family, "%u", c->family); break;
adsharma@5974 471 }
adsharma@5974 472
adsharma@5974 473 /* build the feature string: */
adsharma@5974 474 memcpy(features, " standard", 10);
adsharma@5974 475 cp = features;
adsharma@5974 476 sep = 0;
adsharma@5974 477 for (i = 0; i < (int) ARRAY_SIZE(feature_bits); ++i) {
adsharma@5974 478 if (mask & feature_bits[i].mask) {
adsharma@5974 479 if (sep)
adsharma@5974 480 *cp++ = sep;
adsharma@5974 481 sep = ',';
adsharma@5974 482 *cp++ = ' ';
adsharma@5974 483 strcpy(cp, feature_bits[i].feature_name);
adsharma@5974 484 cp += strlen(feature_bits[i].feature_name);
adsharma@5974 485 mask &= ~feature_bits[i].mask;
adsharma@5974 486 }
adsharma@5974 487 }
adsharma@5974 488 if (mask) {
adsharma@5974 489 /* print unknown features as a hex value: */
adsharma@5974 490 if (sep)
adsharma@5974 491 *cp++ = sep;
adsharma@5974 492 sprintf(cp, " 0x%lx", mask);
adsharma@5974 493 }
adsharma@5974 494
adsharma@5974 495 seq_printf(m,
adsharma@5974 496 "processor : %d\n"
adsharma@5974 497 "vendor : %s\n"
adsharma@5974 498 "arch : IA-64\n"
adsharma@5974 499 "family : %s\n"
adsharma@5974 500 "model : %u\n"
adsharma@5974 501 "revision : %u\n"
adsharma@5974 502 "archrev : %u\n"
adsharma@5974 503 "features :%s\n" /* don't change this---it _is_ right! */
adsharma@5974 504 "cpu number : %lu\n"
adsharma@5974 505 "cpu regs : %u\n"
adsharma@5974 506 "cpu MHz : %lu.%06lu\n"
adsharma@5974 507 "itc MHz : %lu.%06lu\n"
adsharma@5974 508 "BogoMIPS : %lu.%02lu\n\n",
adsharma@5974 509 cpunum, c->vendor, family, c->model, c->revision, c->archrev,
adsharma@5974 510 features, c->ppn, c->number,
adsharma@5974 511 c->proc_freq / 1000000, c->proc_freq % 1000000,
adsharma@5974 512 c->itc_freq / 1000000, c->itc_freq % 1000000,
adsharma@5974 513 lpj*HZ/500000, (lpj*HZ/5000) % 100);
adsharma@5974 514 return 0;
adsharma@5974 515 }
adsharma@5974 516
adsharma@5974 517 static void *
adsharma@5974 518 c_start (struct seq_file *m, loff_t *pos)
adsharma@5974 519 {
adsharma@5974 520 #ifdef CONFIG_SMP
adsharma@5974 521 while (*pos < NR_CPUS && !cpu_isset(*pos, cpu_online_map))
adsharma@5974 522 ++*pos;
adsharma@5974 523 #endif
adsharma@5974 524 return *pos < NR_CPUS ? cpu_data(*pos) : NULL;
adsharma@5974 525 }
adsharma@5974 526
adsharma@5974 527 static void *
adsharma@5974 528 c_next (struct seq_file *m, void *v, loff_t *pos)
adsharma@5974 529 {
adsharma@5974 530 ++*pos;
adsharma@5974 531 return c_start(m, pos);
adsharma@5974 532 }
adsharma@5974 533
adsharma@5974 534 static void
adsharma@5974 535 c_stop (struct seq_file *m, void *v)
adsharma@5974 536 {
adsharma@5974 537 }
adsharma@5974 538
adsharma@5974 539 #ifndef XEN
adsharma@5974 540 struct seq_operations cpuinfo_op = {
adsharma@5974 541 .start = c_start,
adsharma@5974 542 .next = c_next,
adsharma@5974 543 .stop = c_stop,
adsharma@5974 544 .show = show_cpuinfo
adsharma@5974 545 };
adsharma@5974 546 #endif
adsharma@5974 547
adsharma@5974 548 void
adsharma@5974 549 identify_cpu (struct cpuinfo_ia64 *c)
adsharma@5974 550 {
adsharma@5974 551 union {
adsharma@5974 552 unsigned long bits[5];
adsharma@5974 553 struct {
adsharma@5974 554 /* id 0 & 1: */
adsharma@5974 555 char vendor[16];
adsharma@5974 556
adsharma@5974 557 /* id 2 */
adsharma@5974 558 u64 ppn; /* processor serial number */
adsharma@5974 559
adsharma@5974 560 /* id 3: */
adsharma@5974 561 unsigned number : 8;
adsharma@5974 562 unsigned revision : 8;
adsharma@5974 563 unsigned model : 8;
adsharma@5974 564 unsigned family : 8;
adsharma@5974 565 unsigned archrev : 8;
adsharma@5974 566 unsigned reserved : 24;
adsharma@5974 567
adsharma@5974 568 /* id 4: */
adsharma@5974 569 u64 features;
adsharma@5974 570 } field;
adsharma@5974 571 } cpuid;
adsharma@5974 572 pal_vm_info_1_u_t vm1;
adsharma@5974 573 pal_vm_info_2_u_t vm2;
adsharma@5974 574 pal_status_t status;
adsharma@5974 575 unsigned long impl_va_msb = 50, phys_addr_size = 44; /* Itanium defaults */
adsharma@5974 576 int i;
adsharma@5974 577
adsharma@5974 578 for (i = 0; i < 5; ++i)
adsharma@5974 579 cpuid.bits[i] = ia64_get_cpuid(i);
adsharma@5974 580
adsharma@5974 581 memcpy(c->vendor, cpuid.field.vendor, 16);
adsharma@5974 582 #ifdef CONFIG_SMP
adsharma@5974 583 c->cpu = smp_processor_id();
adsharma@5974 584 #endif
adsharma@5974 585 c->ppn = cpuid.field.ppn;
adsharma@5974 586 c->number = cpuid.field.number;
adsharma@5974 587 c->revision = cpuid.field.revision;
adsharma@5974 588 c->model = cpuid.field.model;
adsharma@5974 589 c->family = cpuid.field.family;
adsharma@5974 590 c->archrev = cpuid.field.archrev;
adsharma@5974 591 c->features = cpuid.field.features;
adsharma@5974 592
adsharma@5974 593 status = ia64_pal_vm_summary(&vm1, &vm2);
adsharma@5974 594 if (status == PAL_STATUS_SUCCESS) {
adsharma@5974 595 impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
adsharma@5974 596 phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
adsharma@5974 597 }
adsharma@5974 598 c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
adsharma@5974 599 c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
adsharma@5974 600
fred@5986 601 #ifdef XEN
adsharma@5974 602 /* If vmx feature is on, do necessary initialization for vmx */
adsharma@5974 603 if (vmx_enabled)
adsharma@5974 604 vmx_init_env();
adsharma@5974 605 #endif
adsharma@5974 606 }
adsharma@5974 607
adsharma@5974 608 void
adsharma@5974 609 setup_per_cpu_areas (void)
adsharma@5974 610 {
adsharma@5974 611 /* start_kernel() requires this... */
ydong@5982 612 __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT] = current;
ydong@5982 613 __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT_STACK] = -1;
adsharma@5974 614 }
adsharma@5974 615
adsharma@5974 616 static void
adsharma@5974 617 get_max_cacheline_size (void)
adsharma@5974 618 {
adsharma@5974 619 unsigned long line_size, max = 1;
adsharma@5974 620 u64 l, levels, unique_caches;
adsharma@5974 621 pal_cache_config_info_t cci;
adsharma@5974 622 s64 status;
adsharma@5974 623
adsharma@5974 624 status = ia64_pal_cache_summary(&levels, &unique_caches);
adsharma@5974 625 if (status != 0) {
adsharma@5974 626 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
adsharma@5974 627 __FUNCTION__, status);
adsharma@5974 628 max = SMP_CACHE_BYTES;
adsharma@5974 629 goto out;
adsharma@5974 630 }
adsharma@5974 631
adsharma@5974 632 for (l = 0; l < levels; ++l) {
adsharma@5974 633 status = ia64_pal_cache_config_info(l, /* cache_type (data_or_unified)= */ 2,
adsharma@5974 634 &cci);
adsharma@5974 635 if (status != 0) {
adsharma@5974 636 printk(KERN_ERR
adsharma@5974 637 "%s: ia64_pal_cache_config_info(l=%lu) failed (status=%ld)\n",
adsharma@5974 638 __FUNCTION__, l, status);
adsharma@5974 639 max = SMP_CACHE_BYTES;
adsharma@5974 640 }
adsharma@5974 641 line_size = 1 << cci.pcci_line_size;
adsharma@5974 642 if (line_size > max)
adsharma@5974 643 max = line_size;
adsharma@5974 644 }
adsharma@5974 645 out:
adsharma@5974 646 if (max > ia64_max_cacheline_size)
adsharma@5974 647 ia64_max_cacheline_size = max;
adsharma@5974 648 }
adsharma@5974 649
adsharma@5974 650 /*
adsharma@5974 651 * cpu_init() initializes state that is per-CPU. This function acts
adsharma@5974 652 * as a 'CPU state barrier', nothing should get across.
adsharma@5974 653 */
adsharma@5974 654 void
adsharma@5974 655 cpu_init (void)
adsharma@5974 656 {
adsharma@5974 657 extern void __devinit ia64_mmu_init (void *);
adsharma@5974 658 unsigned long num_phys_stacked;
adsharma@5974 659 pal_vm_info_2_u_t vmi;
adsharma@5974 660 unsigned int max_ctx;
adsharma@5974 661 struct cpuinfo_ia64 *cpu_info;
adsharma@5974 662 void *cpu_data;
adsharma@5974 663
adsharma@5974 664 cpu_data = per_cpu_init();
adsharma@5974 665
adsharma@5974 666 /*
adsharma@5974 667 * We set ar.k3 so that assembly code in MCA handler can compute
adsharma@5974 668 * physical addresses of per cpu variables with a simple:
adsharma@5974 669 * phys = ar.k3 + &per_cpu_var
adsharma@5974 670 */
ydong@5982 671 // ia64_set_kr(IA64_KR_PER_CPU_DATA,
ydong@5982 672 // ia64_tpa(cpu_data) - (long) __per_cpu_start);
adsharma@5974 673
adsharma@5974 674 get_max_cacheline_size();
adsharma@5974 675
adsharma@5974 676 /*
adsharma@5974 677 * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
adsharma@5974 678 * ia64_mmu_init() yet. And we can't call ia64_mmu_init() first because it
adsharma@5974 679 * depends on the data returned by identify_cpu(). We break the dependency by
adsharma@5974 680 * accessing cpu_data() through the canonical per-CPU address.
adsharma@5974 681 */
adsharma@5974 682 cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(cpu_info) - __per_cpu_start);
adsharma@5974 683 identify_cpu(cpu_info);
adsharma@5974 684
adsharma@5974 685 #ifdef CONFIG_MCKINLEY
adsharma@5974 686 {
adsharma@5974 687 # define FEATURE_SET 16
adsharma@5974 688 struct ia64_pal_retval iprv;
adsharma@5974 689
adsharma@5974 690 if (cpu_info->family == 0x1f) {
adsharma@5974 691 PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
adsharma@5974 692 if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
adsharma@5974 693 PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
adsharma@5974 694 (iprv.v1 | 0x80), FEATURE_SET, 0);
adsharma@5974 695 }
adsharma@5974 696 }
adsharma@5974 697 #endif
adsharma@5974 698
adsharma@5974 699 /* Clear the stack memory reserved for pt_regs: */
adsharma@5974 700 memset(ia64_task_regs(current), 0, sizeof(struct pt_regs));
adsharma@5974 701
ydong@5982 702 __get_cpu_var(cpu_kr)._kr[IA64_KR_FPU_OWNER] = 0;
adsharma@5974 703
adsharma@5974 704 /*
adsharma@5974 705 * Initialize default control register to defer all speculative faults. The
adsharma@5974 706 * kernel MUST NOT depend on a particular setting of these bits (in other words,
adsharma@5974 707 * the kernel must have recovery code for all speculative accesses). Turn on
adsharma@5974 708 * dcr.lc as per recommendation by the architecture team. Most IA-32 apps
adsharma@5974 709 * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
adsharma@5974 710 * be fine).
adsharma@5974 711 */
adsharma@5974 712 ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
adsharma@5974 713 | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
adsharma@5974 714 atomic_inc(&init_mm.mm_count);
adsharma@5974 715 current->active_mm = &init_mm;
adsharma@5974 716 #ifdef XEN
adsharma@5974 717 if (current->domain->arch.mm)
adsharma@5974 718 #else
adsharma@5974 719 if (current->mm)
adsharma@5974 720 #endif
adsharma@5974 721 BUG();
adsharma@5974 722
adsharma@5974 723 ia64_mmu_init(ia64_imva(cpu_data));
adsharma@5974 724 ia64_mca_cpu_init(ia64_imva(cpu_data));
adsharma@5974 725
adsharma@5974 726 #ifdef CONFIG_IA32_SUPPORT
adsharma@5974 727 ia32_cpu_init();
adsharma@5974 728 #endif
adsharma@5974 729
adsharma@5974 730 /* Clear ITC to eliminiate sched_clock() overflows in human time. */
adsharma@5974 731 ia64_set_itc(0);
adsharma@5974 732
adsharma@5974 733 /* disable all local interrupt sources: */
adsharma@5974 734 ia64_set_itv(1 << 16);
adsharma@5974 735 ia64_set_lrr0(1 << 16);
adsharma@5974 736 ia64_set_lrr1(1 << 16);
adsharma@5974 737 ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
adsharma@5974 738 ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
adsharma@5974 739
adsharma@5974 740 /* clear TPR & XTP to enable all interrupt classes: */
adsharma@5974 741 ia64_setreg(_IA64_REG_CR_TPR, 0);
adsharma@5974 742 #ifdef CONFIG_SMP
adsharma@5974 743 normal_xtp();
adsharma@5974 744 #endif
adsharma@5974 745
adsharma@5974 746 /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
adsharma@5974 747 if (ia64_pal_vm_summary(NULL, &vmi) == 0)
adsharma@5974 748 max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
adsharma@5974 749 else {
adsharma@5974 750 printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
adsharma@5974 751 max_ctx = (1U << 15) - 1; /* use architected minimum */
adsharma@5974 752 }
adsharma@5974 753 while (max_ctx < ia64_ctx.max_ctx) {
adsharma@5974 754 unsigned int old = ia64_ctx.max_ctx;
adsharma@5974 755 if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
adsharma@5974 756 break;
adsharma@5974 757 }
adsharma@5974 758
adsharma@5974 759 if (ia64_pal_rse_info(&num_phys_stacked, NULL) != 0) {
adsharma@5974 760 printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
adsharma@5974 761 "stacked regs\n");
adsharma@5974 762 num_phys_stacked = 96;
adsharma@5974 763 }
adsharma@5974 764 /* size of physical stacked register partition plus 8 bytes: */
adsharma@5974 765 __get_cpu_var(ia64_phys_stacked_size_p8) = num_phys_stacked*8 + 8;
adsharma@5974 766 platform_cpu_init();
adsharma@5974 767 }
adsharma@5974 768
adsharma@5974 769 void
adsharma@5974 770 check_bugs (void)
adsharma@5974 771 {
adsharma@5974 772 ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
adsharma@5974 773 (unsigned long) __end___mckinley_e9_bundles);
adsharma@5974 774 }