ia64/linux-2.6.18-xen.hg

changeset 810:ea67a65cec17

Backport: PCI: export __pci_read_base()

commit 0b400c7ed4d027e02f6231afa39852a2d48e6f25
Author: Yu Zhao <yu.zhao@intel.com>
Date: Sat Nov 22 02:40:40 2008 +0800

PCI: export __pci_read_base()

Export __pci_read_base() so it can be used by whole PCI subsystem.

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Mar 13 07:40:36 2009 +0000 (2009-03-13)
parents 6dd975d12fd3
children 36d8c23b7574
files drivers/pci/pci.h drivers/pci/probe.c
line diff
     1.1 --- a/drivers/pci/pci.h	Fri Mar 13 07:40:22 2009 +0000
     1.2 +++ b/drivers/pci/pci.h	Fri Mar 13 07:40:36 2009 +0000
     1.3 @@ -109,3 +109,13 @@ extern void pci_disable_bridge_window(st
     1.4  #ifdef CONFIG_PCI_GUESTDEV
     1.5  int pci_is_guestdev_to_reassign(struct pci_dev *dev);
     1.6  #endif /* CONFIG_PCI_GUESTDEV */
     1.7 +
     1.8 +enum pci_bar_type {
     1.9 +	pci_bar_unknown,	/* Standard PCI BAR probe */
    1.10 +	pci_bar_io,		/* An io port BAR */
    1.11 +	pci_bar_mem32,		/* A 32-bit memory BAR */
    1.12 +	pci_bar_mem64,		/* A 64-bit memory BAR */
    1.13 +};
    1.14 +
    1.15 +extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
    1.16 +				struct resource *res, unsigned int reg);
     2.1 --- a/drivers/pci/probe.c	Fri Mar 13 07:40:22 2009 +0000
     2.2 +++ b/drivers/pci/probe.c	Fri Mar 13 07:40:36 2009 +0000
     2.3 @@ -141,13 +141,6 @@ static u64 pci_size(u64 base, u64 maxbas
     2.4  	return size;
     2.5  }
     2.6  
     2.7 -enum pci_bar_type {
     2.8 -	pci_bar_unknown,	/* Standard PCI BAR probe */
     2.9 -	pci_bar_io,		/* An io port BAR */
    2.10 -	pci_bar_mem32,		/* A 32-bit memory BAR */
    2.11 -	pci_bar_mem64,		/* A 64-bit memory BAR */
    2.12 -};
    2.13 -
    2.14  static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
    2.15  {
    2.16  	if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
    2.17 @@ -162,11 +155,16 @@ static inline enum pci_bar_type decode_b
    2.18  	return pci_bar_mem32;
    2.19  }
    2.20  
    2.21 -/*
    2.22 - * If the type is not unknown, we assume that the lowest bit is 'enable'.
    2.23 - * Returns 1 if the BAR was 64-bit and 0 if it was 32-bit.
    2.24 +/**
    2.25 + * pci_read_base - read a PCI BAR
    2.26 + * @dev: the PCI device
    2.27 + * @type: type of the BAR
    2.28 + * @res: resource buffer to be filled in
    2.29 + * @pos: BAR position in the config space
    2.30 + *
    2.31 + * Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
    2.32   */
    2.33 -static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
    2.34 +int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
    2.35  			struct resource *res, unsigned int pos)
    2.36  {
    2.37  	u32 l, sz, mask;