ia64/linux-2.6.18-xen.hg

view include/linux/pci.h @ 912:dd42cdb0ab89

[IA64] Build blktap2 driver by default in x86 builds.

add CONFIG_XEN_BLKDEV_TAP2=y to buildconfigs/linux-defconfig_xen_ia64.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Jun 29 12:09:16 2009 +0900 (2009-06-29)
parents 64c8f9fbf609
children
line source
1 /*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
23 /* Include the ID list */
24 #include <linux/pci_ids.h>
26 /*
27 * The PCI interface treats multi-function devices as independent
28 * devices. The slot/function address of each device is encoded
29 * in a single byte as follows:
30 *
31 * 7:3 = slot
32 * 2:0 = function
33 */
34 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
35 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
36 #define PCI_FUNC(devfn) ((devfn) & 0x07)
38 /* Ioctls for /proc/bus/pci/X/Y nodes. */
39 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
40 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
41 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
42 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
43 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
45 #ifdef __KERNEL__
47 #include <linux/mod_devicetable.h>
49 #include <linux/types.h>
50 #include <linux/ioport.h>
51 #include <linux/list.h>
52 #include <linux/errno.h>
53 #include <linux/device.h>
55 /* File state for mmap()s on /proc/bus/pci/X/Y */
56 enum pci_mmap_state {
57 pci_mmap_io,
58 pci_mmap_mem
59 };
61 /* This defines the direction arg to the DMA mapping routines. */
62 #define PCI_DMA_BIDIRECTIONAL 0
63 #define PCI_DMA_TODEVICE 1
64 #define PCI_DMA_FROMDEVICE 2
65 #define PCI_DMA_NONE 3
67 #define DEVICE_COUNT_COMPATIBLE 4
69 /*
70 * For PCI devices, the region numbers are assigned this way:
71 */
72 enum {
73 /* #0-5: standard PCI resources */
74 PCI_STD_RESOURCES,
75 PCI_STD_RESOURCE_END = 5,
77 /* #6: expansion ROM resource */
78 PCI_ROM_RESOURCE,
80 /* device specific resources */
81 #ifdef CONFIG_PCI_IOV
82 PCI_IOV_RESOURCES,
83 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
84 #endif
86 /* resources assigned to buses behind the bridge */
87 #define PCI_BRIDGE_RESOURCE_NUM 4
89 PCI_BRIDGE_RESOURCES,
90 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
91 PCI_BRIDGE_RESOURCE_NUM - 1,
93 /* total resources associated with a PCI device */
94 PCI_NUM_RESOURCES,
96 /* preserve this for compatibility */
97 DEVICE_COUNT_RESOURCE
98 };
99 typedef int __bitwise pci_power_t;
101 #define PCI_D0 ((pci_power_t __force) 0)
102 #define PCI_D1 ((pci_power_t __force) 1)
103 #define PCI_D2 ((pci_power_t __force) 2)
104 #define PCI_D3hot ((pci_power_t __force) 3)
105 #define PCI_D3cold ((pci_power_t __force) 4)
106 #define PCI_UNKNOWN ((pci_power_t __force) 5)
107 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
109 /** The pci_channel state describes connectivity between the CPU and
110 * the pci device. If some PCI bus between here and the pci device
111 * has crashed or locked up, this info is reflected here.
112 */
113 typedef unsigned int __bitwise pci_channel_state_t;
115 enum pci_channel_state {
116 /* I/O channel is in normal state */
117 pci_channel_io_normal = (__force pci_channel_state_t) 1,
119 /* I/O to channel is blocked */
120 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
122 /* PCI card is dead */
123 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
124 };
126 typedef unsigned short __bitwise pci_bus_flags_t;
127 enum pci_bus_flags {
128 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
129 };
131 struct pci_cap_saved_state {
132 struct hlist_node next;
133 char cap_nr;
134 u32 data[0];
135 };
137 struct pci_sriov;
139 /*
140 * The pci_dev structure is used to describe PCI devices.
141 */
142 struct pci_dev {
143 struct list_head global_list; /* node in list of all PCI devices */
144 struct list_head bus_list; /* node in per-bus list */
145 struct pci_bus *bus; /* bus this device is on */
146 struct pci_bus *subordinate; /* bus this device bridges to */
148 void *sysdata; /* hook for sys-specific extension */
149 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
151 unsigned int devfn; /* encoded device & function index */
152 unsigned short vendor;
153 unsigned short device;
154 unsigned short subsystem_vendor;
155 unsigned short subsystem_device;
156 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
157 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
158 u8 rom_base_reg; /* which config register controls the ROM */
159 u8 pin; /* which interrupt pin this device uses */
161 struct pci_driver *driver; /* which driver has allocated this device */
162 u64 dma_mask; /* Mask of the bits of bus address this
163 device implements. Normally this is
164 0xffffffff. You only need to change
165 this if your device has broken DMA
166 or supports 64-bit transfers. */
168 pci_power_t current_state; /* Current operating state. In ACPI-speak,
169 this is D0-D3, D0 being fully functional,
170 and D3 being off. */
172 pci_channel_state_t error_state; /* current connectivity state */
173 struct device dev; /* Generic device interface */
175 /* device is compatible with these IDs */
176 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
177 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
179 int cfg_size; /* Size of configuration space */
181 /*
182 * Instead of touching interrupt line and base address registers
183 * directly, use the values stored here. They might be different!
184 */
185 unsigned int irq;
186 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
188 /* These fields are used by common fixups */
189 unsigned int transparent:1; /* Transparent PCI bridge */
190 unsigned int multifunction:1;/* Part of multi-function device */
191 /* keep track of device state */
192 unsigned int is_enabled:1; /* pci_enable_device has been called */
193 unsigned int is_busmaster:1; /* device is busmaster */
194 unsigned int no_msi:1; /* device may not use msi */
195 unsigned int no_d1d2:1; /* only allow d0 or d3 */
196 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
197 unsigned int broken_parity_status:1; /* Device generates false positive parity */
198 unsigned int msi_enabled:1;
199 unsigned int msix_enabled:1;
200 unsigned int ari_enabled:1; /* ARI forwarding */
201 unsigned int is_physfn:1;
202 unsigned int is_virtfn:1;
204 u32 saved_config_space[16]; /* config space saved at suspend time */
205 struct hlist_head saved_cap_space;
206 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
207 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
208 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
209 #ifdef CONFIG_PCI_IOV
210 union {
211 struct pci_sriov *sriov; /* SR-IOV capability related */
212 struct pci_dev *physfn; /* the PF this VF is associated with */
213 };
214 #endif
215 };
217 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
218 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
219 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
220 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
222 static inline struct pci_cap_saved_state *pci_find_saved_cap(
223 struct pci_dev *pci_dev,char cap)
224 {
225 struct pci_cap_saved_state *tmp;
226 struct hlist_node *pos;
228 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
229 if (tmp->cap_nr == cap)
230 return tmp;
231 }
232 return NULL;
233 }
235 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
236 struct pci_cap_saved_state *new_cap)
237 {
238 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
239 }
241 static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
242 {
243 hlist_del(&cap->next);
244 }
246 #ifndef PCI_BUS_NUM_RESOURCES
247 #define PCI_BUS_NUM_RESOURCES 8
248 #endif
250 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
252 struct pci_bus {
253 struct list_head node; /* node in list of buses */
254 struct pci_bus *parent; /* parent bus this bridge is on */
255 struct list_head children; /* list of child buses */
256 struct list_head devices; /* list of devices on this bus */
257 struct pci_dev *self; /* bridge device as seen by parent */
258 struct resource *resource[PCI_BUS_NUM_RESOURCES];
259 /* address space routed to this bus */
261 struct pci_ops *ops; /* configuration access functions */
262 void *sysdata; /* hook for sys-specific extension */
263 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
265 unsigned char number; /* bus number */
266 unsigned char primary; /* number of primary bridge */
267 unsigned char secondary; /* number of secondary bridge */
268 unsigned char subordinate; /* max number of subordinate buses */
270 char name[48];
272 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
273 pci_bus_flags_t bus_flags; /* Inherited by child busses */
274 struct device *bridge;
275 struct class_device class_dev;
276 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
277 struct bin_attribute *legacy_mem; /* legacy mem */
278 };
280 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
281 #define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
283 /*
284 * Error values that may be returned by PCI functions.
285 */
286 #define PCIBIOS_SUCCESSFUL 0x00
287 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
288 #define PCIBIOS_BAD_VENDOR_ID 0x83
289 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
290 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
291 #define PCIBIOS_SET_FAILED 0x88
292 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
294 /* Low-level architecture-dependent routines */
296 struct pci_ops {
297 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
298 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
299 };
301 struct pci_raw_ops {
302 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
303 int reg, int len, u32 *val);
304 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
305 int reg, int len, u32 val);
306 };
308 extern struct pci_raw_ops *raw_pci_ops;
310 struct pci_bus_region {
311 unsigned long start;
312 unsigned long end;
313 };
315 struct pci_dynids {
316 spinlock_t lock; /* protects list, index */
317 struct list_head list; /* for IDs added at runtime */
318 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
319 };
321 /* ---------------------------------------------------------------- */
322 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
323 * a set fof callbacks in struct pci_error_handlers, then that device driver
324 * will be notified of PCI bus errors, and will be driven to recovery
325 * when an error occurs.
326 */
328 typedef unsigned int __bitwise pci_ers_result_t;
330 enum pci_ers_result {
331 /* no result/none/not supported in device driver */
332 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
334 /* Device driver can recover without slot reset */
335 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
337 /* Device driver wants slot to be reset. */
338 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
340 /* Device has completely failed, is unrecoverable */
341 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
343 /* Device driver is fully recovered and operational */
344 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
345 };
347 /* PCI bus error event callbacks */
348 struct pci_error_handlers
349 {
350 /* PCI bus error detected on this device */
351 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
352 enum pci_channel_state error);
354 /* MMIO has been re-enabled, but not DMA */
355 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
357 /* PCI Express link has been reset */
358 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
360 /* PCI slot has been reset */
361 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
363 /* Device driver may resume normal operations */
364 void (*resume)(struct pci_dev *dev);
365 };
367 /* ---------------------------------------------------------------- */
369 struct module;
370 struct pci_driver {
371 struct list_head node;
372 char *name;
373 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
374 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
375 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
376 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
377 int (*resume) (struct pci_dev *dev); /* Device woken up */
378 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
379 void (*shutdown) (struct pci_dev *dev);
381 struct pci_error_handlers *err_handler;
382 struct device_driver driver;
383 struct pci_dynids dynids;
384 };
386 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
388 /**
389 * PCI_DEVICE - macro used to describe a specific pci device
390 * @vend: the 16 bit PCI Vendor ID
391 * @dev: the 16 bit PCI Device ID
392 *
393 * This macro is used to create a struct pci_device_id that matches a
394 * specific device. The subvendor and subdevice fields will be set to
395 * PCI_ANY_ID.
396 */
397 #define PCI_DEVICE(vend,dev) \
398 .vendor = (vend), .device = (dev), \
399 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
401 /**
402 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
403 * @dev_class: the class, subclass, prog-if triple for this device
404 * @dev_class_mask: the class mask for this device
405 *
406 * This macro is used to create a struct pci_device_id that matches a
407 * specific PCI class. The vendor, device, subvendor, and subdevice
408 * fields will be set to PCI_ANY_ID.
409 */
410 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
411 .class = (dev_class), .class_mask = (dev_class_mask), \
412 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
413 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
415 /*
416 * pci_module_init is obsolete, this stays here till we fix up all usages of it
417 * in the tree.
418 */
419 #define pci_module_init pci_register_driver
421 /* these external functions are only available when PCI support is enabled */
422 #ifdef CONFIG_PCI
424 extern struct bus_type pci_bus_type;
426 /* Do NOT directly access these two variables, unless you are arch specific pci
427 * code, or pci core code. */
428 extern struct list_head pci_root_buses; /* list of all known PCI buses */
429 extern struct list_head pci_devices; /* list of all devices */
431 void pcibios_fixup_bus(struct pci_bus *);
432 int pcibios_enable_device(struct pci_dev *, int mask);
433 char *pcibios_setup (char *str);
435 /* Used only when drivers/pci/setup.c is used */
436 void pcibios_align_resource(void *, struct resource *, resource_size_t,
437 resource_size_t);
438 void pcibios_update_irq(struct pci_dev *, int irq);
440 /* Generic PCI functions used internally */
442 extern struct pci_bus *pci_find_bus(int domain, int busnr);
443 void pci_bus_add_devices(struct pci_bus *bus);
444 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
445 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
446 {
447 struct pci_bus *root_bus;
448 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
449 if (root_bus)
450 pci_bus_add_devices(root_bus);
451 return root_bus;
452 }
453 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
454 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
455 int pci_scan_slot(struct pci_bus *bus, int devfn);
456 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
457 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
458 unsigned int pci_scan_child_bus(struct pci_bus *bus);
459 void pci_bus_add_device(struct pci_dev *dev);
460 void pci_read_bridge_bases(struct pci_bus *child);
461 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
462 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
463 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
464 extern void pci_dev_put(struct pci_dev *dev);
465 extern void pci_remove_bus(struct pci_bus *b);
466 extern void pci_remove_bus_device(struct pci_dev *dev);
467 void pci_setup_cardbus(struct pci_bus *bus);
469 /* Generic PCI functions exported to card drivers */
471 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
472 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
473 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
474 int pci_find_capability (struct pci_dev *dev, int cap);
475 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
476 int pci_find_ext_capability (struct pci_dev *dev, int cap);
477 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
479 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
480 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
481 unsigned int ss_vendor, unsigned int ss_device,
482 struct pci_dev *from);
483 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
484 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
485 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
486 int pci_dev_present(const struct pci_device_id *ids);
488 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
489 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
490 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
491 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
492 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
493 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
495 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
496 {
497 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
498 }
499 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
500 {
501 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
502 }
503 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
504 {
505 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
506 }
507 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
508 {
509 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
510 }
511 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
512 {
513 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
514 }
515 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
516 {
517 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
518 }
520 int pci_enable_device(struct pci_dev *dev);
521 int pci_enable_device_bars(struct pci_dev *dev, int mask);
522 void pci_disable_device(struct pci_dev *dev);
523 void pci_set_master(struct pci_dev *dev);
524 #define HAVE_PCI_SET_MWI
525 int pci_set_mwi(struct pci_dev *dev);
526 void pci_clear_mwi(struct pci_dev *dev);
527 void pci_intx(struct pci_dev *dev, int enable);
528 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
529 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
530 void pci_update_resource(struct pci_dev *dev, int resno);
531 int pci_assign_resource(struct pci_dev *dev, int i);
532 int pci_assign_resource_fixed(struct pci_dev *dev, int i);
533 void pci_restore_bars(struct pci_dev *dev);
535 /* ROM control related routines */
536 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
537 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
538 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
539 void pci_remove_rom(struct pci_dev *pdev);
541 /* Power management related routines */
542 int pci_save_state(struct pci_dev *dev);
543 int pci_restore_state(struct pci_dev *dev);
544 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
545 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
546 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
548 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
549 void pci_bus_assign_resources(struct pci_bus *bus);
550 void pci_bus_size_bridges(struct pci_bus *bus);
551 int pci_claim_resource(struct pci_dev *, int);
552 void pci_assign_unassigned_resources(void);
553 void pdev_enable_device(struct pci_dev *);
554 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
555 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
556 int (*)(struct pci_dev *, u8, u8));
557 #define HAVE_PCI_REQ_REGIONS 2
558 int pci_request_regions(struct pci_dev *, const char *);
559 void pci_release_regions(struct pci_dev *);
560 int pci_request_region(struct pci_dev *, int, const char *);
561 void pci_release_region(struct pci_dev *, int);
563 /* drivers/pci/bus.c */
564 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
565 resource_size_t size, resource_size_t align,
566 resource_size_t min, unsigned int type_mask,
567 void (*alignf)(void *, struct resource *,
568 resource_size_t, resource_size_t),
569 void *alignf_data);
570 void pci_enable_bridges(struct pci_bus *bus);
572 /* Proper probing supporting hot-pluggable devices */
573 int __pci_register_driver(struct pci_driver *, struct module *);
574 static inline int pci_register_driver(struct pci_driver *driver)
575 {
576 return __pci_register_driver(driver, THIS_MODULE);
577 }
579 void pci_unregister_driver(struct pci_driver *);
580 void pci_remove_behind_bridge(struct pci_dev *);
581 struct pci_driver *pci_dev_driver(const struct pci_dev *);
582 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
583 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
584 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
586 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
587 void *userdata);
588 int pci_cfg_space_size(struct pci_dev *dev);
589 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
591 /* kmem_cache style wrapper around pci_alloc_consistent() */
593 #include <linux/dmapool.h>
595 #define pci_pool dma_pool
596 #define pci_pool_create(name, pdev, size, align, allocation) \
597 dma_pool_create(name, &pdev->dev, size, align, allocation)
598 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
599 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
600 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
602 enum pci_dma_burst_strategy {
603 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
604 strategy_parameter is N/A */
605 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
606 byte boundaries */
607 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
608 strategy_parameter byte boundaries */
609 };
611 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
612 extern struct pci_dev *isa_bridge;
613 #endif
615 struct msix_entry {
616 u16 vector; /* kernel uses to write allocated vector */
617 u16 entry; /* driver uses to specify entry, OS writes */
618 };
620 #ifndef CONFIG_PCI_MSI
621 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
622 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
623 static inline void pci_disable_msi(struct pci_dev *dev) {}
624 static inline int pci_enable_msix(struct pci_dev* dev,
625 struct msix_entry *entries, int nvec) {return -1;}
626 static inline void pci_disable_msix(struct pci_dev *dev) {}
627 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
628 #ifdef CONFIG_XEN
629 #define register_msi_get_owner(func) 0
630 #define unregister_msi_get_owner(func) 0
631 #endif
632 #else
633 extern void pci_scan_msi_device(struct pci_dev *dev);
634 extern int pci_enable_msi(struct pci_dev *dev);
635 extern void pci_disable_msi(struct pci_dev *dev);
636 extern int pci_enable_msix(struct pci_dev* dev,
637 struct msix_entry *entries, int nvec);
638 extern void pci_disable_msix(struct pci_dev *dev);
639 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
640 #ifdef CONFIG_XEN
641 extern int register_msi_get_owner(int (*func)(struct pci_dev *dev));
642 extern int unregister_msi_get_owner(int (*func)(struct pci_dev *dev));
643 #endif
644 #endif
646 extern void pci_block_user_cfg_access(struct pci_dev *dev);
647 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
649 /*
650 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
651 * a PCI domain is defined to be a set of PCI busses which share
652 * configuration space.
653 */
654 #ifndef CONFIG_PCI_DOMAINS
655 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
656 static inline int pci_proc_domain(struct pci_bus *bus)
657 {
658 return 0;
659 }
660 #endif
662 #else /* CONFIG_PCI is not enabled */
664 /*
665 * If the system does not have PCI, clearly these return errors. Define
666 * these as simple inline functions to avoid hair in drivers.
667 */
669 #define _PCI_NOP(o,s,t) \
670 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
671 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
672 #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
673 _PCI_NOP(o,word,u16 x) \
674 _PCI_NOP(o,dword,u32 x)
675 _PCI_NOP_ALL(read, *)
676 _PCI_NOP_ALL(write,)
678 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
679 { return NULL; }
681 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
682 { return NULL; }
685 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn)
686 {
687 return NULL;
688 }
689 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
690 { return NULL; }
692 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
693 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
694 { return NULL; }
696 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
697 { return NULL; }
699 #define pci_dev_present(ids) (0)
700 #define pci_dev_put(dev) do { } while (0)
702 static inline void pci_set_master(struct pci_dev *dev) { }
703 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
704 static inline void pci_disable_device(struct pci_dev *dev) { }
705 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
706 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
707 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
708 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
709 static inline void pci_unregister_driver(struct pci_driver *drv) { }
710 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
711 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
712 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
713 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
715 /* Power management related routines */
716 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
717 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
718 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
719 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
720 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
722 #define isa_bridge ((struct pci_dev *)NULL)
724 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
726 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
727 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
729 #endif /* CONFIG_PCI */
731 /* Include architecture-dependent settings and functions */
733 #include <asm/pci.h>
735 /* these helpers provide future and backwards compatibility
736 * for accessing popular PCI BAR info */
737 #define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
738 #define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
739 #define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
740 #define pci_resource_len(dev,bar) \
741 ((pci_resource_start((dev),(bar)) == 0 && \
742 pci_resource_end((dev),(bar)) == \
743 pci_resource_start((dev),(bar))) ? 0 : \
744 \
745 (pci_resource_end((dev),(bar)) - \
746 pci_resource_start((dev),(bar)) + 1))
748 /* Similar to the helpers above, these manipulate per-pci_dev
749 * driver-specific data. They are really just a wrapper around
750 * the generic device structure functions of these calls.
751 */
752 static inline void *pci_get_drvdata (struct pci_dev *pdev)
753 {
754 return dev_get_drvdata(&pdev->dev);
755 }
757 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
758 {
759 dev_set_drvdata(&pdev->dev, data);
760 }
762 /* If you want to know what to call your pci_dev, ask this function.
763 * Again, it's a wrapper around the generic device.
764 */
765 static inline char *pci_name(struct pci_dev *pdev)
766 {
767 return pdev->dev.bus_id;
768 }
771 /* Some archs don't want to expose struct resource to userland as-is
772 * in sysfs and /proc
773 */
774 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
775 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
776 const struct resource *rsrc, resource_size_t *start,
777 resource_size_t *end)
778 {
779 *start = rsrc->start;
780 *end = rsrc->end;
781 }
782 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
785 /*
786 * The world is not perfect and supplies us with broken PCI devices.
787 * For at least a part of these bugs we need a work-around, so both
788 * generic (drivers/pci/quirks.c) and per-architecture code can define
789 * fixup hooks to be called for particular buggy devices.
790 */
792 struct pci_fixup {
793 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
794 void (*hook)(struct pci_dev *dev);
795 };
797 enum pci_fixup_pass {
798 pci_fixup_early, /* Before probing BARs */
799 pci_fixup_header, /* After reading configuration header */
800 pci_fixup_final, /* Final phase of device fixups */
801 pci_fixup_enable, /* pci_enable_device() time */
802 };
804 /* Anonymous variables would be nice... */
805 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
806 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
807 __attribute__((__section__(#section))) = { vendor, device, hook };
808 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
809 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
810 vendor##device##hook, vendor, device, hook)
811 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
812 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
813 vendor##device##hook, vendor, device, hook)
814 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
815 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
816 vendor##device##hook, vendor, device, hook)
817 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
818 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
819 vendor##device##hook, vendor, device, hook)
822 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
824 extern int pci_pci_problems;
825 #define PCIPCI_FAIL 1
826 #define PCIPCI_TRITON 2
827 #define PCIPCI_NATOMA 4
828 #define PCIPCI_VIAETBF 8
829 #define PCIPCI_VSFX 16
830 #define PCIPCI_ALIMAGIK 32
832 #ifdef CONFIG_PCI_GUESTDEV
833 int pci_is_guestdev(struct pci_dev *dev);
834 #endif /* CONFIG_PCI_GUESTDEV */
836 #ifdef CONFIG_PCI_IOV
837 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
838 extern void pci_disable_sriov(struct pci_dev *dev);
839 #else
840 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
841 {
842 return -ENODEV;
843 }
844 static inline void pci_disable_sriov(struct pci_dev *dev)
845 {
846 }
847 #endif
849 #endif /* __KERNEL__ */
850 #endif /* LINUX_PCI_H */