ia64/linux-2.6.18-xen.hg

view drivers/char/rio/phb.h @ 912:dd42cdb0ab89

[IA64] Build blktap2 driver by default in x86 builds.

add CONFIG_XEN_BLKDEV_TAP2=y to buildconfigs/linux-defconfig_xen_ia64.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Jun 29 12:09:16 2009 +0900 (2009-06-29)
parents 831230e53067
children
line source
1 /****************************************************************************
2 ******* *******
3 ******* P H B H E A D E R *******
4 ******* *******
5 ****************************************************************************
7 Author : Ian Nandhra, Jeremy Rolls
8 Date :
10 *
11 * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 Version : 0.01
30 Mods
31 ----------------------------------------------------------------------------
32 Date By Description
33 ----------------------------------------------------------------------------
35 ***************************************************************************/
37 #ifndef _phb_h
38 #define _phb_h 1
40 /*************************************************
41 * Handshake asserted. Deasserted by the LTT(s)
42 ************************************************/
43 #define PHB_HANDSHAKE_SET ((ushort) 0x001) /* Set by LRT */
45 #define PHB_HANDSHAKE_RESET ((ushort) 0x002) /* Set by ISR / driver */
47 #define PHB_HANDSHAKE_FLAGS (PHB_HANDSHAKE_RESET | PHB_HANDSHAKE_SET)
48 /* Reset by ltt */
51 /*************************************************
52 * Maximum number of PHB's
53 ************************************************/
54 #define MAX_PHB ((ushort) 128) /* range 0-127 */
56 /*************************************************
57 * Defines for the mode fields
58 ************************************************/
59 #define TXPKT_INCOMPLETE 0x0001 /* Previous tx packet not completed */
60 #define TXINTR_ENABLED 0x0002 /* Tx interrupt is enabled */
61 #define TX_TAB3 0x0004 /* TAB3 mode */
62 #define TX_OCRNL 0x0008 /* OCRNL mode */
63 #define TX_ONLCR 0x0010 /* ONLCR mode */
64 #define TX_SENDSPACES 0x0020 /* Send n spaces command needs
65 completing */
66 #define TX_SENDNULL 0x0040 /* Escaping NULL needs completing */
67 #define TX_SENDLF 0x0080 /* LF -> CR LF needs completing */
68 #define TX_PARALLELBUG 0x0100 /* CD1400 LF -> CR LF bug on parallel
69 port */
70 #define TX_HANGOVER (TX_SENDSPACES | TX_SENDLF | TX_SENDNULL)
71 #define TX_DTRFLOW 0x0200 /* DTR tx flow control */
72 #define TX_DTRFLOWED 0x0400 /* DTR is low - don't allow more data
73 into the FIFO */
74 #define TX_DATAINFIFO 0x0800 /* There is data in the FIFO */
75 #define TX_BUSY 0x1000 /* Data in FIFO, shift or holding regs */
77 #define RX_SPARE 0x0001 /* SPARE */
78 #define RXINTR_ENABLED 0x0002 /* Rx interrupt enabled */
79 #define RX_ICRNL 0x0008 /* ICRNL mode */
80 #define RX_INLCR 0x0010 /* INLCR mode */
81 #define RX_IGNCR 0x0020 /* IGNCR mode */
82 #define RX_CTSFLOW 0x0040 /* CTSFLOW enabled */
83 #define RX_IXOFF 0x0080 /* IXOFF enabled */
84 #define RX_CTSFLOWED 0x0100 /* CTSFLOW and CTS dropped */
85 #define RX_IXOFFED 0x0200 /* IXOFF and xoff sent */
86 #define RX_BUFFERED 0x0400 /* Try and pass on complete packets */
88 #define PORT_ISOPEN 0x0001 /* Port open? */
89 #define PORT_HUPCL 0x0002 /* Hangup on close? */
90 #define PORT_MOPENPEND 0x0004 /* Modem open pending */
91 #define PORT_ISPARALLEL 0x0008 /* Parallel port */
92 #define PORT_BREAK 0x0010 /* Port on break */
93 #define PORT_STATUSPEND 0x0020 /* Status packet pending */
94 #define PORT_BREAKPEND 0x0040 /* Break packet pending */
95 #define PORT_MODEMPEND 0x0080 /* Modem status packet pending */
96 #define PORT_PARALLELBUG 0x0100 /* CD1400 LF -> CR LF bug on parallel
97 port */
98 #define PORT_FULLMODEM 0x0200 /* Full modem signals */
99 #define PORT_RJ45 0x0400 /* RJ45 connector - no RI signal */
100 #define PORT_RESTRICTED 0x0600 /* Restricted connector - no RI / DTR */
102 #define PORT_MODEMBITS 0x0600 /* Mask for modem fields */
104 #define PORT_WCLOSE 0x0800 /* Waiting for close */
105 #define PORT_HANDSHAKEFIX 0x1000 /* Port has H/W flow control fix */
106 #define PORT_WASPCLOSED 0x2000 /* Port closed with PCLOSE */
107 #define DUMPMODE 0x4000 /* Dump RTA mem */
108 #define READ_REG 0x8000 /* Read CD1400 register */
112 /**************************************************************************
113 * PHB Structure
114 * A few words.
115 *
116 * Normally Packets are added to the end of the list and removed from
117 * the start. The pointer tx_add points to a SPACE to put a Packet.
118 * The pointer tx_remove points to the next Packet to remove
119 *************************************************************************/
121 struct PHB {
122 u8 source;
123 u8 handshake;
124 u8 status;
125 u16 timeout; /* Maximum of 1.9 seconds */
126 u8 link; /* Send down this link */
127 u8 destination;
128 u16 tx_start;
129 u16 tx_end;
130 u16 tx_add;
131 u16 tx_remove;
133 u16 rx_start;
134 u16 rx_end;
135 u16 rx_add;
136 u16 rx_remove;
138 };
140 #endif
142 /*********** end of file ***********/