ia64/linux-2.6.18-xen.hg

view scripts/Makefile.build @ 893:f994bfe9b93b

linux/blktap2: reduce TLB flush scope

c/s 885 added very coarse TLB flushing. Since these flushes always
follow single page updates, single page flushes (when available) are
sufficient.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jun 04 10:32:57 2009 +0100 (2009-06-04)
parents 48a6d8bc31b8
children 214ff2a7c990
line source
1 # ==========================================================================
2 # Building
3 # ==========================================================================
5 src := $(obj)
7 PHONY := __build
8 __build:
10 # Read .config if it exist, otherwise ignore
11 -include include/config/auto.conf
13 include scripts/Kbuild.include
15 # The filename Kbuild has precedence over Makefile
16 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
17 include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
19 include scripts/Makefile.lib
21 ifdef host-progs
22 ifneq ($(hostprogs-y),$(host-progs))
23 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
24 hostprogs-y += $(host-progs)
25 endif
26 endif
28 # Do not include host rules unles needed
29 ifneq ($(hostprogs-y)$(hostprogs-m),)
30 include scripts/Makefile.host
31 endif
33 ifneq ($(KBUILD_SRC),)
34 # Create output directory if not already present
35 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
37 # Create directories for object files if directory does not exist
38 # Needed when obj-y := dir/file.o syntax is used
39 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
40 endif
43 ifdef EXTRA_TARGETS
44 $(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
45 endif
47 ifdef build-targets
48 $(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
49 endif
51 ifdef export-objs
52 $(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
53 endif
55 ifdef O_TARGET
56 $(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
57 endif
59 ifdef L_TARGET
60 $(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
61 endif
63 ifdef list-multi
64 $(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
65 endif
67 ifndef obj
68 $(warning kbuild: Makefile.build is included improperly)
69 endif
71 ifeq ($(CONFIG_XEN),y)
72 $(objtree)/scripts/Makefile.xen: $(srctree)/scripts/Makefile.xen.awk $(srctree)/scripts/Makefile.build
73 @echo ' Updating $@'
74 $(if $(shell echo a | $(AWK) '{ print gensub(/a/, "AA", "g"); }'),\
75 ,$(error 'Your awk program does not define gensub. Use gawk or another awk with gensub'))
76 @$(AWK) -f $< $(filter-out $<,$^) >$@
78 xen-src-single-used-m := $(patsubst $(srctree)/%,%,$(wildcard $(addprefix $(srctree)/,$(single-used-m:.o=-xen.c))))
79 xen-single-used-m := $(xen-src-single-used-m:-xen.c=.o)
80 single-used-m := $(filter-out $(xen-single-used-m),$(single-used-m))
82 -include $(objtree)/scripts/Makefile.xen
83 endif
85 # ===========================================================================
87 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
88 lib-target := $(obj)/lib.a
89 endif
91 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
92 builtin-target := $(obj)/built-in.o
93 endif
95 # We keep a list of all modules in $(MODVERDIR)
97 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
98 $(if $(KBUILD_MODULES),$(obj-m)) \
99 $(subdir-ym) $(always)
100 @:
102 # Linus' kernel sanity checking tool
103 ifneq ($(KBUILD_CHECKSRC),0)
104 ifeq ($(KBUILD_CHECKSRC),2)
105 quiet_cmd_force_checksrc = CHECK $<
106 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
107 else
108 quiet_cmd_checksrc = CHECK $<
109 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
110 endif
111 endif
114 # Compile C sources (.c)
115 # ---------------------------------------------------------------------------
117 # Default is built-in, unless we know otherwise
118 modkern_cflags := $(CFLAGS_KERNEL)
119 quiet_modtag := $(empty) $(empty)
121 $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
122 $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
123 $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
124 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
126 $(real-objs-m) : quiet_modtag := [M]
127 $(real-objs-m:.o=.i) : quiet_modtag := [M]
128 $(real-objs-m:.o=.s) : quiet_modtag := [M]
129 $(real-objs-m:.o=.lst): quiet_modtag := [M]
131 $(obj-m) : quiet_modtag := [M]
133 # Default for not multi-part modules
134 modname = $(basetarget)
136 $(multi-objs-m) : modname = $(modname-multi)
137 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
138 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
139 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
140 $(multi-objs-y) : modname = $(modname-multi)
141 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
142 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
143 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
145 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
146 cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
148 %.s: %.c FORCE
149 $(call if_changed_dep,cc_s_c)
151 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
152 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
154 %.i: %.c FORCE
155 $(call if_changed_dep,cc_i_c)
157 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
158 cmd_cc_symtypes_c = \
159 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
160 | $(GENKSYMS) -T $@ >/dev/null; \
161 test -s $@ || rm -f $@
163 %.symtypes : %.c FORCE
164 $(call if_changed_dep,cc_symtypes_c)
166 # C (.c) files
167 # The C file is compiled and updated dependency information is generated.
168 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
170 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
172 ifndef CONFIG_MODVERSIONS
173 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
175 else
176 # When module versioning is enabled the following steps are executed:
177 # o compile a .tmp_<file>.o from <file>.c
178 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
179 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
180 # are done.
181 # o otherwise, we calculate symbol versions using the good old
182 # genksyms on the preprocessed source and postprocess them in a way
183 # that they are usable as a linker script
184 # o generate <file>.o from .tmp_<file>.o using the linker to
185 # replace the unresolved symbols __crc_exported_symbol with
186 # the actual value of the checksum generated by genksyms
188 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
189 cmd_modversions = \
190 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
191 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
192 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
193 -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
194 > $(@D)/.tmp_$(@F:.o=.ver); \
195 \
196 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
197 -T $(@D)/.tmp_$(@F:.o=.ver); \
198 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
199 else \
200 mv -f $(@D)/.tmp_$(@F) $@; \
201 fi;
202 endif
204 define rule_cc_o_c
205 $(call echo-cmd,checksrc) $(cmd_checksrc) \
206 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
207 $(cmd_modversions) \
208 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp; \
209 rm -f $(depfile); \
210 mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
211 endef
213 # Built-in and composite module parts
215 %.o: %.c FORCE
216 $(call cmd,force_checksrc)
217 $(call if_changed_rule,cc_o_c)
219 # Single-part modules are special since we need to mark them in $(MODVERDIR)
221 $(single-used-m): %.o: %.c FORCE
222 $(call cmd,force_checksrc)
223 $(call if_changed_rule,cc_o_c)
224 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
226 quiet_cmd_cc_lst_c = MKLST $@
227 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
228 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
229 System.map $(OBJDUMP) > $@
231 %.lst: %.c FORCE
232 $(call if_changed_dep,cc_lst_c)
234 # Compile assembler sources (.S)
235 # ---------------------------------------------------------------------------
237 modkern_aflags := $(AFLAGS_KERNEL)
239 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
240 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
242 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
243 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
245 %.s: %.S FORCE
246 $(call if_changed_dep,as_s_S)
248 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
249 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
251 %.o: %.S FORCE
252 $(call if_changed_dep,as_o_S)
254 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
255 targets += $(extra-y) $(MAKECMDGOALS) $(always)
257 # Linker scripts preprocessor (.lds.S -> .lds)
258 # ---------------------------------------------------------------------------
259 quiet_cmd_cpp_lds_S = LDS $@
260 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
262 %.lds: %.lds.S FORCE
263 $(call if_changed_dep,cpp_lds_S)
265 # Build the compiled-in targets
266 # ---------------------------------------------------------------------------
268 # To build objects in subdirs, we need to descend into the directories
269 $(sort $(subdir-obj-y)): $(subdir-ym) ;
271 #
272 # Rule to compile a set of .o files into one .o file
273 #
274 ifdef builtin-target
275 quiet_cmd_link_o_target = LD $@
276 # If the list of objects to link is empty, just create an empty built-in.o
277 cmd_link_o_target = $(if $(strip $(obj-y)),\
278 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
279 rm -f $@; $(AR) rcs $@)
281 $(builtin-target): $(obj-y) FORCE
282 $(call if_changed,link_o_target)
284 targets += $(builtin-target)
285 endif # builtin-target
287 #
288 # Rule to compile a set of .o files into one .a file
289 #
290 ifdef lib-target
291 quiet_cmd_link_l_target = AR $@
292 cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
294 $(lib-target): $(lib-y) FORCE
295 $(call if_changed,link_l_target)
297 targets += $(lib-target)
298 endif
300 #
301 # Rule to link composite objects
302 #
303 # Composite objects are specified in kbuild makefile as follows:
304 # <composite-object>-objs := <list of .o files>
305 # or
306 # <composite-object>-y := <list of .o files>
307 link_multi_deps = \
308 $(filter $(addprefix $(obj)/, \
309 $($(subst $(obj)/,,$(@:.o=-objs))) \
310 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
312 quiet_cmd_link_multi-y = LD $@
313 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
315 quiet_cmd_link_multi-m = LD [M] $@
316 cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
318 # We would rather have a list of rules like
319 # foo.o: $(foo-objs)
320 # but that's not so easy, so we rather make all composite objects depend
321 # on the set of all their parts
322 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
323 $(call if_changed,link_multi-y)
325 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
326 $(call if_changed,link_multi-m)
327 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
329 targets += $(multi-used-y) $(multi-used-m)
332 # Descending
333 # ---------------------------------------------------------------------------
335 PHONY += $(subdir-ym)
336 $(subdir-ym):
337 $(Q)$(MAKE) $(build)=$@
339 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
340 # ---------------------------------------------------------------------------
342 PHONY += FORCE
344 FORCE:
346 # Read all saved command lines and dependencies for the $(targets) we
347 # may be building above, using $(if_changed{,_dep}). As an
348 # optimization, we don't need to read them if the target does not
349 # exist, we will rebuild anyway in that case.
351 targets := $(wildcard $(sort $(targets)))
352 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
354 ifneq ($(cmd_files),)
355 include $(cmd_files)
356 endif
359 # Declare the contents of the .PHONY variable as phony. We keep that
360 # information in a variable se we can use it in if_changed and friends.
362 .PHONY: $(PHONY)