ia64/linux-2.6.18-xen.hg

view drivers/ieee1394/video1394.c @ 893:f994bfe9b93b

linux/blktap2: reduce TLB flush scope

c/s 885 added very coarse TLB flushing. Since these flushes always
follow single page updates, single page flushes (when available) are
sufficient.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jun 04 10:32:57 2009 +0100 (2009-06-04)
parents 831230e53067
children
line source
1 /*
2 * video1394.c - video driver for OHCI 1394 boards
3 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
4 * Peter Schlaile <udbz@rz.uni-karlsruhe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 * NOTES:
21 *
22 * ioctl return codes:
23 * EFAULT is only for invalid address for the argp
24 * EINVAL for out of range values
25 * EBUSY when trying to use an already used resource
26 * ESRCH when trying to free/stop a not used resource
27 * EAGAIN for resource allocation failure that could perhaps succeed later
28 * ENOTTY for unsupported ioctl request
29 *
30 */
31 #include <linux/kernel.h>
32 #include <linux/list.h>
33 #include <linux/slab.h>
34 #include <linux/interrupt.h>
35 #include <linux/wait.h>
36 #include <linux/errno.h>
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/pci.h>
40 #include <linux/fs.h>
41 #include <linux/poll.h>
42 #include <linux/smp_lock.h>
43 #include <linux/delay.h>
44 #include <linux/bitops.h>
45 #include <linux/types.h>
46 #include <linux/vmalloc.h>
47 #include <linux/timex.h>
48 #include <linux/mm.h>
49 #include <linux/compat.h>
50 #include <linux/cdev.h>
52 #include "ieee1394.h"
53 #include "ieee1394_types.h"
54 #include "hosts.h"
55 #include "ieee1394_core.h"
56 #include "highlevel.h"
57 #include "video1394.h"
58 #include "nodemgr.h"
59 #include "dma.h"
61 #include "ohci1394.h"
63 #define ISO_CHANNELS 64
65 struct it_dma_prg {
66 struct dma_cmd begin;
67 quadlet_t data[4];
68 struct dma_cmd end;
69 quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
70 };
72 struct dma_iso_ctx {
73 struct ti_ohci *ohci;
74 int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
75 struct ohci1394_iso_tasklet iso_tasklet;
76 int channel;
77 int ctx;
78 int last_buffer;
79 int * next_buffer; /* For ISO Transmit of video packets
80 to write the correct SYT field
81 into the next block */
82 unsigned int num_desc;
83 unsigned int buf_size;
84 unsigned int frame_size;
85 unsigned int packet_size;
86 unsigned int left_size;
87 unsigned int nb_cmd;
89 struct dma_region dma;
91 struct dma_prog_region *prg_reg;
93 struct dma_cmd **ir_prg;
94 struct it_dma_prg **it_prg;
96 unsigned int *buffer_status;
97 unsigned int *buffer_prg_assignment;
98 struct timeval *buffer_time; /* time when the buffer was received */
99 unsigned int *last_used_cmd; /* For ISO Transmit with
100 variable sized packets only ! */
101 int ctrlClear;
102 int ctrlSet;
103 int cmdPtr;
104 int ctxMatch;
105 wait_queue_head_t waitq;
106 spinlock_t lock;
107 unsigned int syt_offset;
108 int flags;
110 struct list_head link;
111 };
114 struct file_ctx {
115 struct ti_ohci *ohci;
116 struct list_head context_list;
117 struct dma_iso_ctx *current_ctx;
118 };
120 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
121 #define VIDEO1394_DEBUG
122 #endif
124 #ifdef DBGMSG
125 #undef DBGMSG
126 #endif
128 #ifdef VIDEO1394_DEBUG
129 #define DBGMSG(card, fmt, args...) \
130 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
131 #else
132 #define DBGMSG(card, fmt, args...)
133 #endif
135 /* print general (card independent) information */
136 #define PRINT_G(level, fmt, args...) \
137 printk(level "video1394: " fmt "\n" , ## args)
139 /* print card specific information */
140 #define PRINT(level, card, fmt, args...) \
141 printk(level "video1394_%d: " fmt "\n" , card , ## args)
143 static void wakeup_dma_ir_ctx(unsigned long l);
144 static void wakeup_dma_it_ctx(unsigned long l);
146 static struct hpsb_highlevel video1394_highlevel;
148 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
149 {
150 int i;
152 DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
154 ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
155 if (d->iso_tasklet.link.next != NULL)
156 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
158 dma_region_free(&d->dma);
160 if (d->prg_reg) {
161 for (i = 0; i < d->num_desc; i++)
162 dma_prog_region_free(&d->prg_reg[i]);
163 kfree(d->prg_reg);
164 }
166 kfree(d->ir_prg);
167 kfree(d->it_prg);
168 kfree(d->buffer_status);
169 kfree(d->buffer_prg_assignment);
170 kfree(d->buffer_time);
171 kfree(d->last_used_cmd);
172 kfree(d->next_buffer);
173 list_del(&d->link);
174 kfree(d);
176 return 0;
177 }
179 static struct dma_iso_ctx *
180 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
181 int buf_size, int channel, unsigned int packet_size)
182 {
183 struct dma_iso_ctx *d;
184 int i;
186 d = kzalloc(sizeof(*d), GFP_KERNEL);
187 if (!d) {
188 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
189 return NULL;
190 }
192 d->ohci = ohci;
193 d->type = type;
194 d->channel = channel;
195 d->num_desc = num_desc;
196 d->frame_size = buf_size;
197 d->buf_size = PAGE_ALIGN(buf_size);
198 d->last_buffer = -1;
199 INIT_LIST_HEAD(&d->link);
200 init_waitqueue_head(&d->waitq);
202 /* Init the regions for easy cleanup */
203 dma_region_init(&d->dma);
205 if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
206 PCI_DMA_BIDIRECTIONAL)) {
207 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
208 free_dma_iso_ctx(d);
209 return NULL;
210 }
212 if (type == OHCI_ISO_RECEIVE)
213 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
214 wakeup_dma_ir_ctx,
215 (unsigned long) d);
216 else
217 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
218 wakeup_dma_it_ctx,
219 (unsigned long) d);
221 if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
222 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
223 type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
224 free_dma_iso_ctx(d);
225 return NULL;
226 }
227 d->ctx = d->iso_tasklet.context;
229 d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
230 if (!d->prg_reg) {
231 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
232 free_dma_iso_ctx(d);
233 return NULL;
234 }
235 /* Makes for easier cleanup */
236 for (i = 0; i < d->num_desc; i++)
237 dma_prog_region_init(&d->prg_reg[i]);
239 if (type == OHCI_ISO_RECEIVE) {
240 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
241 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
242 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
243 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
245 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
246 GFP_KERNEL);
248 if (!d->ir_prg) {
249 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
250 free_dma_iso_ctx(d);
251 return NULL;
252 }
254 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
255 d->left_size = (d->frame_size % PAGE_SIZE) ?
256 d->frame_size % PAGE_SIZE : PAGE_SIZE;
258 for (i = 0;i < d->num_desc; i++) {
259 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
260 sizeof(struct dma_cmd), ohci->dev)) {
261 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
262 free_dma_iso_ctx(d);
263 return NULL;
264 }
265 d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
266 }
268 } else { /* OHCI_ISO_TRANSMIT */
269 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
270 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
271 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
273 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
274 GFP_KERNEL);
276 if (!d->it_prg) {
277 PRINT(KERN_ERR, ohci->host->id,
278 "Failed to allocate dma it prg");
279 free_dma_iso_ctx(d);
280 return NULL;
281 }
283 d->packet_size = packet_size;
285 if (PAGE_SIZE % packet_size || packet_size>4096) {
286 PRINT(KERN_ERR, ohci->host->id,
287 "Packet size %d (page_size: %ld) "
288 "not yet supported\n",
289 packet_size, PAGE_SIZE);
290 free_dma_iso_ctx(d);
291 return NULL;
292 }
294 d->nb_cmd = d->frame_size / d->packet_size;
295 if (d->frame_size % d->packet_size) {
296 d->nb_cmd++;
297 d->left_size = d->frame_size % d->packet_size;
298 } else
299 d->left_size = d->packet_size;
301 for (i = 0; i < d->num_desc; i++) {
302 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
303 sizeof(struct it_dma_prg), ohci->dev)) {
304 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
305 free_dma_iso_ctx(d);
306 return NULL;
307 }
308 d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
309 }
310 }
312 d->buffer_status =
313 kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
314 d->buffer_prg_assignment =
315 kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
316 d->buffer_time =
317 kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
318 d->last_used_cmd =
319 kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
320 d->next_buffer =
321 kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
323 if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
324 !d->last_used_cmd || !d->next_buffer) {
325 PRINT(KERN_ERR, ohci->host->id,
326 "Failed to allocate dma_iso_ctx member");
327 free_dma_iso_ctx(d);
328 return NULL;
329 }
331 spin_lock_init(&d->lock);
333 DBGMSG(ohci->host->id, "Iso %s DMA: %d buffers "
334 "of size %d allocated for a frame size %d, each with %d prgs",
335 (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
336 d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
338 return d;
339 }
341 static void reset_ir_status(struct dma_iso_ctx *d, int n)
342 {
343 int i;
344 d->ir_prg[n][0].status = cpu_to_le32(4);
345 d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
346 for (i = 2; i < d->nb_cmd - 1; i++)
347 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
348 d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
349 }
351 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
352 {
353 struct dma_cmd *ir_prg = d->ir_prg[n];
354 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
355 int i;
357 d->buffer_prg_assignment[n] = buffer;
359 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
360 (unsigned long)d->dma.kvirt));
361 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
362 (buf + 4) - (unsigned long)d->dma.kvirt));
364 for (i=2;i<d->nb_cmd-1;i++) {
365 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
366 (buf+(i-1)*PAGE_SIZE) -
367 (unsigned long)d->dma.kvirt));
368 }
370 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
371 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
372 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
373 (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
374 }
376 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
377 {
378 struct dma_cmd *ir_prg = d->ir_prg[n];
379 struct dma_prog_region *ir_reg = &d->prg_reg[n];
380 unsigned long buf = (unsigned long)d->dma.kvirt;
381 int i;
383 /* the first descriptor will read only 4 bytes */
384 ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
385 DMA_CTL_BRANCH | 4);
387 /* set the sync flag */
388 if (flags & VIDEO1394_SYNC_FRAMES)
389 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
391 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
392 (unsigned long)d->dma.kvirt));
393 ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
394 1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
396 /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
397 if (d->nb_cmd > 2) {
398 /* The second descriptor will read PAGE_SIZE-4 bytes */
399 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
400 DMA_CTL_BRANCH | (PAGE_SIZE-4));
401 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
402 (unsigned long)d->dma.kvirt));
403 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
404 2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
406 for (i = 2; i < d->nb_cmd - 1; i++) {
407 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
408 DMA_CTL_BRANCH | PAGE_SIZE);
409 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
410 (buf+(i-1)*PAGE_SIZE) -
411 (unsigned long)d->dma.kvirt));
413 ir_prg[i].branchAddress =
414 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
415 (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
416 }
418 /* The last descriptor will generate an interrupt */
419 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
420 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
421 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
422 (buf+(i-1)*PAGE_SIZE) -
423 (unsigned long)d->dma.kvirt));
424 } else {
425 /* Only one DMA page is used. Read d->left_size immediately and */
426 /* generate an interrupt as this is also the last page. */
427 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
428 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
429 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
430 (buf + 4) - (unsigned long)d->dma.kvirt));
431 }
432 }
434 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
435 {
436 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
437 int i;
439 d->flags = flags;
441 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
443 for (i=0;i<d->num_desc;i++) {
444 initialize_dma_ir_prg(d, i, flags);
445 reset_ir_status(d, i);
446 }
448 /* reset the ctrl register */
449 reg_write(ohci, d->ctrlClear, 0xf0000000);
451 /* Set bufferFill */
452 reg_write(ohci, d->ctrlSet, 0x80000000);
454 /* Set isoch header */
455 if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
456 reg_write(ohci, d->ctrlSet, 0x40000000);
458 /* Set the context match register to match on all tags,
459 sync for sync tag, and listen to d->channel */
460 reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
462 /* Set up isoRecvIntMask to generate interrupts */
463 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
464 }
466 /* find which context is listening to this channel */
467 static struct dma_iso_ctx *
468 find_ctx(struct list_head *list, int type, int channel)
469 {
470 struct dma_iso_ctx *ctx;
472 list_for_each_entry(ctx, list, link) {
473 if (ctx->type == type && ctx->channel == channel)
474 return ctx;
475 }
477 return NULL;
478 }
480 static void wakeup_dma_ir_ctx(unsigned long l)
481 {
482 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
483 int i;
485 spin_lock(&d->lock);
487 for (i = 0; i < d->num_desc; i++) {
488 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
489 reset_ir_status(d, i);
490 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
491 do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]);
492 }
493 }
495 spin_unlock(&d->lock);
497 if (waitqueue_active(&d->waitq))
498 wake_up_interruptible(&d->waitq);
499 }
501 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
502 int n)
503 {
504 unsigned char* buf = d->dma.kvirt + n * d->buf_size;
505 u32 cycleTimer;
506 u32 timeStamp;
508 if (n == -1) {
509 return;
510 }
512 cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
514 timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
515 timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
516 + (cycleTimer & 0xf000)) & 0xffff;
518 buf[6] = timeStamp >> 8;
519 buf[7] = timeStamp & 0xff;
521 /* if first packet is empty packet, then put timestamp into the next full one too */
522 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
523 buf += d->packet_size;
524 buf[6] = timeStamp >> 8;
525 buf[7] = timeStamp & 0xff;
526 }
528 /* do the next buffer frame too in case of irq latency */
529 n = d->next_buffer[n];
530 if (n == -1) {
531 return;
532 }
533 buf = d->dma.kvirt + n * d->buf_size;
535 timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
537 buf[6] = timeStamp >> 8;
538 buf[7] = timeStamp & 0xff;
540 /* if first packet is empty packet, then put timestamp into the next full one too */
541 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
542 buf += d->packet_size;
543 buf[6] = timeStamp >> 8;
544 buf[7] = timeStamp & 0xff;
545 }
547 #if 0
548 printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
549 curr, n, cycleTimer, timeStamp);
550 #endif
551 }
553 static void wakeup_dma_it_ctx(unsigned long l)
554 {
555 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
556 struct ti_ohci *ohci = d->ohci;
557 int i;
559 spin_lock(&d->lock);
561 for (i = 0; i < d->num_desc; i++) {
562 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
563 cpu_to_le32(0xFFFF0000)) {
564 int next = d->next_buffer[i];
565 put_timestamp(ohci, d, next);
566 d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
567 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
568 }
569 }
571 spin_unlock(&d->lock);
573 if (waitqueue_active(&d->waitq))
574 wake_up_interruptible(&d->waitq);
575 }
577 static void reprogram_dma_it_prg(struct dma_iso_ctx *d, int n, int buffer)
578 {
579 struct it_dma_prg *it_prg = d->it_prg[n];
580 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
581 int i;
583 d->buffer_prg_assignment[n] = buffer;
584 for (i=0;i<d->nb_cmd;i++) {
585 it_prg[i].end.address =
586 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
587 (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
588 }
589 }
591 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
592 {
593 struct it_dma_prg *it_prg = d->it_prg[n];
594 struct dma_prog_region *it_reg = &d->prg_reg[n];
595 unsigned long buf = (unsigned long)d->dma.kvirt;
596 int i;
597 d->last_used_cmd[n] = d->nb_cmd - 1;
598 for (i=0;i<d->nb_cmd;i++) {
600 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
601 DMA_CTL_IMMEDIATE | 8) ;
602 it_prg[i].begin.address = 0;
604 it_prg[i].begin.status = 0;
606 it_prg[i].data[0] = cpu_to_le32(
607 (IEEE1394_SPEED_100 << 16)
608 | (/* tag */ 1 << 14)
609 | (d->channel << 8)
610 | (TCODE_ISO_DATA << 4));
611 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
612 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
613 it_prg[i].data[2] = 0;
614 it_prg[i].data[3] = 0;
616 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
617 DMA_CTL_BRANCH);
618 it_prg[i].end.address =
619 cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
620 (unsigned long)d->dma.kvirt));
622 if (i<d->nb_cmd-1) {
623 it_prg[i].end.control |= cpu_to_le32(d->packet_size);
624 it_prg[i].begin.branchAddress =
625 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
626 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
627 it_prg[i].end.branchAddress =
628 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
629 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
630 } else {
631 /* the last prg generates an interrupt */
632 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
633 DMA_CTL_IRQ | d->left_size);
634 /* the last prg doesn't branch */
635 it_prg[i].begin.branchAddress = 0;
636 it_prg[i].end.branchAddress = 0;
637 }
638 it_prg[i].end.status = 0;
639 }
640 }
642 static void initialize_dma_it_prg_var_packet_queue(
643 struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
644 struct ti_ohci *ohci)
645 {
646 struct it_dma_prg *it_prg = d->it_prg[n];
647 struct dma_prog_region *it_reg = &d->prg_reg[n];
648 int i;
650 #if 0
651 if (n != -1) {
652 put_timestamp(ohci, d, n);
653 }
654 #endif
655 d->last_used_cmd[n] = d->nb_cmd - 1;
657 for (i = 0; i < d->nb_cmd; i++) {
658 unsigned int size;
659 if (packet_sizes[i] > d->packet_size) {
660 size = d->packet_size;
661 } else {
662 size = packet_sizes[i];
663 }
664 it_prg[i].data[1] = cpu_to_le32(size << 16);
665 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
667 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
668 it_prg[i].end.control |= cpu_to_le32(size);
669 it_prg[i].begin.branchAddress =
670 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
671 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
672 it_prg[i].end.branchAddress =
673 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
674 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
675 } else {
676 /* the last prg generates an interrupt */
677 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
678 DMA_CTL_IRQ | size);
679 /* the last prg doesn't branch */
680 it_prg[i].begin.branchAddress = 0;
681 it_prg[i].end.branchAddress = 0;
682 d->last_used_cmd[n] = i;
683 break;
684 }
685 }
686 }
688 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
689 unsigned int syt_offset, int flags)
690 {
691 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
692 int i;
694 d->flags = flags;
695 d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
697 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
699 for (i=0;i<d->num_desc;i++)
700 initialize_dma_it_prg(d, i, sync_tag);
702 /* Set up isoRecvIntMask to generate interrupts */
703 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
704 }
706 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
707 unsigned int buffer)
708 {
709 unsigned long flags;
710 unsigned int ret;
711 spin_lock_irqsave(&d->lock, flags);
712 ret = d->buffer_status[buffer];
713 spin_unlock_irqrestore(&d->lock, flags);
714 return ret;
715 }
717 static int __video1394_ioctl(struct file *file,
718 unsigned int cmd, unsigned long arg)
719 {
720 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
721 struct ti_ohci *ohci = ctx->ohci;
722 unsigned long flags;
723 void __user *argp = (void __user *)arg;
725 switch(cmd)
726 {
727 case VIDEO1394_IOC_LISTEN_CHANNEL:
728 case VIDEO1394_IOC_TALK_CHANNEL:
729 {
730 struct video1394_mmap v;
731 u64 mask;
732 struct dma_iso_ctx *d;
733 int i;
735 if (copy_from_user(&v, argp, sizeof(v)))
736 return -EFAULT;
738 /* if channel < 0, find lowest available one */
739 if (v.channel < 0) {
740 mask = (u64)0x1;
741 for (i=0; ; i++) {
742 if (i == ISO_CHANNELS) {
743 PRINT(KERN_ERR, ohci->host->id,
744 "No free channel found");
745 return -EAGAIN;
746 }
747 if (!(ohci->ISO_channel_usage & mask)) {
748 v.channel = i;
749 PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
750 break;
751 }
752 mask = mask << 1;
753 }
754 } else if (v.channel >= ISO_CHANNELS) {
755 PRINT(KERN_ERR, ohci->host->id,
756 "Iso channel %d out of bounds", v.channel);
757 return -EINVAL;
758 } else {
759 mask = (u64)0x1<<v.channel;
760 }
761 DBGMSG(ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
762 (u32)(mask>>32),(u32)(mask&0xffffffff),
763 (u32)(ohci->ISO_channel_usage>>32),
764 (u32)(ohci->ISO_channel_usage&0xffffffff));
765 if (ohci->ISO_channel_usage & mask) {
766 PRINT(KERN_ERR, ohci->host->id,
767 "Channel %d is already taken", v.channel);
768 return -EBUSY;
769 }
771 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
772 PRINT(KERN_ERR, ohci->host->id,
773 "Invalid %d length buffer requested",v.buf_size);
774 return -EINVAL;
775 }
777 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
778 PRINT(KERN_ERR, ohci->host->id,
779 "Invalid %d buffers requested",v.nb_buffers);
780 return -EINVAL;
781 }
783 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
784 PRINT(KERN_ERR, ohci->host->id,
785 "%d buffers of size %d bytes is too big",
786 v.nb_buffers, v.buf_size);
787 return -EINVAL;
788 }
790 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
791 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
792 v.nb_buffers + 1, v.buf_size,
793 v.channel, 0);
795 if (d == NULL) {
796 PRINT(KERN_ERR, ohci->host->id,
797 "Couldn't allocate ir context");
798 return -EAGAIN;
799 }
800 initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
802 ctx->current_ctx = d;
804 v.buf_size = d->buf_size;
805 list_add_tail(&d->link, &ctx->context_list);
807 DBGMSG(ohci->host->id,
808 "iso context %d listen on channel %d",
809 d->ctx, v.channel);
810 }
811 else {
812 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
813 v.nb_buffers + 1, v.buf_size,
814 v.channel, v.packet_size);
816 if (d == NULL) {
817 PRINT(KERN_ERR, ohci->host->id,
818 "Couldn't allocate it context");
819 return -EAGAIN;
820 }
821 initialize_dma_it_ctx(d, v.sync_tag,
822 v.syt_offset, v.flags);
824 ctx->current_ctx = d;
826 v.buf_size = d->buf_size;
828 list_add_tail(&d->link, &ctx->context_list);
830 DBGMSG(ohci->host->id,
831 "Iso context %d talk on channel %d", d->ctx,
832 v.channel);
833 }
835 if (copy_to_user(argp, &v, sizeof(v))) {
836 /* FIXME : free allocated dma resources */
837 return -EFAULT;
838 }
840 ohci->ISO_channel_usage |= mask;
842 return 0;
843 }
844 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
845 case VIDEO1394_IOC_UNTALK_CHANNEL:
846 {
847 int channel;
848 u64 mask;
849 struct dma_iso_ctx *d;
851 if (copy_from_user(&channel, argp, sizeof(int)))
852 return -EFAULT;
854 if (channel < 0 || channel >= ISO_CHANNELS) {
855 PRINT(KERN_ERR, ohci->host->id,
856 "Iso channel %d out of bound", channel);
857 return -EINVAL;
858 }
859 mask = (u64)0x1<<channel;
860 if (!(ohci->ISO_channel_usage & mask)) {
861 PRINT(KERN_ERR, ohci->host->id,
862 "Channel %d is not being used", channel);
863 return -ESRCH;
864 }
866 /* Mark this channel as unused */
867 ohci->ISO_channel_usage &= ~mask;
869 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
870 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
871 else
872 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
874 if (d == NULL) return -ESRCH;
875 DBGMSG(ohci->host->id, "Iso context %d "
876 "stop talking on channel %d", d->ctx, channel);
877 free_dma_iso_ctx(d);
879 return 0;
880 }
881 case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
882 {
883 struct video1394_wait v;
884 struct dma_iso_ctx *d;
885 int next_prg;
887 if (copy_from_user(&v, argp, sizeof(v)))
888 return -EFAULT;
890 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
891 if (d == NULL) return -EFAULT;
893 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
894 PRINT(KERN_ERR, ohci->host->id,
895 "Buffer %d out of range",v.buffer);
896 return -EINVAL;
897 }
899 spin_lock_irqsave(&d->lock,flags);
901 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
902 PRINT(KERN_ERR, ohci->host->id,
903 "Buffer %d is already used",v.buffer);
904 spin_unlock_irqrestore(&d->lock,flags);
905 return -EBUSY;
906 }
908 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
910 next_prg = (d->last_buffer + 1) % d->num_desc;
911 if (d->last_buffer>=0)
912 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
913 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
914 & 0xfffffff0) | 0x1);
916 d->last_buffer = next_prg;
917 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
919 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
921 spin_unlock_irqrestore(&d->lock,flags);
923 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
924 {
925 DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
927 /* Tell the controller where the first program is */
928 reg_write(ohci, d->cmdPtr,
929 dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
931 /* Run IR context */
932 reg_write(ohci, d->ctrlSet, 0x8000);
933 }
934 else {
935 /* Wake up dma context if necessary */
936 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
937 DBGMSG(ohci->host->id,
938 "Waking up iso dma ctx=%d", d->ctx);
939 reg_write(ohci, d->ctrlSet, 0x1000);
940 }
941 }
942 return 0;
944 }
945 case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
946 case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
947 {
948 struct video1394_wait v;
949 struct dma_iso_ctx *d;
950 int i = 0;
952 if (copy_from_user(&v, argp, sizeof(v)))
953 return -EFAULT;
955 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
956 if (d == NULL) return -EFAULT;
958 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
959 PRINT(KERN_ERR, ohci->host->id,
960 "Buffer %d out of range",v.buffer);
961 return -EINVAL;
962 }
964 /*
965 * I change the way it works so that it returns
966 * the last received frame.
967 */
968 spin_lock_irqsave(&d->lock, flags);
969 switch(d->buffer_status[v.buffer]) {
970 case VIDEO1394_BUFFER_READY:
971 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
972 break;
973 case VIDEO1394_BUFFER_QUEUED:
974 if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
975 /* for polling, return error code EINTR */
976 spin_unlock_irqrestore(&d->lock, flags);
977 return -EINTR;
978 }
980 spin_unlock_irqrestore(&d->lock, flags);
981 wait_event_interruptible(d->waitq,
982 video1394_buffer_state(d, v.buffer) ==
983 VIDEO1394_BUFFER_READY);
984 if (signal_pending(current))
985 return -EINTR;
986 spin_lock_irqsave(&d->lock, flags);
987 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
988 break;
989 default:
990 PRINT(KERN_ERR, ohci->host->id,
991 "Buffer %d is not queued",v.buffer);
992 spin_unlock_irqrestore(&d->lock, flags);
993 return -ESRCH;
994 }
996 /* set time of buffer */
997 v.filltime = d->buffer_time[v.buffer];
999 /*
1000 * Look ahead to see how many more buffers have been received
1001 */
1002 i=0;
1003 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1004 VIDEO1394_BUFFER_READY) {
1005 v.buffer=(v.buffer+1)%(d->num_desc - 1);
1006 i++;
1008 spin_unlock_irqrestore(&d->lock, flags);
1010 v.buffer=i;
1011 if (copy_to_user(argp, &v, sizeof(v)))
1012 return -EFAULT;
1014 return 0;
1016 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1018 struct video1394_wait v;
1019 unsigned int *psizes = NULL;
1020 struct dma_iso_ctx *d;
1021 int next_prg;
1023 if (copy_from_user(&v, argp, sizeof(v)))
1024 return -EFAULT;
1026 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1027 if (d == NULL) return -EFAULT;
1029 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1030 PRINT(KERN_ERR, ohci->host->id,
1031 "Buffer %d out of range",v.buffer);
1032 return -EINVAL;
1035 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1036 int buf_size = d->nb_cmd * sizeof(*psizes);
1037 struct video1394_queue_variable __user *p = argp;
1038 unsigned int __user *qv;
1040 if (get_user(qv, &p->packet_sizes))
1041 return -EFAULT;
1043 psizes = kmalloc(buf_size, GFP_KERNEL);
1044 if (!psizes)
1045 return -ENOMEM;
1047 if (copy_from_user(psizes, qv, buf_size)) {
1048 kfree(psizes);
1049 return -EFAULT;
1053 spin_lock_irqsave(&d->lock,flags);
1055 /* last_buffer is last_prg */
1056 next_prg = (d->last_buffer + 1) % d->num_desc;
1057 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1058 PRINT(KERN_ERR, ohci->host->id,
1059 "Buffer %d is already used",v.buffer);
1060 spin_unlock_irqrestore(&d->lock,flags);
1061 kfree(psizes);
1062 return -EBUSY;
1065 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1066 initialize_dma_it_prg_var_packet_queue(
1067 d, next_prg, psizes, ohci);
1070 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1072 if (d->last_buffer >= 0) {
1073 d->it_prg[d->last_buffer]
1074 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1075 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1076 0) & 0xfffffff0) | 0x3);
1078 d->it_prg[d->last_buffer]
1079 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1080 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1081 0) & 0xfffffff0) | 0x3);
1082 d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1084 d->last_buffer = next_prg;
1085 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1086 d->next_buffer[d->last_buffer] = -1;
1088 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1090 spin_unlock_irqrestore(&d->lock,flags);
1092 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1094 DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1095 d->ctx);
1096 put_timestamp(ohci, d, d->last_buffer);
1098 /* Tell the controller where the first program is */
1099 reg_write(ohci, d->cmdPtr,
1100 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1102 /* Run IT context */
1103 reg_write(ohci, d->ctrlSet, 0x8000);
1105 else {
1106 /* Wake up dma context if necessary */
1107 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1108 DBGMSG(ohci->host->id,
1109 "Waking up iso transmit dma ctx=%d",
1110 d->ctx);
1111 put_timestamp(ohci, d, d->last_buffer);
1112 reg_write(ohci, d->ctrlSet, 0x1000);
1116 kfree(psizes);
1117 return 0;
1120 case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1122 struct video1394_wait v;
1123 struct dma_iso_ctx *d;
1125 if (copy_from_user(&v, argp, sizeof(v)))
1126 return -EFAULT;
1128 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1129 if (d == NULL) return -EFAULT;
1131 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1132 PRINT(KERN_ERR, ohci->host->id,
1133 "Buffer %d out of range",v.buffer);
1134 return -EINVAL;
1137 switch(d->buffer_status[v.buffer]) {
1138 case VIDEO1394_BUFFER_READY:
1139 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1140 return 0;
1141 case VIDEO1394_BUFFER_QUEUED:
1142 wait_event_interruptible(d->waitq,
1143 (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1144 if (signal_pending(current))
1145 return -EINTR;
1146 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1147 return 0;
1148 default:
1149 PRINT(KERN_ERR, ohci->host->id,
1150 "Buffer %d is not queued",v.buffer);
1151 return -ESRCH;
1154 default:
1155 return -ENOTTY;
1159 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1161 int err;
1162 lock_kernel();
1163 err = __video1394_ioctl(file, cmd, arg);
1164 unlock_kernel();
1165 return err;
1168 /*
1169 * This maps the vmalloced and reserved buffer to user space.
1171 * FIXME:
1172 * - PAGE_READONLY should suffice!?
1173 * - remap_pfn_range is kind of inefficient for page by page remapping.
1174 * But e.g. pte_alloc() does not work in modules ... :-(
1175 */
1177 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1179 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1180 int res = -EINVAL;
1182 lock_kernel();
1183 if (ctx->current_ctx == NULL) {
1184 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1185 } else
1186 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1187 unlock_kernel();
1189 return res;
1192 static int video1394_open(struct inode *inode, struct file *file)
1194 int i = ieee1394_file_to_instance(file);
1195 struct ti_ohci *ohci;
1196 struct file_ctx *ctx;
1198 ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1199 if (ohci == NULL)
1200 return -EIO;
1202 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1203 if (!ctx) {
1204 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1205 return -ENOMEM;
1208 ctx->ohci = ohci;
1209 INIT_LIST_HEAD(&ctx->context_list);
1210 ctx->current_ctx = NULL;
1211 file->private_data = ctx;
1213 return 0;
1216 static int video1394_release(struct inode *inode, struct file *file)
1218 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1219 struct ti_ohci *ohci = ctx->ohci;
1220 struct list_head *lh, *next;
1221 u64 mask;
1223 lock_kernel();
1224 list_for_each_safe(lh, next, &ctx->context_list) {
1225 struct dma_iso_ctx *d;
1226 d = list_entry(lh, struct dma_iso_ctx, link);
1227 mask = (u64) 1 << d->channel;
1229 if (!(ohci->ISO_channel_usage & mask))
1230 PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1231 "is not being used", d->channel);
1232 else
1233 ohci->ISO_channel_usage &= ~mask;
1234 DBGMSG(ohci->host->id, "On release: Iso %s context "
1235 "%d stop listening on channel %d",
1236 d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1237 d->ctx, d->channel);
1238 free_dma_iso_ctx(d);
1241 kfree(ctx);
1242 file->private_data = NULL;
1244 unlock_kernel();
1245 return 0;
1248 #ifdef CONFIG_COMPAT
1249 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1250 #endif
1252 static struct cdev video1394_cdev;
1253 static struct file_operations video1394_fops=
1255 .owner = THIS_MODULE,
1256 .unlocked_ioctl = video1394_ioctl,
1257 #ifdef CONFIG_COMPAT
1258 .compat_ioctl = video1394_compat_ioctl,
1259 #endif
1260 .mmap = video1394_mmap,
1261 .open = video1394_open,
1262 .release = video1394_release
1263 };
1265 /*** HOTPLUG STUFF **********************************************************/
1266 /*
1267 * Export information about protocols/devices supported by this driver.
1268 */
1269 static struct ieee1394_device_id video1394_id_table[] = {
1271 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1272 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1273 .version = CAMERA_SW_VERSION_ENTRY & 0xffffff
1274 },
1276 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1277 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1278 .version = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1279 },
1281 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1282 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1283 .version = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1284 },
1285 { }
1286 };
1288 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1290 static struct hpsb_protocol_driver video1394_driver = {
1291 .name = "1394 Digital Camera Driver",
1292 .id_table = video1394_id_table,
1293 .driver = {
1294 .name = VIDEO1394_DRIVER_NAME,
1295 .bus = &ieee1394_bus_type,
1296 },
1297 };
1300 static void video1394_add_host (struct hpsb_host *host)
1302 struct ti_ohci *ohci;
1303 int minor;
1305 /* We only work with the OHCI-1394 driver */
1306 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1307 return;
1309 ohci = (struct ti_ohci *)host->hostdata;
1311 if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1312 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1313 return;
1316 hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1317 hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1319 minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1320 class_device_create(hpsb_protocol_class, NULL, MKDEV(
1321 IEEE1394_MAJOR, minor),
1322 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1326 static void video1394_remove_host (struct hpsb_host *host)
1328 struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1330 if (ohci)
1331 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1332 IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1333 return;
1337 static struct hpsb_highlevel video1394_highlevel = {
1338 .name = VIDEO1394_DRIVER_NAME,
1339 .add_host = video1394_add_host,
1340 .remove_host = video1394_remove_host,
1341 };
1343 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1344 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1345 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1346 MODULE_LICENSE("GPL");
1348 #ifdef CONFIG_COMPAT
1350 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER \
1351 _IOW ('#', 0x12, struct video1394_wait32)
1352 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER \
1353 _IOWR('#', 0x13, struct video1394_wait32)
1354 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER \
1355 _IOW ('#', 0x17, struct video1394_wait32)
1356 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER \
1357 _IOWR('#', 0x18, struct video1394_wait32)
1359 struct video1394_wait32 {
1360 u32 channel;
1361 u32 buffer;
1362 struct compat_timeval filltime;
1363 };
1365 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1367 struct video1394_wait32 __user *argp = (void __user *)arg;
1368 struct video1394_wait32 wait32;
1369 struct video1394_wait wait;
1370 mm_segment_t old_fs;
1371 int ret;
1373 if (copy_from_user(&wait32, argp, sizeof(wait32)))
1374 return -EFAULT;
1376 wait.channel = wait32.channel;
1377 wait.buffer = wait32.buffer;
1378 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1379 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1381 old_fs = get_fs();
1382 set_fs(KERNEL_DS);
1383 if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1384 ret = video1394_ioctl(file,
1385 VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1386 (unsigned long) &wait);
1387 else
1388 ret = video1394_ioctl(file,
1389 VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1390 (unsigned long) &wait);
1391 set_fs(old_fs);
1393 if (!ret) {
1394 wait32.channel = wait.channel;
1395 wait32.buffer = wait.buffer;
1396 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1397 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1399 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1400 ret = -EFAULT;
1403 return ret;
1406 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1408 struct video1394_wait32 wait32;
1409 struct video1394_wait wait;
1410 mm_segment_t old_fs;
1411 int ret;
1413 if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1414 return -EFAULT;
1416 wait.channel = wait32.channel;
1417 wait.buffer = wait32.buffer;
1418 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1419 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1421 old_fs = get_fs();
1422 set_fs(KERNEL_DS);
1423 if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1424 ret = video1394_ioctl(file,
1425 VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1426 (unsigned long) &wait);
1427 else
1428 ret = video1394_ioctl(file,
1429 VIDEO1394_IOC_TALK_WAIT_BUFFER,
1430 (unsigned long) &wait);
1431 set_fs(old_fs);
1433 return ret;
1436 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1438 return -EFAULT; /* ??? was there before. */
1440 return video1394_ioctl(file,
1441 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1444 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1446 switch (cmd) {
1447 case VIDEO1394_IOC_LISTEN_CHANNEL:
1448 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1449 case VIDEO1394_IOC_TALK_CHANNEL:
1450 case VIDEO1394_IOC_UNTALK_CHANNEL:
1451 return video1394_ioctl(f, cmd, arg);
1453 case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1454 return video1394_w_wait32(f, cmd, arg);
1455 case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1456 return video1394_wr_wait32(f, cmd, arg);
1457 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1458 return video1394_queue_buf32(f, cmd, arg);
1459 case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1460 return video1394_w_wait32(f, cmd, arg);
1461 case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1462 return video1394_wr_wait32(f, cmd, arg);
1463 default:
1464 return -ENOIOCTLCMD;
1468 #endif /* CONFIG_COMPAT */
1470 static void __exit video1394_exit_module (void)
1472 hpsb_unregister_protocol(&video1394_driver);
1473 hpsb_unregister_highlevel(&video1394_highlevel);
1474 cdev_del(&video1394_cdev);
1475 PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1478 static int __init video1394_init_module (void)
1480 int ret;
1482 cdev_init(&video1394_cdev, &video1394_fops);
1483 video1394_cdev.owner = THIS_MODULE;
1484 kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1485 ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1486 if (ret) {
1487 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1488 return ret;
1491 hpsb_register_highlevel(&video1394_highlevel);
1493 ret = hpsb_register_protocol(&video1394_driver);
1494 if (ret) {
1495 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1496 hpsb_unregister_highlevel(&video1394_highlevel);
1497 cdev_del(&video1394_cdev);
1498 return ret;
1501 PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1502 return 0;
1506 module_init(video1394_init_module);
1507 module_exit(video1394_exit_module);