ia64/linux-2.6.18-xen.hg

view drivers/ide/setup-pci.c @ 893:f994bfe9b93b

linux/blktap2: reduce TLB flush scope

c/s 885 added very coarse TLB flushing. Since these flushes always
follow single page updates, single page flushes (when available) are
sufficient.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jun 04 10:32:57 2009 +0100 (2009-06-04)
parents 831230e53067
children
line source
1 /*
2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
3 *
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
5 *
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
8 *
9 * Recent Changes
10 * Split the set up function into multiple functions
11 * Use pci_set_master
12 * Fix misreporting of I/O v MMIO problems
13 * Initial fixups for simplex devices
14 */
16 /*
17 * This module provides support for automatic detection and
18 * configuration of all PCI IDE interfaces present in a system.
19 */
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/kernel.h>
24 #include <linux/pci.h>
25 #include <linux/init.h>
26 #include <linux/timer.h>
27 #include <linux/mm.h>
28 #include <linux/interrupt.h>
29 #include <linux/ide.h>
30 #include <linux/dma-mapping.h>
32 #include <asm/io.h>
33 #include <asm/irq.h>
36 /**
37 * ide_match_hwif - match a PCI IDE against an ide_hwif
38 * @io_base: I/O base of device
39 * @bootable: set if its bootable
40 * @name: name of device
41 *
42 * Match a PCI IDE port against an entry in ide_hwifs[],
43 * based on io_base port if possible. Return the matching hwif,
44 * or a new hwif. If we find an error (clashing, out of devices, etc)
45 * return NULL
46 *
47 * FIXME: we need to handle mmio matches here too
48 */
50 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
51 {
52 int h;
53 ide_hwif_t *hwif;
55 /*
56 * Look for a hwif with matching io_base specified using
57 * parameters to ide_setup().
58 */
59 for (h = 0; h < MAX_HWIFS; ++h) {
60 hwif = &ide_hwifs[h];
61 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
62 if (hwif->chipset == ide_forced)
63 return hwif; /* a perfect match */
64 }
65 }
66 /*
67 * Look for a hwif with matching io_base default value.
68 * If chipset is "ide_unknown", then claim that hwif slot.
69 * Otherwise, some other chipset has already claimed it.. :(
70 */
71 for (h = 0; h < MAX_HWIFS; ++h) {
72 hwif = &ide_hwifs[h];
73 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
74 if (hwif->chipset == ide_unknown)
75 return hwif; /* match */
76 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
77 name, io_base, hwif->name);
78 return NULL; /* already claimed */
79 }
80 }
81 /*
82 * Okay, there is no hwif matching our io_base,
83 * so we'll just claim an unassigned slot.
84 * Give preference to claiming other slots before claiming ide0/ide1,
85 * just in case there's another interface yet-to-be-scanned
86 * which uses ports 1f0/170 (the ide0/ide1 defaults).
87 *
88 * Unless there is a bootable card that does not use the standard
89 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
90 */
91 if (bootable) {
92 for (h = 0; h < MAX_HWIFS; ++h) {
93 hwif = &ide_hwifs[h];
94 if (hwif->chipset == ide_unknown)
95 return hwif; /* pick an unused entry */
96 }
97 } else {
98 for (h = 2; h < MAX_HWIFS; ++h) {
99 hwif = ide_hwifs + h;
100 if (hwif->chipset == ide_unknown)
101 return hwif; /* pick an unused entry */
102 }
103 }
104 for (h = 0; h < 2; ++h) {
105 hwif = ide_hwifs + h;
106 if (hwif->chipset == ide_unknown)
107 return hwif; /* pick an unused entry */
108 }
109 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
110 return NULL;
111 }
113 /**
114 * ide_setup_pci_baseregs - place a PCI IDE controller native
115 * @dev: PCI device of interface to switch native
116 * @name: Name of interface
117 *
118 * We attempt to place the PCI interface into PCI native mode. If
119 * we succeed the BARs are ok and the controller is in PCI mode.
120 * Returns 0 on success or an errno code.
121 *
122 * FIXME: if we program the interface and then fail to set the BARS
123 * we don't switch it back to legacy mode. Do we actually care ??
124 */
126 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
127 {
128 u8 progif = 0;
130 /*
131 * Place both IDE interfaces into PCI "native" mode:
132 */
133 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
134 (progif & 5) != 5) {
135 if ((progif & 0xa) != 0xa) {
136 printk(KERN_INFO "%s: device not capable of full "
137 "native PCI mode\n", name);
138 return -EOPNOTSUPP;
139 }
140 printk("%s: placing both ports into native PCI mode\n", name);
141 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
142 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
143 (progif & 5) != 5) {
144 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
145 "0x%04x, got 0x%04x\n",
146 name, progif|5, progif);
147 return -EOPNOTSUPP;
148 }
149 }
150 return 0;
151 }
153 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
155 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
156 /*
157 * Long lost data from 2.0.34 that is now in 2.0.39
158 *
159 * This was used in ./drivers/block/triton.c to do DMA Base address setup
160 * when PnP failed. Oh the things we forget. I believe this was part
161 * of SFF-8038i that has been withdrawn from public access... :-((
162 */
163 #define DEFAULT_BMIBA 0xe800 /* in case BIOS did not init it */
164 #define DEFAULT_BMCRBA 0xcc00 /* VIA's default value */
165 #define DEFAULT_BMALIBA 0xd400 /* ALI's default value */
166 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
168 /**
169 * ide_get_or_set_dma_base - setup BMIBA
170 * @hwif: Interface
171 *
172 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space:
173 * If need be we set up the DMA base. Where a device has a partner that
174 * is already in DMA mode we check and enforce IDE simplex rules.
175 */
177 static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
178 {
179 unsigned long dma_base = 0;
180 struct pci_dev *dev = hwif->pci_dev;
182 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
183 int second_chance = 0;
185 second_chance_to_dma:
186 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
188 if (hwif->mmio)
189 return hwif->dma_base;
191 if (hwif->mate && hwif->mate->dma_base) {
192 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
193 } else {
194 dma_base = pci_resource_start(dev, 4);
195 if (!dma_base) {
196 printk(KERN_ERR "%s: dma_base is invalid\n",
197 hwif->cds->name);
198 }
199 }
201 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
202 /* FIXME - should use pci_assign_resource surely */
203 if ((!dma_base) && (!second_chance)) {
204 unsigned long set_bmiba = 0;
205 second_chance++;
206 switch(dev->vendor) {
207 case PCI_VENDOR_ID_AL:
208 set_bmiba = DEFAULT_BMALIBA; break;
209 case PCI_VENDOR_ID_VIA:
210 set_bmiba = DEFAULT_BMCRBA; break;
211 case PCI_VENDOR_ID_INTEL:
212 set_bmiba = DEFAULT_BMIBA; break;
213 default:
214 return dma_base;
215 }
216 pci_write_config_dword(dev, 0x20, set_bmiba|1);
217 goto second_chance_to_dma;
218 }
219 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
221 if (dma_base) {
222 u8 simplex_stat = 0;
223 dma_base += hwif->channel ? 8 : 0;
225 switch(dev->device) {
226 case PCI_DEVICE_ID_AL_M5219:
227 case PCI_DEVICE_ID_AL_M5229:
228 case PCI_DEVICE_ID_AMD_VIPER_7409:
229 case PCI_DEVICE_ID_CMD_643:
230 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
231 case PCI_DEVICE_ID_REVOLUTION:
232 simplex_stat = hwif->INB(dma_base + 2);
233 hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
234 simplex_stat = hwif->INB(dma_base + 2);
235 if (simplex_stat & 0x80) {
236 printk(KERN_INFO "%s: simplex device: "
237 "DMA forced\n",
238 hwif->cds->name);
239 }
240 break;
241 default:
242 /*
243 * If the device claims "simplex" DMA,
244 * this means only one of the two interfaces
245 * can be trusted with DMA at any point in time.
246 * So we should enable DMA only on one of the
247 * two interfaces.
248 */
249 simplex_stat = hwif->INB(dma_base + 2);
250 if (simplex_stat & 0x80) {
251 /* simplex device? */
252 /*
253 * At this point we haven't probed the drives so we can't make the
254 * appropriate decision. Really we should defer this problem
255 * until we tune the drive then try to grab DMA ownership if we want
256 * to be the DMA end. This has to be become dynamic to handle hot
257 * plug.
258 */
259 if (hwif->mate && hwif->mate->dma_base) {
260 printk(KERN_INFO "%s: simplex device: "
261 "DMA disabled\n",
262 hwif->cds->name);
263 dma_base = 0;
264 }
265 }
266 }
267 }
268 return dma_base;
269 }
270 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
272 void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d)
273 {
274 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
275 d->name, pci_name(dev));
276 }
278 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
281 /**
282 * ide_pci_enable - do PCI enables
283 * @dev: PCI device
284 * @d: IDE pci device data
285 *
286 * Enable the IDE PCI device. We attempt to enable the device in full
287 * but if that fails then we only need BAR4 so we will enable that.
288 *
289 * Returns zero on success or an error code
290 */
292 static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
293 {
294 int ret;
296 if (pci_enable_device(dev)) {
297 ret = pci_enable_device_bars(dev, 1 << 4);
298 if (ret < 0) {
299 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
300 "Could not enable device.\n", d->name);
301 goto out;
302 }
303 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
304 }
306 /*
307 * assume all devices can do 32-bit dma for now. we can add a
308 * dma mask field to the ide_pci_device_t if we need it (or let
309 * lower level driver set the dma mask)
310 */
311 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
312 if (ret < 0) {
313 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
314 goto out;
315 }
317 /* FIXME: Temporary - until we put in the hotplug interface logic
318 Check that the bits we want are not in use by someone else. */
319 ret = pci_request_region(dev, 4, "ide_tmp");
320 if (ret < 0)
321 goto out;
323 pci_release_region(dev, 4);
324 out:
325 return ret;
326 }
328 /**
329 * ide_pci_configure - configure an unconfigured device
330 * @dev: PCI device
331 * @d: IDE pci device data
332 *
333 * Enable and configure the PCI device we have been passed.
334 * Returns zero on success or an error code.
335 */
337 static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
338 {
339 u16 pcicmd = 0;
340 /*
341 * PnP BIOS was *supposed* to have setup this device, but we
342 * can do it ourselves, so long as the BIOS has assigned an IRQ
343 * (or possibly the device is using a "legacy header" for IRQs).
344 * Maybe the user deliberately *disabled* the device,
345 * but we'll eventually ignore it again if no drives respond.
346 */
347 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
348 {
349 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
350 return -ENODEV;
351 }
352 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
353 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
354 return -EIO;
355 }
356 if (!(pcicmd & PCI_COMMAND_IO)) {
357 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
358 return -ENXIO;
359 }
360 return 0;
361 }
363 /**
364 * ide_pci_check_iomem - check a register is I/O
365 * @dev: pci device
366 * @d: ide_pci_device
367 * @bar: bar number
368 *
369 * Checks if a BAR is configured and points to MMIO space. If so
370 * print an error and return an error code. Otherwise return 0
371 */
373 static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar)
374 {
375 ulong flags = pci_resource_flags(dev, bar);
377 /* Unconfigured ? */
378 if (!flags || pci_resource_len(dev, bar) == 0)
379 return 0;
381 /* I/O space */
382 if(flags & PCI_BASE_ADDRESS_IO_MASK)
383 return 0;
385 /* Bad */
386 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
387 "as MEM, report to "
388 "<andre@linux-ide.org>.\n", d->name);
389 return -EINVAL;
390 }
392 /**
393 * ide_hwif_configure - configure an IDE interface
394 * @dev: PCI device holding interface
395 * @d: IDE pci data
396 * @mate: Paired interface if any
397 *
398 * Perform the initial set up for the hardware interface structure. This
399 * is done per interface port rather than per PCI device. There may be
400 * more than one port per device.
401 *
402 * Returns the new hardware interface structure, or NULL on a failure
403 */
405 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq)
406 {
407 unsigned long ctl = 0, base = 0;
408 ide_hwif_t *hwif;
410 if ((d->flags & IDEPCI_FLAG_ISA_PORTS) == 0) {
411 /* Possibly we should fail if these checks report true */
412 ide_pci_check_iomem(dev, d, 2*port);
413 ide_pci_check_iomem(dev, d, 2*port+1);
415 ctl = pci_resource_start(dev, 2*port+1);
416 base = pci_resource_start(dev, 2*port);
417 if ((ctl && !base) || (base && !ctl)) {
418 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
419 "for port %d, skipping\n", d->name, port);
420 return NULL;
421 }
422 }
423 if (!ctl)
424 {
425 /* Use default values */
426 ctl = port ? 0x374 : 0x3f4;
427 base = port ? 0x170 : 0x1f0;
428 }
429 if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL)
430 return NULL; /* no room in ide_hwifs[] */
431 if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
432 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
433 memset(&hwif->hw, 0, sizeof(hwif->hw));
434 #ifndef IDE_ARCH_OBSOLETE_INIT
435 ide_std_init_ports(&hwif->hw, base, (ctl | 2));
436 hwif->hw.io_ports[IDE_IRQ_OFFSET] = 0;
437 #else
438 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL);
439 #endif
440 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
441 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
442 }
443 hwif->chipset = ide_pci;
444 hwif->pci_dev = dev;
445 hwif->cds = (struct ide_pci_device_s *) d;
446 hwif->channel = port;
448 if (!hwif->irq)
449 hwif->irq = irq;
450 if (mate) {
451 hwif->mate = mate;
452 mate->mate = hwif;
453 }
454 return hwif;
455 }
457 /**
458 * ide_hwif_setup_dma - configure DMA interface
459 * @dev: PCI device
460 * @d: IDE pci data
461 * @hwif: Hardware interface we are configuring
462 *
463 * Set up the DMA base for the interface. Enable the master bits as
464 * necessary and attempt to bring the device DMA into a ready to use
465 * state
466 */
468 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
469 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
470 {
471 }
472 #else
473 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
474 {
475 u16 pcicmd;
476 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
478 if ((d->autodma == AUTODMA) ||
479 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
480 (dev->class & 0x80))) {
481 unsigned long dma_base = ide_get_or_set_dma_base(hwif);
482 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
483 /*
484 * Set up BM-DMA capability
485 * (PnP BIOS should have done this)
486 */
487 /* default DMA off if we had to configure it here */
488 hwif->autodma = 0;
489 pci_set_master(dev);
490 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
491 printk(KERN_ERR "%s: %s error updating PCICMD\n",
492 hwif->name, d->name);
493 dma_base = 0;
494 }
495 }
496 if (dma_base) {
497 if (d->init_dma) {
498 d->init_dma(hwif, dma_base);
499 } else {
500 ide_setup_dma(hwif, dma_base, 8);
501 }
502 } else {
503 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
504 "(BIOS)\n", hwif->name, d->name);
505 }
506 }
507 }
509 #ifndef CONFIG_IDEDMA_PCI_AUTO
510 #warning CONFIG_IDEDMA_PCI_AUTO=n support is obsolete, and will be removed soon.
511 #endif
513 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
515 /**
516 * ide_setup_pci_controller - set up IDE PCI
517 * @dev: PCI device
518 * @d: IDE PCI data
519 * @noisy: verbose flag
520 * @config: returned as 1 if we configured the hardware
521 *
522 * Set up the PCI and controller side of the IDE interface. This brings
523 * up the PCI side of the device, checks that the device is enabled
524 * and enables it if need be
525 */
527 static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
528 {
529 int ret;
530 u32 class_rev;
531 u16 pcicmd;
533 if (noisy)
534 ide_setup_pci_noise(dev, d);
536 ret = ide_pci_enable(dev, d);
537 if (ret < 0)
538 goto out;
540 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
541 if (ret < 0) {
542 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
543 goto out;
544 }
545 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
546 ret = ide_pci_configure(dev, d);
547 if (ret < 0)
548 goto out;
549 *config = 1;
550 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
551 }
553 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
554 class_rev &= 0xff;
555 if (noisy)
556 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev);
557 out:
558 return ret;
559 }
561 /**
562 * ide_pci_setup_ports - configure ports/devices on PCI IDE
563 * @dev: PCI device
564 * @d: IDE pci device info
565 * @pciirq: IRQ line
566 * @index: ata index to update
567 *
568 * Scan the interfaces attached to this device and do any
569 * necessary per port setup. Attach the devices and ask the
570 * generic DMA layer to do its work for us.
571 *
572 * Normally called automaticall from do_ide_pci_setup_device,
573 * but is also used directly as a helper function by some controllers
574 * where the chipset setup is not the default PCI IDE one.
575 */
577 void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index)
578 {
579 int port;
580 int at_least_one_hwif_enabled = 0;
581 ide_hwif_t *hwif, *mate = NULL;
582 u8 tmp;
584 index->all = 0xf0f0;
586 /*
587 * Set up the IDE ports
588 */
590 for (port = 0; port <= 1; ++port) {
591 ide_pci_enablebit_t *e = &(d->enablebits[port]);
593 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
594 (tmp & e->mask) != e->val))
595 continue; /* port not enabled */
597 if (d->channels <= port)
598 break;
600 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
601 continue;
603 /* setup proper ancestral information */
604 hwif->gendev.parent = &dev->dev;
606 if (hwif->channel) {
607 index->b.high = hwif->index;
608 } else {
609 index->b.low = hwif->index;
610 }
613 if (d->init_iops)
614 d->init_iops(hwif);
616 if (d->autodma == NODMA)
617 goto bypass_legacy_dma;
619 if(d->init_setup_dma)
620 d->init_setup_dma(dev, d, hwif);
621 else
622 ide_hwif_setup_dma(dev, d, hwif);
623 bypass_legacy_dma:
624 if (d->init_hwif)
625 /* Call chipset-specific routine
626 * for each enabled hwif
627 */
628 d->init_hwif(hwif);
630 mate = hwif;
631 at_least_one_hwif_enabled = 1;
632 }
633 if (!at_least_one_hwif_enabled)
634 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name);
635 }
637 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
639 /*
640 * ide_setup_pci_device() looks at the primary/secondary interfaces
641 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
642 * for use with them. This generic code works for most PCI chipsets.
643 *
644 * One thing that is not standardized is the location of the
645 * primary/secondary interface "enable/disable" bits. For chipsets that
646 * we "know" about, this information is in the ide_pci_device_t struct;
647 * for all other chipsets, we just assume both interfaces are enabled.
648 */
649 static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d,
650 ata_index_t *index, u8 noisy)
651 {
652 static ata_index_t ata_index = { .b = { .low = 0xff, .high = 0xff } };
653 int tried_config = 0;
654 int pciirq, ret;
656 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
657 if (ret < 0)
658 goto out;
660 /*
661 * Can we trust the reported IRQ?
662 */
663 pciirq = dev->irq;
665 /* Is it an "IDE storage" device in non-PCI mode? */
666 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
667 if (noisy)
668 printk(KERN_INFO "%s: not 100%% native mode: "
669 "will probe irqs later\n", d->name);
670 /*
671 * This allows offboard ide-pci cards the enable a BIOS,
672 * verify interrupt settings of split-mirror pci-config
673 * space, place chipset into init-mode, and/or preserve
674 * an interrupt if the card is not native ide support.
675 */
676 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
677 if (ret < 0)
678 goto out;
679 pciirq = ret;
680 } else if (tried_config) {
681 if (noisy)
682 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
683 pciirq = 0;
684 } else if (!pciirq) {
685 if (noisy)
686 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
687 d->name, pciirq);
688 pciirq = 0;
689 } else {
690 if (d->init_chipset) {
691 ret = d->init_chipset(dev, d->name);
692 if (ret < 0)
693 goto out;
694 }
695 if (noisy)
696 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
697 d->name, pciirq);
698 }
700 /* FIXME: silent failure can happen */
702 *index = ata_index;
703 ide_pci_setup_ports(dev, d, pciirq, index);
704 out:
705 return ret;
706 }
708 int ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d)
709 {
710 ata_index_t index_list;
711 int ret;
713 ret = do_ide_setup_pci_device(dev, d, &index_list, 1);
714 if (ret < 0)
715 goto out;
717 if ((index_list.b.low & 0xf0) != 0xf0)
718 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.low], d->fixup);
719 if ((index_list.b.high & 0xf0) != 0xf0)
720 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.high], d->fixup);
722 create_proc_ide_interfaces();
723 out:
724 return ret;
725 }
727 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
729 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
730 ide_pci_device_t *d)
731 {
732 struct pci_dev *pdev[] = { dev1, dev2 };
733 ata_index_t index_list[2];
734 int ret, i;
736 for (i = 0; i < 2; i++) {
737 ret = do_ide_setup_pci_device(pdev[i], d, index_list + i, !i);
738 /*
739 * FIXME: Mom, mom, they stole me the helper function to undo
740 * do_ide_setup_pci_device() on the first device!
741 */
742 if (ret < 0)
743 goto out;
744 }
746 for (i = 0; i < 2; i++) {
747 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high };
748 int j;
750 for (j = 0; j < 2; j++) {
751 if ((idx[j] & 0xf0) != 0xf0)
752 probe_hwif_init(ide_hwifs + idx[j]);
753 }
754 }
756 create_proc_ide_interfaces();
757 out:
758 return ret;
759 }
761 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
763 /*
764 * Module interfaces
765 */
767 static int pre_init = 1; /* Before first ordered IDE scan */
768 static LIST_HEAD(ide_pci_drivers);
770 /*
771 * __ide_pci_register_driver - attach IDE driver
772 * @driver: pci driver
773 * @module: owner module of the driver
774 *
775 * Registers a driver with the IDE layer. The IDE layer arranges that
776 * boot time setup is done in the expected device order and then
777 * hands the controllers off to the core PCI code to do the rest of
778 * the work.
779 *
780 * The driver_data of the driver table must point to an ide_pci_device_t
781 * describing the interface.
782 *
783 * Returns are the same as for pci_register_driver
784 */
786 int __ide_pci_register_driver(struct pci_driver *driver, struct module *module)
787 {
788 if(!pre_init)
789 return __pci_register_driver(driver, module);
790 driver->driver.owner = module;
791 list_add_tail(&driver->node, &ide_pci_drivers);
792 return 0;
793 }
795 EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
797 /**
798 * ide_unregister_pci_driver - unregister an IDE driver
799 * @driver: driver to remove
800 *
801 * Unregister a currently installed IDE driver. Returns are the same
802 * as for pci_unregister_driver
803 */
805 void ide_pci_unregister_driver(struct pci_driver *driver)
806 {
807 if(!pre_init)
808 pci_unregister_driver(driver);
809 else
810 list_del(&driver->node);
811 }
813 EXPORT_SYMBOL_GPL(ide_pci_unregister_driver);
815 /**
816 * ide_scan_pcidev - find an IDE driver for a device
817 * @dev: PCI device to check
818 *
819 * Look for an IDE driver to handle the device we are considering.
820 * This is only used during boot up to get the ordering correct. After
821 * boot up the pci layer takes over the job.
822 */
824 static int __init ide_scan_pcidev(struct pci_dev *dev)
825 {
826 struct list_head *l;
827 struct pci_driver *d;
829 list_for_each(l, &ide_pci_drivers)
830 {
831 d = list_entry(l, struct pci_driver, node);
832 if(d->id_table)
833 {
834 const struct pci_device_id *id = pci_match_id(d->id_table, dev);
835 if(id != NULL)
836 {
837 if(d->probe(dev, id) >= 0)
838 {
839 dev->driver = d;
840 return 1;
841 }
842 }
843 }
844 }
845 return 0;
846 }
848 /**
849 * ide_scan_pcibus - perform the initial IDE driver scan
850 * @scan_direction: set for reverse order scanning
851 *
852 * Perform the initial bus rather than driver ordered scan of the
853 * PCI drivers. After this all IDE pci handling becomes standard
854 * module ordering not traditionally ordered.
855 */
857 void __init ide_scan_pcibus (int scan_direction)
858 {
859 struct pci_dev *dev = NULL;
860 struct pci_driver *d;
861 struct list_head *l, *n;
863 pre_init = 0;
864 if (!scan_direction) {
865 while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
866 ide_scan_pcidev(dev);
867 }
868 } else {
869 while ((dev = pci_find_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
870 ide_scan_pcidev(dev);
871 }
872 }
874 /*
875 * Hand the drivers over to the PCI layer now we
876 * are post init.
877 */
879 list_for_each_safe(l, n, &ide_pci_drivers)
880 {
881 list_del(l);
882 d = list_entry(l, struct pci_driver, node);
883 __pci_register_driver(d, d->driver.owner);
884 }
885 }