ia64/linux-2.6.18-xen.hg

view include/linux/pci.h @ 816:f77ac4979fae

Backport: PCI: define PCI resource names in an 'enum'

commit fde09c6d8f92de0c9f75698a75f0989f2234c517
Author: Yu Zhao <yu.zhao@intel.com>
Date: Sat Nov 22 02:39:32 2008 +0800

PCI: define PCI resource names in an 'enum'

This patch moves all definitions of the PCI resource names to an
'enum',
and also replaces some hard-coded resource variables with symbol
names. This change eases introduction of device specific
resources.

Reviewed-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Mar 13 08:50:15 2009 +0000 (2009-03-13)
parents f0dd7eb92bc9
children fb46e5625c61
line source
1 /*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
23 /* Include the ID list */
24 #include <linux/pci_ids.h>
26 /*
27 * The PCI interface treats multi-function devices as independent
28 * devices. The slot/function address of each device is encoded
29 * in a single byte as follows:
30 *
31 * 7:3 = slot
32 * 2:0 = function
33 */
34 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
35 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
36 #define PCI_FUNC(devfn) ((devfn) & 0x07)
38 /* Ioctls for /proc/bus/pci/X/Y nodes. */
39 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
40 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
41 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
42 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
43 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
45 #ifdef __KERNEL__
47 #include <linux/mod_devicetable.h>
49 #include <linux/types.h>
50 #include <linux/ioport.h>
51 #include <linux/list.h>
52 #include <linux/errno.h>
53 #include <linux/device.h>
55 /* File state for mmap()s on /proc/bus/pci/X/Y */
56 enum pci_mmap_state {
57 pci_mmap_io,
58 pci_mmap_mem
59 };
61 /* This defines the direction arg to the DMA mapping routines. */
62 #define PCI_DMA_BIDIRECTIONAL 0
63 #define PCI_DMA_TODEVICE 1
64 #define PCI_DMA_FROMDEVICE 2
65 #define PCI_DMA_NONE 3
67 #define DEVICE_COUNT_COMPATIBLE 4
69 /*
70 * For PCI devices, the region numbers are assigned this way:
71 */
72 enum {
73 /* #0-5: standard PCI resources */
74 PCI_STD_RESOURCES,
75 PCI_STD_RESOURCE_END = 5,
77 /* #6: expansion ROM resource */
78 PCI_ROM_RESOURCE,
80 /* resources assigned to buses behind the bridge */
81 #define PCI_BRIDGE_RESOURCE_NUM 4
83 PCI_BRIDGE_RESOURCES,
84 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
85 PCI_BRIDGE_RESOURCE_NUM - 1,
87 /* total resources associated with a PCI device */
88 PCI_NUM_RESOURCES,
90 /* preserve this for compatibility */
91 DEVICE_COUNT_RESOURCE
92 };
93 typedef int __bitwise pci_power_t;
95 #define PCI_D0 ((pci_power_t __force) 0)
96 #define PCI_D1 ((pci_power_t __force) 1)
97 #define PCI_D2 ((pci_power_t __force) 2)
98 #define PCI_D3hot ((pci_power_t __force) 3)
99 #define PCI_D3cold ((pci_power_t __force) 4)
100 #define PCI_UNKNOWN ((pci_power_t __force) 5)
101 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
103 /** The pci_channel state describes connectivity between the CPU and
104 * the pci device. If some PCI bus between here and the pci device
105 * has crashed or locked up, this info is reflected here.
106 */
107 typedef unsigned int __bitwise pci_channel_state_t;
109 enum pci_channel_state {
110 /* I/O channel is in normal state */
111 pci_channel_io_normal = (__force pci_channel_state_t) 1,
113 /* I/O to channel is blocked */
114 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
116 /* PCI card is dead */
117 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
118 };
120 typedef unsigned short __bitwise pci_bus_flags_t;
121 enum pci_bus_flags {
122 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
123 };
125 struct pci_cap_saved_state {
126 struct hlist_node next;
127 char cap_nr;
128 u32 data[0];
129 };
131 /*
132 * The pci_dev structure is used to describe PCI devices.
133 */
134 struct pci_dev {
135 struct list_head global_list; /* node in list of all PCI devices */
136 struct list_head bus_list; /* node in per-bus list */
137 struct pci_bus *bus; /* bus this device is on */
138 struct pci_bus *subordinate; /* bus this device bridges to */
140 void *sysdata; /* hook for sys-specific extension */
141 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
143 unsigned int devfn; /* encoded device & function index */
144 unsigned short vendor;
145 unsigned short device;
146 unsigned short subsystem_vendor;
147 unsigned short subsystem_device;
148 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
149 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
150 u8 rom_base_reg; /* which config register controls the ROM */
151 u8 pin; /* which interrupt pin this device uses */
153 struct pci_driver *driver; /* which driver has allocated this device */
154 u64 dma_mask; /* Mask of the bits of bus address this
155 device implements. Normally this is
156 0xffffffff. You only need to change
157 this if your device has broken DMA
158 or supports 64-bit transfers. */
160 pci_power_t current_state; /* Current operating state. In ACPI-speak,
161 this is D0-D3, D0 being fully functional,
162 and D3 being off. */
164 pci_channel_state_t error_state; /* current connectivity state */
165 struct device dev; /* Generic device interface */
167 /* device is compatible with these IDs */
168 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
169 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
171 int cfg_size; /* Size of configuration space */
173 /*
174 * Instead of touching interrupt line and base address registers
175 * directly, use the values stored here. They might be different!
176 */
177 unsigned int irq;
178 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
180 /* These fields are used by common fixups */
181 unsigned int transparent:1; /* Transparent PCI bridge */
182 unsigned int multifunction:1;/* Part of multi-function device */
183 /* keep track of device state */
184 unsigned int is_enabled:1; /* pci_enable_device has been called */
185 unsigned int is_busmaster:1; /* device is busmaster */
186 unsigned int no_msi:1; /* device may not use msi */
187 unsigned int no_d1d2:1; /* only allow d0 or d3 */
188 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
189 unsigned int broken_parity_status:1; /* Device generates false positive parity */
190 unsigned int msi_enabled:1;
191 unsigned int msix_enabled:1;
193 u32 saved_config_space[16]; /* config space saved at suspend time */
194 struct hlist_head saved_cap_space;
195 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
196 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
197 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
198 unsigned int ari_enabled:1; /* ARI forwarding */
199 };
201 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
202 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
203 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
204 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
206 static inline struct pci_cap_saved_state *pci_find_saved_cap(
207 struct pci_dev *pci_dev,char cap)
208 {
209 struct pci_cap_saved_state *tmp;
210 struct hlist_node *pos;
212 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
213 if (tmp->cap_nr == cap)
214 return tmp;
215 }
216 return NULL;
217 }
219 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
220 struct pci_cap_saved_state *new_cap)
221 {
222 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
223 }
225 static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
226 {
227 hlist_del(&cap->next);
228 }
230 #ifndef PCI_BUS_NUM_RESOURCES
231 #define PCI_BUS_NUM_RESOURCES 8
232 #endif
234 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
236 struct pci_bus {
237 struct list_head node; /* node in list of buses */
238 struct pci_bus *parent; /* parent bus this bridge is on */
239 struct list_head children; /* list of child buses */
240 struct list_head devices; /* list of devices on this bus */
241 struct pci_dev *self; /* bridge device as seen by parent */
242 struct resource *resource[PCI_BUS_NUM_RESOURCES];
243 /* address space routed to this bus */
245 struct pci_ops *ops; /* configuration access functions */
246 void *sysdata; /* hook for sys-specific extension */
247 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
249 unsigned char number; /* bus number */
250 unsigned char primary; /* number of primary bridge */
251 unsigned char secondary; /* number of secondary bridge */
252 unsigned char subordinate; /* max number of subordinate buses */
254 char name[48];
256 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
257 pci_bus_flags_t bus_flags; /* Inherited by child busses */
258 struct device *bridge;
259 struct class_device class_dev;
260 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
261 struct bin_attribute *legacy_mem; /* legacy mem */
262 };
264 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
265 #define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
267 /*
268 * Error values that may be returned by PCI functions.
269 */
270 #define PCIBIOS_SUCCESSFUL 0x00
271 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
272 #define PCIBIOS_BAD_VENDOR_ID 0x83
273 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
274 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
275 #define PCIBIOS_SET_FAILED 0x88
276 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
278 /* Low-level architecture-dependent routines */
280 struct pci_ops {
281 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
282 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
283 };
285 struct pci_raw_ops {
286 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
287 int reg, int len, u32 *val);
288 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
289 int reg, int len, u32 val);
290 };
292 extern struct pci_raw_ops *raw_pci_ops;
294 struct pci_bus_region {
295 unsigned long start;
296 unsigned long end;
297 };
299 struct pci_dynids {
300 spinlock_t lock; /* protects list, index */
301 struct list_head list; /* for IDs added at runtime */
302 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
303 };
305 /* ---------------------------------------------------------------- */
306 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
307 * a set fof callbacks in struct pci_error_handlers, then that device driver
308 * will be notified of PCI bus errors, and will be driven to recovery
309 * when an error occurs.
310 */
312 typedef unsigned int __bitwise pci_ers_result_t;
314 enum pci_ers_result {
315 /* no result/none/not supported in device driver */
316 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
318 /* Device driver can recover without slot reset */
319 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
321 /* Device driver wants slot to be reset. */
322 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
324 /* Device has completely failed, is unrecoverable */
325 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
327 /* Device driver is fully recovered and operational */
328 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
329 };
331 /* PCI bus error event callbacks */
332 struct pci_error_handlers
333 {
334 /* PCI bus error detected on this device */
335 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
336 enum pci_channel_state error);
338 /* MMIO has been re-enabled, but not DMA */
339 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
341 /* PCI Express link has been reset */
342 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
344 /* PCI slot has been reset */
345 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
347 /* Device driver may resume normal operations */
348 void (*resume)(struct pci_dev *dev);
349 };
351 /* ---------------------------------------------------------------- */
353 struct module;
354 struct pci_driver {
355 struct list_head node;
356 char *name;
357 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
358 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
359 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
360 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
361 int (*resume) (struct pci_dev *dev); /* Device woken up */
362 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
363 void (*shutdown) (struct pci_dev *dev);
365 struct pci_error_handlers *err_handler;
366 struct device_driver driver;
367 struct pci_dynids dynids;
368 };
370 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
372 /**
373 * PCI_DEVICE - macro used to describe a specific pci device
374 * @vend: the 16 bit PCI Vendor ID
375 * @dev: the 16 bit PCI Device ID
376 *
377 * This macro is used to create a struct pci_device_id that matches a
378 * specific device. The subvendor and subdevice fields will be set to
379 * PCI_ANY_ID.
380 */
381 #define PCI_DEVICE(vend,dev) \
382 .vendor = (vend), .device = (dev), \
383 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
385 /**
386 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
387 * @dev_class: the class, subclass, prog-if triple for this device
388 * @dev_class_mask: the class mask for this device
389 *
390 * This macro is used to create a struct pci_device_id that matches a
391 * specific PCI class. The vendor, device, subvendor, and subdevice
392 * fields will be set to PCI_ANY_ID.
393 */
394 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
395 .class = (dev_class), .class_mask = (dev_class_mask), \
396 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
397 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
399 /*
400 * pci_module_init is obsolete, this stays here till we fix up all usages of it
401 * in the tree.
402 */
403 #define pci_module_init pci_register_driver
405 /* these external functions are only available when PCI support is enabled */
406 #ifdef CONFIG_PCI
408 extern struct bus_type pci_bus_type;
410 /* Do NOT directly access these two variables, unless you are arch specific pci
411 * code, or pci core code. */
412 extern struct list_head pci_root_buses; /* list of all known PCI buses */
413 extern struct list_head pci_devices; /* list of all devices */
415 void pcibios_fixup_bus(struct pci_bus *);
416 int pcibios_enable_device(struct pci_dev *, int mask);
417 char *pcibios_setup (char *str);
419 /* Used only when drivers/pci/setup.c is used */
420 void pcibios_align_resource(void *, struct resource *, resource_size_t,
421 resource_size_t);
422 void pcibios_update_irq(struct pci_dev *, int irq);
424 /* Generic PCI functions used internally */
426 extern struct pci_bus *pci_find_bus(int domain, int busnr);
427 void pci_bus_add_devices(struct pci_bus *bus);
428 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
429 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
430 {
431 struct pci_bus *root_bus;
432 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
433 if (root_bus)
434 pci_bus_add_devices(root_bus);
435 return root_bus;
436 }
437 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
438 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
439 int pci_scan_slot(struct pci_bus *bus, int devfn);
440 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
441 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
442 unsigned int pci_scan_child_bus(struct pci_bus *bus);
443 void pci_bus_add_device(struct pci_dev *dev);
444 void pci_read_bridge_bases(struct pci_bus *child);
445 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
446 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
447 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
448 extern void pci_dev_put(struct pci_dev *dev);
449 extern void pci_remove_bus(struct pci_bus *b);
450 extern void pci_remove_bus_device(struct pci_dev *dev);
451 void pci_setup_cardbus(struct pci_bus *bus);
453 /* Generic PCI functions exported to card drivers */
455 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
456 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
457 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
458 int pci_find_capability (struct pci_dev *dev, int cap);
459 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
460 int pci_find_ext_capability (struct pci_dev *dev, int cap);
461 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
463 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
464 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
465 unsigned int ss_vendor, unsigned int ss_device,
466 struct pci_dev *from);
467 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
468 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
469 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
470 int pci_dev_present(const struct pci_device_id *ids);
472 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
473 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
474 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
475 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
476 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
477 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
479 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
480 {
481 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
482 }
483 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
484 {
485 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
486 }
487 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
488 {
489 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
490 }
491 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
492 {
493 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
494 }
495 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
496 {
497 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
498 }
499 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
500 {
501 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
502 }
504 int pci_enable_device(struct pci_dev *dev);
505 int pci_enable_device_bars(struct pci_dev *dev, int mask);
506 void pci_disable_device(struct pci_dev *dev);
507 void pci_set_master(struct pci_dev *dev);
508 #define HAVE_PCI_SET_MWI
509 int pci_set_mwi(struct pci_dev *dev);
510 void pci_clear_mwi(struct pci_dev *dev);
511 void pci_intx(struct pci_dev *dev, int enable);
512 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
513 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
514 void pci_update_resource(struct pci_dev *dev, int resno);
515 int pci_assign_resource(struct pci_dev *dev, int i);
516 int pci_assign_resource_fixed(struct pci_dev *dev, int i);
517 void pci_restore_bars(struct pci_dev *dev);
519 /* ROM control related routines */
520 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
521 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
522 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
523 void pci_remove_rom(struct pci_dev *pdev);
525 /* Power management related routines */
526 int pci_save_state(struct pci_dev *dev);
527 int pci_restore_state(struct pci_dev *dev);
528 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
529 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
530 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
532 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
533 void pci_bus_assign_resources(struct pci_bus *bus);
534 void pci_bus_size_bridges(struct pci_bus *bus);
535 int pci_claim_resource(struct pci_dev *, int);
536 void pci_assign_unassigned_resources(void);
537 void pdev_enable_device(struct pci_dev *);
538 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
539 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
540 int (*)(struct pci_dev *, u8, u8));
541 #define HAVE_PCI_REQ_REGIONS 2
542 int pci_request_regions(struct pci_dev *, const char *);
543 void pci_release_regions(struct pci_dev *);
544 int pci_request_region(struct pci_dev *, int, const char *);
545 void pci_release_region(struct pci_dev *, int);
547 /* drivers/pci/bus.c */
548 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
549 resource_size_t size, resource_size_t align,
550 resource_size_t min, unsigned int type_mask,
551 void (*alignf)(void *, struct resource *,
552 resource_size_t, resource_size_t),
553 void *alignf_data);
554 void pci_enable_bridges(struct pci_bus *bus);
556 /* Proper probing supporting hot-pluggable devices */
557 int __pci_register_driver(struct pci_driver *, struct module *);
558 static inline int pci_register_driver(struct pci_driver *driver)
559 {
560 return __pci_register_driver(driver, THIS_MODULE);
561 }
563 void pci_unregister_driver(struct pci_driver *);
564 void pci_remove_behind_bridge(struct pci_dev *);
565 struct pci_driver *pci_dev_driver(const struct pci_dev *);
566 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
567 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
568 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
570 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
571 void *userdata);
572 int pci_cfg_space_size(struct pci_dev *dev);
573 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
575 /* kmem_cache style wrapper around pci_alloc_consistent() */
577 #include <linux/dmapool.h>
579 #define pci_pool dma_pool
580 #define pci_pool_create(name, pdev, size, align, allocation) \
581 dma_pool_create(name, &pdev->dev, size, align, allocation)
582 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
583 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
584 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
586 enum pci_dma_burst_strategy {
587 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
588 strategy_parameter is N/A */
589 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
590 byte boundaries */
591 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
592 strategy_parameter byte boundaries */
593 };
595 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
596 extern struct pci_dev *isa_bridge;
597 #endif
599 struct msix_entry {
600 u16 vector; /* kernel uses to write allocated vector */
601 u16 entry; /* driver uses to specify entry, OS writes */
602 };
604 #ifndef CONFIG_PCI_MSI
605 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
606 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
607 static inline void pci_disable_msi(struct pci_dev *dev) {}
608 static inline int pci_enable_msix(struct pci_dev* dev,
609 struct msix_entry *entries, int nvec) {return -1;}
610 static inline void pci_disable_msix(struct pci_dev *dev) {}
611 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
612 #ifdef CONFIG_XEN
613 #define register_msi_get_owner(func) 0
614 #define unregister_msi_get_owner(func) 0
615 #endif
616 #else
617 extern void pci_scan_msi_device(struct pci_dev *dev);
618 extern int pci_enable_msi(struct pci_dev *dev);
619 extern void pci_disable_msi(struct pci_dev *dev);
620 extern int pci_enable_msix(struct pci_dev* dev,
621 struct msix_entry *entries, int nvec);
622 extern void pci_disable_msix(struct pci_dev *dev);
623 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
624 #ifdef CONFIG_XEN
625 extern int register_msi_get_owner(int (*func)(struct pci_dev *dev));
626 extern int unregister_msi_get_owner(int (*func)(struct pci_dev *dev));
627 #endif
628 #endif
630 extern void pci_block_user_cfg_access(struct pci_dev *dev);
631 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
633 /*
634 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
635 * a PCI domain is defined to be a set of PCI busses which share
636 * configuration space.
637 */
638 #ifndef CONFIG_PCI_DOMAINS
639 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
640 static inline int pci_proc_domain(struct pci_bus *bus)
641 {
642 return 0;
643 }
644 #endif
646 #else /* CONFIG_PCI is not enabled */
648 /*
649 * If the system does not have PCI, clearly these return errors. Define
650 * these as simple inline functions to avoid hair in drivers.
651 */
653 #define _PCI_NOP(o,s,t) \
654 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
655 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
656 #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
657 _PCI_NOP(o,word,u16 x) \
658 _PCI_NOP(o,dword,u32 x)
659 _PCI_NOP_ALL(read, *)
660 _PCI_NOP_ALL(write,)
662 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
663 { return NULL; }
665 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
666 { return NULL; }
669 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn)
670 {
671 return NULL;
672 }
673 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
674 { return NULL; }
676 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
677 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
678 { return NULL; }
680 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
681 { return NULL; }
683 #define pci_dev_present(ids) (0)
684 #define pci_dev_put(dev) do { } while (0)
686 static inline void pci_set_master(struct pci_dev *dev) { }
687 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
688 static inline void pci_disable_device(struct pci_dev *dev) { }
689 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
690 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
691 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
692 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
693 static inline void pci_unregister_driver(struct pci_driver *drv) { }
694 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
695 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
696 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
697 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
699 /* Power management related routines */
700 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
701 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
702 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
703 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
704 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
706 #define isa_bridge ((struct pci_dev *)NULL)
708 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
710 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
711 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
713 #endif /* CONFIG_PCI */
715 /* Include architecture-dependent settings and functions */
717 #include <asm/pci.h>
719 /* these helpers provide future and backwards compatibility
720 * for accessing popular PCI BAR info */
721 #define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
722 #define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
723 #define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
724 #define pci_resource_len(dev,bar) \
725 ((pci_resource_start((dev),(bar)) == 0 && \
726 pci_resource_end((dev),(bar)) == \
727 pci_resource_start((dev),(bar))) ? 0 : \
728 \
729 (pci_resource_end((dev),(bar)) - \
730 pci_resource_start((dev),(bar)) + 1))
732 /* Similar to the helpers above, these manipulate per-pci_dev
733 * driver-specific data. They are really just a wrapper around
734 * the generic device structure functions of these calls.
735 */
736 static inline void *pci_get_drvdata (struct pci_dev *pdev)
737 {
738 return dev_get_drvdata(&pdev->dev);
739 }
741 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
742 {
743 dev_set_drvdata(&pdev->dev, data);
744 }
746 /* If you want to know what to call your pci_dev, ask this function.
747 * Again, it's a wrapper around the generic device.
748 */
749 static inline char *pci_name(struct pci_dev *pdev)
750 {
751 return pdev->dev.bus_id;
752 }
755 /* Some archs don't want to expose struct resource to userland as-is
756 * in sysfs and /proc
757 */
758 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
759 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
760 const struct resource *rsrc, resource_size_t *start,
761 resource_size_t *end)
762 {
763 *start = rsrc->start;
764 *end = rsrc->end;
765 }
766 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
769 /*
770 * The world is not perfect and supplies us with broken PCI devices.
771 * For at least a part of these bugs we need a work-around, so both
772 * generic (drivers/pci/quirks.c) and per-architecture code can define
773 * fixup hooks to be called for particular buggy devices.
774 */
776 struct pci_fixup {
777 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
778 void (*hook)(struct pci_dev *dev);
779 };
781 enum pci_fixup_pass {
782 pci_fixup_early, /* Before probing BARs */
783 pci_fixup_header, /* After reading configuration header */
784 pci_fixup_final, /* Final phase of device fixups */
785 pci_fixup_enable, /* pci_enable_device() time */
786 };
788 /* Anonymous variables would be nice... */
789 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
790 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
791 __attribute__((__section__(#section))) = { vendor, device, hook };
792 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
793 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
794 vendor##device##hook, vendor, device, hook)
795 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
796 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
797 vendor##device##hook, vendor, device, hook)
798 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
799 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
800 vendor##device##hook, vendor, device, hook)
801 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
802 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
803 vendor##device##hook, vendor, device, hook)
806 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
808 extern int pci_pci_problems;
809 #define PCIPCI_FAIL 1
810 #define PCIPCI_TRITON 2
811 #define PCIPCI_NATOMA 4
812 #define PCIPCI_VIAETBF 8
813 #define PCIPCI_VSFX 16
814 #define PCIPCI_ALIMAGIK 32
816 #ifdef CONFIG_PCI_GUESTDEV
817 int pci_is_guestdev(struct pci_dev *dev);
818 #endif /* CONFIG_PCI_GUESTDEV */
820 #endif /* __KERNEL__ */
821 #endif /* LINUX_PCI_H */