ia64/linux-2.6.18-xen.hg

view scripts/Makefile.build @ 912:dd42cdb0ab89

[IA64] Build blktap2 driver by default in x86 builds.

add CONFIG_XEN_BLKDEV_TAP2=y to buildconfigs/linux-defconfig_xen_ia64.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Jun 29 12:09:16 2009 +0900 (2009-06-29)
parents 214ff2a7c990
children
line source
1 # ==========================================================================
2 # Building
3 # ==========================================================================
5 src := $(obj)
7 PHONY := __build
8 __build:
10 # Read .config if it exist, otherwise ignore
11 -include include/config/auto.conf
13 include scripts/Kbuild.include
15 # The filename Kbuild has precedence over Makefile
16 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
17 include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
19 include scripts/Makefile.lib
21 ifdef host-progs
22 ifneq ($(hostprogs-y),$(host-progs))
23 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
24 hostprogs-y += $(host-progs)
25 endif
26 endif
28 # Do not include host rules unles needed
29 ifneq ($(hostprogs-y)$(hostprogs-m),)
30 include scripts/Makefile.host
31 endif
33 ifneq ($(KBUILD_SRC),)
34 # Create output directory if not already present
35 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
37 # Create directories for object files if directory does not exist
38 # Needed when obj-y := dir/file.o syntax is used
39 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
40 endif
43 ifdef EXTRA_TARGETS
44 $(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
45 endif
47 ifdef build-targets
48 $(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
49 endif
51 ifdef export-objs
52 $(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
53 endif
55 ifdef O_TARGET
56 $(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
57 endif
59 ifdef L_TARGET
60 $(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
61 endif
63 ifdef list-multi
64 $(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
65 endif
67 ifndef obj
68 $(warning kbuild: Makefile.build is included improperly)
69 endif
71 ifeq ($(CONFIG_XEN),y)
72 Makefile.xen := $(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD),$(objtree)/scripts)/Makefile.xen
73 $(Makefile.xen): $(srctree)/scripts/Makefile.xen.awk $(srctree)/scripts/Makefile.build
74 @echo ' Updating $@'
75 $(if $(shell echo a | $(AWK) '{ print gensub(/a/, "AA", "g"); }'),\
76 ,$(error 'Your awk program does not define gensub. Use gawk or another awk with gensub'))
77 @$(AWK) -f $< $(filter-out $<,$^) >$@
79 xen-src-single-used-m := $(patsubst $(srctree)/%,%,$(wildcard $(addprefix $(srctree)/,$(single-used-m:.o=-xen.c))))
80 xen-single-used-m := $(xen-src-single-used-m:-xen.c=.o)
81 single-used-m := $(filter-out $(xen-single-used-m),$(single-used-m))
83 -include $(Makefile.xen)
84 endif
86 # ===========================================================================
88 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
89 lib-target := $(obj)/lib.a
90 endif
92 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
93 builtin-target := $(obj)/built-in.o
94 endif
96 # We keep a list of all modules in $(MODVERDIR)
98 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
99 $(if $(KBUILD_MODULES),$(obj-m)) \
100 $(subdir-ym) $(always)
101 @:
103 # Linus' kernel sanity checking tool
104 ifneq ($(KBUILD_CHECKSRC),0)
105 ifeq ($(KBUILD_CHECKSRC),2)
106 quiet_cmd_force_checksrc = CHECK $<
107 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
108 else
109 quiet_cmd_checksrc = CHECK $<
110 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
111 endif
112 endif
115 # Compile C sources (.c)
116 # ---------------------------------------------------------------------------
118 # Default is built-in, unless we know otherwise
119 modkern_cflags := $(CFLAGS_KERNEL)
120 quiet_modtag := $(empty) $(empty)
122 $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
123 $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
124 $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
125 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
127 $(real-objs-m) : quiet_modtag := [M]
128 $(real-objs-m:.o=.i) : quiet_modtag := [M]
129 $(real-objs-m:.o=.s) : quiet_modtag := [M]
130 $(real-objs-m:.o=.lst): quiet_modtag := [M]
132 $(obj-m) : quiet_modtag := [M]
134 # Default for not multi-part modules
135 modname = $(basetarget)
137 $(multi-objs-m) : modname = $(modname-multi)
138 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
139 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
140 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
141 $(multi-objs-y) : modname = $(modname-multi)
142 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
143 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
144 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
146 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
147 cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
149 %.s: %.c FORCE
150 $(call if_changed_dep,cc_s_c)
152 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
153 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
155 %.i: %.c FORCE
156 $(call if_changed_dep,cc_i_c)
158 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
159 cmd_cc_symtypes_c = \
160 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
161 | $(GENKSYMS) -T $@ >/dev/null; \
162 test -s $@ || rm -f $@
164 %.symtypes : %.c FORCE
165 $(call if_changed_dep,cc_symtypes_c)
167 # C (.c) files
168 # The C file is compiled and updated dependency information is generated.
169 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
171 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
173 ifndef CONFIG_MODVERSIONS
174 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
176 else
177 # When module versioning is enabled the following steps are executed:
178 # o compile a .tmp_<file>.o from <file>.c
179 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
180 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
181 # are done.
182 # o otherwise, we calculate symbol versions using the good old
183 # genksyms on the preprocessed source and postprocess them in a way
184 # that they are usable as a linker script
185 # o generate <file>.o from .tmp_<file>.o using the linker to
186 # replace the unresolved symbols __crc_exported_symbol with
187 # the actual value of the checksum generated by genksyms
189 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
190 cmd_modversions = \
191 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
192 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
193 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
194 -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
195 > $(@D)/.tmp_$(@F:.o=.ver); \
196 \
197 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
198 -T $(@D)/.tmp_$(@F:.o=.ver); \
199 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
200 else \
201 mv -f $(@D)/.tmp_$(@F) $@; \
202 fi;
203 endif
205 define rule_cc_o_c
206 $(call echo-cmd,checksrc) $(cmd_checksrc) \
207 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
208 $(cmd_modversions) \
209 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp; \
210 rm -f $(depfile); \
211 mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
212 endef
214 # Built-in and composite module parts
216 %.o: %.c FORCE
217 $(call cmd,force_checksrc)
218 $(call if_changed_rule,cc_o_c)
220 # Single-part modules are special since we need to mark them in $(MODVERDIR)
222 $(single-used-m): %.o: %.c FORCE
223 $(call cmd,force_checksrc)
224 $(call if_changed_rule,cc_o_c)
225 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
227 quiet_cmd_cc_lst_c = MKLST $@
228 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
229 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
230 System.map $(OBJDUMP) > $@
232 %.lst: %.c FORCE
233 $(call if_changed_dep,cc_lst_c)
235 # Compile assembler sources (.S)
236 # ---------------------------------------------------------------------------
238 modkern_aflags := $(AFLAGS_KERNEL)
240 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
241 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
243 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
244 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
246 %.s: %.S FORCE
247 $(call if_changed_dep,as_s_S)
249 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
250 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
252 %.o: %.S FORCE
253 $(call if_changed_dep,as_o_S)
255 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
256 targets += $(extra-y) $(MAKECMDGOALS) $(always)
258 # Linker scripts preprocessor (.lds.S -> .lds)
259 # ---------------------------------------------------------------------------
260 quiet_cmd_cpp_lds_S = LDS $@
261 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
263 %.lds: %.lds.S FORCE
264 $(call if_changed_dep,cpp_lds_S)
266 # Build the compiled-in targets
267 # ---------------------------------------------------------------------------
269 # To build objects in subdirs, we need to descend into the directories
270 $(sort $(subdir-obj-y)): $(subdir-ym) ;
272 #
273 # Rule to compile a set of .o files into one .o file
274 #
275 ifdef builtin-target
276 quiet_cmd_link_o_target = LD $@
277 # If the list of objects to link is empty, just create an empty built-in.o
278 cmd_link_o_target = $(if $(strip $(obj-y)),\
279 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
280 rm -f $@; $(AR) rcs $@)
282 $(builtin-target): $(obj-y) FORCE
283 $(call if_changed,link_o_target)
285 targets += $(builtin-target)
286 endif # builtin-target
288 #
289 # Rule to compile a set of .o files into one .a file
290 #
291 ifdef lib-target
292 quiet_cmd_link_l_target = AR $@
293 cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
295 $(lib-target): $(lib-y) FORCE
296 $(call if_changed,link_l_target)
298 targets += $(lib-target)
299 endif
301 #
302 # Rule to link composite objects
303 #
304 # Composite objects are specified in kbuild makefile as follows:
305 # <composite-object>-objs := <list of .o files>
306 # or
307 # <composite-object>-y := <list of .o files>
308 link_multi_deps = \
309 $(filter $(addprefix $(obj)/, \
310 $($(subst $(obj)/,,$(@:.o=-objs))) \
311 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
313 quiet_cmd_link_multi-y = LD $@
314 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
316 quiet_cmd_link_multi-m = LD [M] $@
317 cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
319 # We would rather have a list of rules like
320 # foo.o: $(foo-objs)
321 # but that's not so easy, so we rather make all composite objects depend
322 # on the set of all their parts
323 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
324 $(call if_changed,link_multi-y)
326 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
327 $(call if_changed,link_multi-m)
328 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
330 targets += $(multi-used-y) $(multi-used-m)
333 # Descending
334 # ---------------------------------------------------------------------------
336 PHONY += $(subdir-ym)
337 $(subdir-ym):
338 $(Q)$(MAKE) $(build)=$@
340 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
341 # ---------------------------------------------------------------------------
343 PHONY += FORCE
345 FORCE:
347 # Read all saved command lines and dependencies for the $(targets) we
348 # may be building above, using $(if_changed{,_dep}). As an
349 # optimization, we don't need to read them if the target does not
350 # exist, we will rebuild anyway in that case.
352 targets := $(wildcard $(sort $(targets)))
353 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
355 ifneq ($(cmd_files),)
356 include $(cmd_files)
357 endif
360 # Declare the contents of the .PHONY variable as phony. We keep that
361 # information in a variable se we can use it in if_changed and friends.
363 .PHONY: $(PHONY)