ia64/linux-2.6.18-xen.hg

view include/asm-v850/bitops.h @ 452:c7ed6fe5dca0

kexec: dont initialise regions in reserve_memory()

There is no need to initialise efi_memmap_res and boot_param_res in
reserve_memory() for the initial xen domain as it is done in
machine_kexec_setup_resources() using values from the kexec hypercall.

Signed-off-by: Simon Horman <horms@verge.net.au>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Feb 28 10:55:18 2008 +0000 (2008-02-28)
parents 831230e53067
children
line source
1 /*
2 * include/asm-v850/bitops.h -- Bit operations
3 *
4 * Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org>
6 * Copyright (C) 1992 Linus Torvalds.
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
13 #ifndef __V850_BITOPS_H__
14 #define __V850_BITOPS_H__
17 #include <linux/compiler.h> /* unlikely */
18 #include <asm/byteorder.h> /* swab32 */
19 #include <asm/system.h> /* interrupt enable/disable */
22 #ifdef __KERNEL__
24 #include <asm-generic/bitops/ffz.h>
26 /*
27 * The __ functions are not atomic
28 */
30 /* In the following constant-bit-op macros, a "g" constraint is used when
31 we really need an integer ("i" constraint). This is to avoid
32 warnings/errors from the compiler in the case where the associated
33 operand _isn't_ an integer, and shouldn't produce bogus assembly because
34 use of that form is protected by a guard statement that checks for
35 constants, and should otherwise be removed by the optimizer. This
36 _usually_ works -- however, __builtin_constant_p returns true for a
37 variable with a known constant value too, and unfortunately gcc will
38 happily put the variable in a register and use the register for the "g"
39 constraint'd asm operand. To avoid the latter problem, we add a
40 constant offset to the operand and subtract it back in the asm code;
41 forcing gcc to do arithmetic on the value is usually enough to get it
42 to use a real constant value. This is horrible, and ultimately
43 unreliable too, but it seems to work for now (hopefully gcc will offer
44 us more control in the future, so we can do a better job). */
46 #define __const_bit_op(op, nr, addr) \
47 ({ __asm__ (op " (%0 - 0x123), %1" \
48 :: "g" (((nr) & 0x7) + 0x123), \
49 "m" (*((char *)(addr) + ((nr) >> 3))) \
50 : "memory"); })
51 #define __var_bit_op(op, nr, addr) \
52 ({ int __nr = (nr); \
53 __asm__ (op " %0, [%1]" \
54 :: "r" (__nr & 0x7), \
55 "r" ((char *)(addr) + (__nr >> 3)) \
56 : "memory"); })
57 #define __bit_op(op, nr, addr) \
58 ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
59 ? __const_bit_op (op, nr, addr) \
60 : __var_bit_op (op, nr, addr))
62 #define __set_bit(nr, addr) __bit_op ("set1", nr, addr)
63 #define __clear_bit(nr, addr) __bit_op ("clr1", nr, addr)
64 #define __change_bit(nr, addr) __bit_op ("not1", nr, addr)
66 /* The bit instructions used by `non-atomic' variants are actually atomic. */
67 #define set_bit __set_bit
68 #define clear_bit __clear_bit
69 #define change_bit __change_bit
72 #define __const_tns_bit_op(op, nr, addr) \
73 ({ int __tns_res; \
74 __asm__ __volatile__ ( \
75 "tst1 (%1 - 0x123), %2; setf nz, %0; " op " (%1 - 0x123), %2" \
76 : "=&r" (__tns_res) \
77 : "g" (((nr) & 0x7) + 0x123), \
78 "m" (*((char *)(addr) + ((nr) >> 3))) \
79 : "memory"); \
80 __tns_res; \
81 })
82 #define __var_tns_bit_op(op, nr, addr) \
83 ({ int __nr = (nr); \
84 int __tns_res; \
85 __asm__ __volatile__ ( \
86 "tst1 %1, [%2]; setf nz, %0; " op " %1, [%2]" \
87 : "=&r" (__tns_res) \
88 : "r" (__nr & 0x7), \
89 "r" ((char *)(addr) + (__nr >> 3)) \
90 : "memory"); \
91 __tns_res; \
92 })
93 #define __tns_bit_op(op, nr, addr) \
94 ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
95 ? __const_tns_bit_op (op, nr, addr) \
96 : __var_tns_bit_op (op, nr, addr))
97 #define __tns_atomic_bit_op(op, nr, addr) \
98 ({ int __tns_atomic_res, __tns_atomic_flags; \
99 local_irq_save (__tns_atomic_flags); \
100 __tns_atomic_res = __tns_bit_op (op, nr, addr); \
101 local_irq_restore (__tns_atomic_flags); \
102 __tns_atomic_res; \
103 })
105 #define __test_and_set_bit(nr, addr) __tns_bit_op ("set1", nr, addr)
106 #define test_and_set_bit(nr, addr) __tns_atomic_bit_op ("set1", nr, addr)
108 #define __test_and_clear_bit(nr, addr) __tns_bit_op ("clr1", nr, addr)
109 #define test_and_clear_bit(nr, addr) __tns_atomic_bit_op ("clr1", nr, addr)
111 #define __test_and_change_bit(nr, addr) __tns_bit_op ("not1", nr, addr)
112 #define test_and_change_bit(nr, addr) __tns_atomic_bit_op ("not1", nr, addr)
115 #define __const_test_bit(nr, addr) \
116 ({ int __test_bit_res; \
117 __asm__ __volatile__ ("tst1 (%1 - 0x123), %2; setf nz, %0" \
118 : "=r" (__test_bit_res) \
119 : "g" (((nr) & 0x7) + 0x123), \
120 "m" (*((const char *)(addr) + ((nr) >> 3)))); \
121 __test_bit_res; \
122 })
123 static inline int __test_bit (int nr, const void *addr)
124 {
125 int res;
126 __asm__ __volatile__ ("tst1 %1, [%2]; setf nz, %0"
127 : "=r" (res)
128 : "r" (nr & 0x7), "r" (addr + (nr >> 3)));
129 return res;
130 }
131 #define test_bit(nr,addr) \
132 ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
133 ? __const_test_bit ((nr), (addr)) \
134 : __test_bit ((nr), (addr)))
137 /* clear_bit doesn't provide any barrier for the compiler. */
138 #define smp_mb__before_clear_bit() barrier ()
139 #define smp_mb__after_clear_bit() barrier ()
141 #include <asm-generic/bitops/ffs.h>
142 #include <asm-generic/bitops/fls.h>
143 #include <asm-generic/bitops/fls64.h>
144 #include <asm-generic/bitops/__ffs.h>
145 #include <asm-generic/bitops/find.h>
146 #include <asm-generic/bitops/sched.h>
147 #include <asm-generic/bitops/hweight.h>
149 #include <asm-generic/bitops/ext2-non-atomic.h>
150 #define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
151 #define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
153 #include <asm-generic/bitops/minix.h>
155 #endif /* __KERNEL__ */
157 #endif /* __V850_BITOPS_H__ */