ia64/linux-2.6.18-xen.hg

view include/asm-m68knommu/mcfne.h @ 452:c7ed6fe5dca0

kexec: dont initialise regions in reserve_memory()

There is no need to initialise efi_memmap_res and boot_param_res in
reserve_memory() for the initial xen domain as it is done in
machine_kexec_setup_resources() using values from the kexec hypercall.

Signed-off-by: Simon Horman <horms@verge.net.au>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Feb 28 10:55:18 2008 +0000 (2008-02-28)
parents 831230e53067
children
line source
1 /****************************************************************************/
3 /*
4 * mcfne.h -- NE2000 in ColdFire eval boards.
5 *
6 * (C) Copyright 1999-2000, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2000, Lineo (www.lineo.com)
8 * (C) Copyright 2001, SnapGear (www.snapgear.com)
9 *
10 * 19990409 David W. Miller Converted from m5206ne.h for 5307 eval board
11 *
12 * Hacked support for m5206e Cadre III evaluation board
13 * Fred Stevens (fred.stevens@pemstar.com) 13 April 1999
14 */
16 /****************************************************************************/
17 #ifndef mcfne_h
18 #define mcfne_h
19 /****************************************************************************/
22 /*
23 * Support for NE2000 clones devices in ColdFire based boards.
24 * Not all boards address these parts the same way, some use a
25 * direct addressing method, others use a side-band address space
26 * to access odd address registers, some require byte swapping
27 * others do not.
28 */
29 #define BSWAP(w) (((w) << 8) | ((w) >> 8))
30 #define RSWAP(w) (w)
33 /*
34 * Define the basic hardware resources of NE2000 boards.
35 */
37 #if defined(CONFIG_ARN5206)
38 #define NE2000_ADDR 0x40000300
39 #define NE2000_ODDOFFSET 0x00010000
40 #define NE2000_IRQ_VECTOR 0xf0
41 #define NE2000_IRQ_PRIORITY 2
42 #define NE2000_IRQ_LEVEL 4
43 #define NE2000_BYTE volatile unsigned short
44 #endif
46 #if defined(CONFIG_M5206eC3)
47 #define NE2000_ADDR 0x40000300
48 #define NE2000_ODDOFFSET 0x00010000
49 #define NE2000_IRQ_VECTOR 0x1c
50 #define NE2000_IRQ_PRIORITY 2
51 #define NE2000_IRQ_LEVEL 4
52 #define NE2000_BYTE volatile unsigned short
53 #endif
55 #if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
56 #define NE2000_ADDR 0x30000300
57 #define NE2000_IRQ_VECTOR 25
58 #define NE2000_IRQ_PRIORITY 1
59 #define NE2000_IRQ_LEVEL 3
60 #define NE2000_BYTE volatile unsigned char
61 #endif
63 #if defined(CONFIG_CFV240)
64 #define NE2000_ADDR 0x40010000
65 #define NE2000_ADDR1 0x40010001
66 #define NE2000_ODDOFFSET 0x00000000
67 #define NE2000_IRQ 1
68 #define NE2000_IRQ_VECTOR 0x19
69 #define NE2000_IRQ_PRIORITY 2
70 #define NE2000_IRQ_LEVEL 1
71 #define NE2000_BYTE volatile unsigned char
72 #endif
74 #if defined(CONFIG_M5307C3)
75 #define NE2000_ADDR 0x40000300
76 #define NE2000_ODDOFFSET 0x00010000
77 #define NE2000_IRQ_VECTOR 0x1b
78 #define NE2000_BYTE volatile unsigned short
79 #endif
81 #if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
82 #define NE2000_ADDR 0x30600300
83 #define NE2000_ODDOFFSET 0x00008000
84 #define NE2000_IRQ_VECTOR 67
85 #undef BSWAP
86 #define BSWAP(w) (w)
87 #define NE2000_BYTE volatile unsigned short
88 #undef RSWAP
89 #define RSWAP(w) (((w) << 8) | ((w) >> 8))
90 #endif
92 #if defined(CONFIG_M5307) && defined(CONFIG_NETtel)
93 #define NE2000_ADDR0 0x30600300
94 #define NE2000_ADDR1 0x30800300
95 #define NE2000_ODDOFFSET 0x00008000
96 #define NE2000_IRQ_VECTOR0 27
97 #define NE2000_IRQ_VECTOR1 29
98 #undef BSWAP
99 #define BSWAP(w) (w)
100 #define NE2000_BYTE volatile unsigned short
101 #undef RSWAP
102 #define RSWAP(w) (((w) << 8) | ((w) >> 8))
103 #endif
105 #if defined(CONFIG_M5307) && defined(CONFIG_SECUREEDGEMP3)
106 #define NE2000_ADDR 0x30600300
107 #define NE2000_ODDOFFSET 0x00008000
108 #define NE2000_IRQ_VECTOR 27
109 #undef BSWAP
110 #define BSWAP(w) (w)
111 #define NE2000_BYTE volatile unsigned short
112 #undef RSWAP
113 #define RSWAP(w) (((w) << 8) | ((w) >> 8))
114 #endif
116 #if defined(CONFIG_ARN5307)
117 #define NE2000_ADDR 0xfe600300
118 #define NE2000_ODDOFFSET 0x00010000
119 #define NE2000_IRQ_VECTOR 0x1b
120 #define NE2000_IRQ_PRIORITY 2
121 #define NE2000_IRQ_LEVEL 3
122 #define NE2000_BYTE volatile unsigned short
123 #endif
125 #if defined(CONFIG_M5407C3)
126 #define NE2000_ADDR 0x40000300
127 #define NE2000_ODDOFFSET 0x00010000
128 #define NE2000_IRQ_VECTOR 0x1b
129 #define NE2000_BYTE volatile unsigned short
130 #endif
132 /****************************************************************************/
134 /*
135 * Side-band address space for odd address requires re-mapping
136 * many of the standard ISA access functions.
137 */
138 #ifdef NE2000_ODDOFFSET
140 #undef outb
141 #undef outb_p
142 #undef inb
143 #undef inb_p
144 #undef outsb
145 #undef outsw
146 #undef insb
147 #undef insw
149 #define outb ne2000_outb
150 #define inb ne2000_inb
151 #define outb_p ne2000_outb
152 #define inb_p ne2000_inb
153 #define outsb ne2000_outsb
154 #define outsw ne2000_outsw
155 #define insb ne2000_insb
156 #define insw ne2000_insw
159 #ifndef COLDFIRE_NE2000_FUNCS
161 void ne2000_outb(unsigned int val, unsigned int addr);
162 int ne2000_inb(unsigned int addr);
163 void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len);
164 void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len);
165 void ne2000_outsb(unsigned int addr, void *vbuf, unsigned long len);
166 void ne2000_outsw(unsigned int addr, void *vbuf, unsigned long len);
168 #else
170 /*
171 * This macro converts a conventional register address into the
172 * real memory pointer of the mapped NE2000 device.
173 * On most NE2000 implementations on ColdFire boards the chip is
174 * mapped in kinda funny, due to its ISA heritage.
175 */
176 #ifdef CONFIG_CFV240
177 #define NE2000_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1) + 1)
178 #define NE2000_DATA_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1))
179 #else
180 #define NE2000_PTR(addr) ((addr&0x1)?(NE2000_ODDOFFSET+addr-1):(addr))
181 #define NE2000_DATA_PTR(addr) (addr)
182 #endif
185 void ne2000_outb(unsigned int val, unsigned int addr)
186 {
187 NE2000_BYTE *rp;
189 rp = (NE2000_BYTE *) NE2000_PTR(addr);
190 *rp = RSWAP(val);
191 }
193 int ne2000_inb(unsigned int addr)
194 {
195 NE2000_BYTE *rp, val;
197 rp = (NE2000_BYTE *) NE2000_PTR(addr);
198 val = *rp;
199 return((int) ((NE2000_BYTE) RSWAP(val)));
200 }
202 void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len)
203 {
204 NE2000_BYTE *rp, val;
205 unsigned char *buf;
207 buf = (unsigned char *) vbuf;
208 rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
209 for (; (len > 0); len--) {
210 val = *rp;
211 *buf++ = RSWAP(val);
212 }
213 }
215 void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len)
216 {
217 volatile unsigned short *rp;
218 unsigned short w, *buf;
220 buf = (unsigned short *) vbuf;
221 rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
222 for (; (len > 0); len--) {
223 w = *rp;
224 *buf++ = BSWAP(w);
225 }
226 }
228 void ne2000_outsb(unsigned int addr, const void *vbuf, unsigned long len)
229 {
230 NE2000_BYTE *rp, val;
231 unsigned char *buf;
233 buf = (unsigned char *) vbuf;
234 rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
235 for (; (len > 0); len--) {
236 val = *buf++;
237 *rp = RSWAP(val);
238 }
239 }
241 void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
242 {
243 volatile unsigned short *rp;
244 unsigned short w, *buf;
246 buf = (unsigned short *) vbuf;
247 rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
248 for (; (len > 0); len--) {
249 w = *buf++;
250 *rp = BSWAP(w);
251 }
252 }
254 #endif /* COLDFIRE_NE2000_FUNCS */
255 #endif /* NE2000_OFFOFFSET */
257 /****************************************************************************/
259 #ifdef COLDFIRE_NE2000_FUNCS
261 /*
262 * Lastly the interrupt set up code...
263 * Minor differences between the different board types.
264 */
266 #if defined(CONFIG_ARN5206)
267 void ne2000_irqsetup(int irq)
268 {
269 volatile unsigned char *icrp;
271 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
272 *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2;
273 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
274 }
275 #endif
277 #if defined(CONFIG_M5206eC3)
278 void ne2000_irqsetup(int irq)
279 {
280 volatile unsigned char *icrp;
282 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
283 *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
284 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
285 }
286 #endif
288 #if defined(CONFIG_CFV240)
289 void ne2000_irqsetup(int irq)
290 {
291 volatile unsigned char *icrp;
293 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR1);
294 *icrp = MCFSIM_ICR_LEVEL1 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
295 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT1);
296 }
297 #endif
299 #if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
300 void ne2000_irqsetup(int irq)
301 {
302 mcf_autovector(irq);
303 }
304 #endif
306 #if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
307 void ne2000_irqsetup(int irq)
308 {
309 volatile unsigned long *icrp;
310 volatile unsigned long *pitr;
312 /* The NE2000 device uses external IRQ3 */
313 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
314 *icrp = (*icrp & 0x77077777) | 0x00d00000;
316 pitr = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PITR);
317 *pitr = *pitr | 0x20000000;
318 }
320 void ne2000_irqack(int irq)
321 {
322 volatile unsigned long *icrp;
324 /* The NE2000 device uses external IRQ3 */
325 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
326 *icrp = (*icrp & 0x77777777) | 0x00800000;
327 }
328 #endif
330 #if defined(CONFIG_M5307) || defined(CONFIG_M5407)
331 #if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
333 void ne2000_irqsetup(int irq)
334 {
335 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
336 mcf_autovector(irq);
337 }
339 #else
341 void ne2000_irqsetup(int irq)
342 {
343 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
344 }
346 #endif /* ! CONFIG_NETtel || CONFIG_SECUREEDGEMP3 */
347 #endif /* CONFIG_M5307 || CONFIG_M5407 */
349 #endif /* COLDFIRE_NE2000_FUNCS */
351 /****************************************************************************/
352 #endif /* mcfne_h */