ia64/linux-2.6.18-xen.hg

view include/asm-m32r/cacheflush.h @ 452:c7ed6fe5dca0

kexec: dont initialise regions in reserve_memory()

There is no need to initialise efi_memmap_res and boot_param_res in
reserve_memory() for the initial xen domain as it is done in
machine_kexec_setup_resources() using values from the kexec hypercall.

Signed-off-by: Simon Horman <horms@verge.net.au>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Feb 28 10:55:18 2008 +0000 (2008-02-28)
parents 831230e53067
children
line source
1 #ifndef _ASM_M32R_CACHEFLUSH_H
2 #define _ASM_M32R_CACHEFLUSH_H
4 #include <linux/mm.h>
6 extern void _flush_cache_all(void);
7 extern void _flush_cache_copyback_all(void);
9 #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
10 #define flush_cache_all() do { } while (0)
11 #define flush_cache_mm(mm) do { } while (0)
12 #define flush_cache_range(vma, start, end) do { } while (0)
13 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
14 #define flush_dcache_page(page) do { } while (0)
15 #define flush_dcache_mmap_lock(mapping) do { } while (0)
16 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
17 #ifndef CONFIG_SMP
18 #define flush_icache_range(start, end) _flush_cache_copyback_all()
19 #define flush_icache_page(vma,pg) _flush_cache_copyback_all()
20 #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
21 #define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
22 #else /* CONFIG_SMP */
23 extern void smp_flush_cache_all(void);
24 #define flush_icache_range(start, end) smp_flush_cache_all()
25 #define flush_icache_page(vma,pg) smp_flush_cache_all()
26 #define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
27 #define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
28 #endif /* CONFIG_SMP */
29 #elif defined(CONFIG_CHIP_M32102)
30 #define flush_cache_all() do { } while (0)
31 #define flush_cache_mm(mm) do { } while (0)
32 #define flush_cache_range(vma, start, end) do { } while (0)
33 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
34 #define flush_dcache_page(page) do { } while (0)
35 #define flush_dcache_mmap_lock(mapping) do { } while (0)
36 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
37 #define flush_icache_range(start, end) _flush_cache_all()
38 #define flush_icache_page(vma,pg) _flush_cache_all()
39 #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
40 #define flush_cache_sigtramp(addr) _flush_cache_all()
41 #else
42 #define flush_cache_all() do { } while (0)
43 #define flush_cache_mm(mm) do { } while (0)
44 #define flush_cache_range(vma, start, end) do { } while (0)
45 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
46 #define flush_dcache_page(page) do { } while (0)
47 #define flush_dcache_mmap_lock(mapping) do { } while (0)
48 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
49 #define flush_icache_range(start, end) do { } while (0)
50 #define flush_icache_page(vma,pg) do { } while (0)
51 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
52 #define flush_cache_sigtramp(addr) do { } while (0)
53 #endif /* CONFIG_CHIP_* */
55 #define flush_cache_vmap(start, end) do { } while (0)
56 #define flush_cache_vunmap(start, end) do { } while (0)
58 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
59 do { \
60 memcpy(dst, src, len); \
61 flush_icache_user_range(vma, page, vaddr, len); \
62 } while (0)
63 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
64 memcpy(dst, src, len)
66 #endif /* _ASM_M32R_CACHEFLUSH_H */