ia64/linux-2.6.18-xen.hg

view include/asm-arm/arch-omap/io.h @ 452:c7ed6fe5dca0

kexec: dont initialise regions in reserve_memory()

There is no need to initialise efi_memmap_res and boot_param_res in
reserve_memory() for the initial xen domain as it is done in
machine_kexec_setup_resources() using values from the kexec hypercall.

Signed-off-by: Simon Horman <horms@verge.net.au>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Feb 28 10:55:18 2008 +0000 (2008-02-28)
parents 831230e53067
children
line source
1 /*
2 * linux/include/asm-arm/arch-omap/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from linux/include/asm-arm/arch-sa1100/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Modifications:
30 * 06-12-1997 RMK Created.
31 * 07-04-1999 RMK Major cleanup
32 */
34 #ifndef __ASM_ARM_ARCH_IO_H
35 #define __ASM_ARM_ARCH_IO_H
37 #include <asm/hardware.h>
39 #define IO_SPACE_LIMIT 0xffffffff
41 /*
42 * We don't actually have real ISA nor PCI buses, but there is so many
43 * drivers out there that might just work if we fake them...
44 */
45 #define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
46 #define __mem_pci(a) (a)
48 /*
49 * ----------------------------------------------------------------------------
50 * I/O mapping
51 * ----------------------------------------------------------------------------
52 */
54 #define PCIO_BASE 0
56 #if defined(CONFIG_ARCH_OMAP1)
58 #define IO_PHYS 0xFFFB0000
59 #define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
60 #define IO_SIZE 0x40000
61 #define IO_VIRT (IO_PHYS - IO_OFFSET)
62 #define IO_ADDRESS(pa) ((pa) - IO_OFFSET)
63 #define io_p2v(pa) ((pa) - IO_OFFSET)
64 #define io_v2p(va) ((va) + IO_OFFSET)
66 #elif defined(CONFIG_ARCH_OMAP2)
68 /* We map both L3 and L4 on OMAP2 */
69 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */
70 #define L3_24XX_VIRT 0xf8000000
71 #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
72 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */
73 #define L4_24XX_VIRT 0xd8000000
74 #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
75 #define IO_OFFSET 0x90000000
76 #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
77 #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
78 #define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
80 #endif
82 #ifndef __ASSEMBLER__
84 /*
85 * Functions to access the OMAP IO region
86 *
87 * NOTE: - Use omap_read/write[bwl] for physical register addresses
88 * - Use __raw_read/write[bwl]() for virtual register addresses
89 * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
90 * - DO NOT use hardcoded virtual addresses to allow changing the
91 * IO address space again if needed
92 */
93 #define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a))
94 #define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a))
95 #define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a))
97 #define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
98 #define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
99 #define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
101 /* 16 bit uses LDRH/STRH, base +/- offset_8 */
102 typedef struct { volatile u16 offset[256]; } __regbase16;
103 #define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
104 ->offset[((vaddr)&0xff)>>1]
105 #define __REG16(paddr) __REGV16(io_p2v(paddr))
107 /* 8/32 bit uses LDR/STR, base +/- offset_12 */
108 typedef struct { volatile u8 offset[4096]; } __regbase8;
109 #define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
110 ->offset[((vaddr)&4095)>>0]
111 #define __REG8(paddr) __REGV8(io_p2v(paddr))
113 typedef struct { volatile u32 offset[4096]; } __regbase32;
114 #define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
115 ->offset[((vaddr)&4095)>>2]
116 #define __REG32(paddr) __REGV32(io_p2v(paddr))
118 extern void omap1_map_common_io(void);
119 extern void omap1_init_common_hw(void);
121 extern void omap2_map_common_io(void);
122 extern void omap2_init_common_hw(void);
124 #else
126 #define __REG8(paddr) io_p2v(paddr)
127 #define __REG16(paddr) io_p2v(paddr)
128 #define __REG32(paddr) io_p2v(paddr)
130 #endif
132 #endif