ia64/linux-2.6.18-xen.hg

view arch/mips/kernel/gdb-stub.c @ 452:c7ed6fe5dca0

kexec: dont initialise regions in reserve_memory()

There is no need to initialise efi_memmap_res and boot_param_res in
reserve_memory() for the initial xen domain as it is done in
machine_kexec_setup_resources() using values from the kexec hypercall.

Signed-off-by: Simon Horman <horms@verge.net.au>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Feb 28 10:55:18 2008 +0000 (2008-02-28)
parents 831230e53067
children
line source
1 /*
2 * arch/mips/kernel/gdb-stub.c
3 *
4 * Originally written by Glenn Engel, Lake Stevens Instrument Division
5 *
6 * Contributed by HP Systems
7 *
8 * Modified for SPARC by Stu Grossman, Cygnus Support.
9 *
10 * Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
11 * Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
12 *
13 * Copyright (C) 1995 Andreas Busse
14 *
15 * Copyright (C) 2003 MontaVista Software Inc.
16 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
17 */
19 /*
20 * To enable debugger support, two things need to happen. One, a
21 * call to set_debug_traps() is necessary in order to allow any breakpoints
22 * or error conditions to be properly intercepted and reported to gdb.
23 * Two, a breakpoint needs to be generated to begin communication. This
24 * is most easily accomplished by a call to breakpoint(). Breakpoint()
25 * simulates a breakpoint by executing a BREAK instruction.
26 *
27 *
28 * The following gdb commands are supported:
29 *
30 * command function Return value
31 *
32 * g return the value of the CPU registers hex data or ENN
33 * G set the value of the CPU registers OK or ENN
34 *
35 * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
36 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
37 *
38 * c Resume at current address SNN ( signal NN)
39 * cAA..AA Continue at address AA..AA SNN
40 *
41 * s Step one instruction SNN
42 * sAA..AA Step one instruction from AA..AA SNN
43 *
44 * k kill
45 *
46 * ? What was the last sigval ? SNN (signal NN)
47 *
48 * bBB..BB Set baud rate to BB..BB OK or BNN, then sets
49 * baud rate
50 *
51 * All commands and responses are sent with a packet which includes a
52 * checksum. A packet consists of
53 *
54 * $<packet info>#<checksum>.
55 *
56 * where
57 * <packet info> :: <characters representing the command or response>
58 * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
59 *
60 * When a packet is received, it is first acknowledged with either '+' or '-'.
61 * '+' indicates a successful transfer. '-' indicates a failed transfer.
62 *
63 * Example:
64 *
65 * Host: Reply:
66 * $m0,10#2a +$00010203040506070809101112131415#42
67 *
68 *
69 * ==============
70 * MORE EXAMPLES:
71 * ==============
72 *
73 * For reference -- the following are the steps that one
74 * company took (RidgeRun Inc) to get remote gdb debugging
75 * going. In this scenario the host machine was a PC and the
76 * target platform was a Galileo EVB64120A MIPS evaluation
77 * board.
78 *
79 * Step 1:
80 * First download gdb-5.0.tar.gz from the internet.
81 * and then build/install the package.
82 *
83 * Example:
84 * $ tar zxf gdb-5.0.tar.gz
85 * $ cd gdb-5.0
86 * $ ./configure --target=mips-linux-elf
87 * $ make
88 * $ install
89 * $ which mips-linux-elf-gdb
90 * /usr/local/bin/mips-linux-elf-gdb
91 *
92 * Step 2:
93 * Configure linux for remote debugging and build it.
94 *
95 * Example:
96 * $ cd ~/linux
97 * $ make menuconfig <go to "Kernel Hacking" and turn on remote debugging>
98 * $ make
99 *
100 * Step 3:
101 * Download the kernel to the remote target and start
102 * the kernel running. It will promptly halt and wait
103 * for the host gdb session to connect. It does this
104 * since the "Kernel Hacking" option has defined
105 * CONFIG_KGDB which in turn enables your calls
106 * to:
107 * set_debug_traps();
108 * breakpoint();
109 *
110 * Step 4:
111 * Start the gdb session on the host.
112 *
113 * Example:
114 * $ mips-linux-elf-gdb vmlinux
115 * (gdb) set remotebaud 115200
116 * (gdb) target remote /dev/ttyS1
117 * ...at this point you are connected to
118 * the remote target and can use gdb
119 * in the normal fasion. Setting
120 * breakpoints, single stepping,
121 * printing variables, etc.
122 */
123 #include <linux/string.h>
124 #include <linux/kernel.h>
125 #include <linux/signal.h>
126 #include <linux/sched.h>
127 #include <linux/mm.h>
128 #include <linux/console.h>
129 #include <linux/init.h>
130 #include <linux/smp.h>
131 #include <linux/spinlock.h>
132 #include <linux/slab.h>
133 #include <linux/reboot.h>
135 #include <asm/asm.h>
136 #include <asm/cacheflush.h>
137 #include <asm/mipsregs.h>
138 #include <asm/pgtable.h>
139 #include <asm/system.h>
140 #include <asm/gdb-stub.h>
141 #include <asm/inst.h>
142 #include <asm/smp.h>
144 /*
145 * external low-level support routines
146 */
148 extern int putDebugChar(char c); /* write a single character */
149 extern char getDebugChar(void); /* read and return a single char */
150 extern void trap_low(void);
152 /*
153 * breakpoint and test functions
154 */
155 extern void breakpoint(void);
156 extern void breakinst(void);
157 extern void async_breakpoint(void);
158 extern void async_breakinst(void);
159 extern void adel(void);
161 /*
162 * local prototypes
163 */
165 static void getpacket(char *buffer);
166 static void putpacket(char *buffer);
167 static int computeSignal(int tt);
168 static int hex(unsigned char ch);
169 static int hexToInt(char **ptr, int *intValue);
170 static int hexToLong(char **ptr, long *longValue);
171 static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault);
172 void handle_exception(struct gdb_regs *regs);
174 int kgdb_enabled;
176 /*
177 * spin locks for smp case
178 */
179 static DEFINE_SPINLOCK(kgdb_lock);
180 static raw_spinlock_t kgdb_cpulock[NR_CPUS] = {
181 [0 ... NR_CPUS-1] = __RAW_SPIN_LOCK_UNLOCKED,
182 };
184 /*
185 * BUFMAX defines the maximum number of characters in inbound/outbound buffers
186 * at least NUMREGBYTES*2 are needed for register packets
187 */
188 #define BUFMAX 2048
190 static char input_buffer[BUFMAX];
191 static char output_buffer[BUFMAX];
192 static int initialized; /* !0 means we've been initialized */
193 static int kgdb_started;
194 static const char hexchars[]="0123456789abcdef";
196 /* Used to prevent crashes in memory access. Note that they'll crash anyway if
197 we haven't set up fault handlers yet... */
198 int kgdb_read_byte(unsigned char *address, unsigned char *dest);
199 int kgdb_write_byte(unsigned char val, unsigned char *dest);
201 /*
202 * Convert ch from a hex digit to an int
203 */
204 static int hex(unsigned char ch)
205 {
206 if (ch >= 'a' && ch <= 'f')
207 return ch-'a'+10;
208 if (ch >= '0' && ch <= '9')
209 return ch-'0';
210 if (ch >= 'A' && ch <= 'F')
211 return ch-'A'+10;
212 return -1;
213 }
215 /*
216 * scan for the sequence $<data>#<checksum>
217 */
218 static void getpacket(char *buffer)
219 {
220 unsigned char checksum;
221 unsigned char xmitcsum;
222 int i;
223 int count;
224 unsigned char ch;
226 do {
227 /*
228 * wait around for the start character,
229 * ignore all other characters
230 */
231 while ((ch = (getDebugChar() & 0x7f)) != '$') ;
233 checksum = 0;
234 xmitcsum = -1;
235 count = 0;
237 /*
238 * now, read until a # or end of buffer is found
239 */
240 while (count < BUFMAX) {
241 ch = getDebugChar();
242 if (ch == '#')
243 break;
244 checksum = checksum + ch;
245 buffer[count] = ch;
246 count = count + 1;
247 }
249 if (count >= BUFMAX)
250 continue;
252 buffer[count] = 0;
254 if (ch == '#') {
255 xmitcsum = hex(getDebugChar() & 0x7f) << 4;
256 xmitcsum |= hex(getDebugChar() & 0x7f);
258 if (checksum != xmitcsum)
259 putDebugChar('-'); /* failed checksum */
260 else {
261 putDebugChar('+'); /* successful transfer */
263 /*
264 * if a sequence char is present,
265 * reply the sequence ID
266 */
267 if (buffer[2] == ':') {
268 putDebugChar(buffer[0]);
269 putDebugChar(buffer[1]);
271 /*
272 * remove sequence chars from buffer
273 */
274 count = strlen(buffer);
275 for (i=3; i <= count; i++)
276 buffer[i-3] = buffer[i];
277 }
278 }
279 }
280 }
281 while (checksum != xmitcsum);
282 }
284 /*
285 * send the packet in buffer.
286 */
287 static void putpacket(char *buffer)
288 {
289 unsigned char checksum;
290 int count;
291 unsigned char ch;
293 /*
294 * $<packet info>#<checksum>.
295 */
297 do {
298 putDebugChar('$');
299 checksum = 0;
300 count = 0;
302 while ((ch = buffer[count]) != 0) {
303 if (!(putDebugChar(ch)))
304 return;
305 checksum += ch;
306 count += 1;
307 }
309 putDebugChar('#');
310 putDebugChar(hexchars[checksum >> 4]);
311 putDebugChar(hexchars[checksum & 0xf]);
313 }
314 while ((getDebugChar() & 0x7f) != '+');
315 }
318 /*
319 * Convert the memory pointed to by mem into hex, placing result in buf.
320 * Return a pointer to the last char put in buf (null), in case of mem fault,
321 * return 0.
322 * may_fault is non-zero if we are reading from arbitrary memory, but is currently
323 * not used.
324 */
325 static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault)
326 {
327 unsigned char ch;
329 while (count-- > 0) {
330 if (kgdb_read_byte(mem++, &ch) != 0)
331 return 0;
332 *buf++ = hexchars[ch >> 4];
333 *buf++ = hexchars[ch & 0xf];
334 }
336 *buf = 0;
338 return buf;
339 }
341 /*
342 * convert the hex array pointed to by buf into binary to be placed in mem
343 * return a pointer to the character AFTER the last byte written
344 * may_fault is non-zero if we are reading from arbitrary memory, but is currently
345 * not used.
346 */
347 static char *hex2mem(char *buf, char *mem, int count, int binary, int may_fault)
348 {
349 int i;
350 unsigned char ch;
352 for (i=0; i<count; i++)
353 {
354 if (binary) {
355 ch = *buf++;
356 if (ch == 0x7d)
357 ch = 0x20 ^ *buf++;
358 }
359 else {
360 ch = hex(*buf++) << 4;
361 ch |= hex(*buf++);
362 }
363 if (kgdb_write_byte(ch, mem++) != 0)
364 return 0;
365 }
367 return mem;
368 }
370 /*
371 * This table contains the mapping between SPARC hardware trap types, and
372 * signals, which are primarily what GDB understands. It also indicates
373 * which hardware traps we need to commandeer when initializing the stub.
374 */
375 static struct hard_trap_info {
376 unsigned char tt; /* Trap type code for MIPS R3xxx and R4xxx */
377 unsigned char signo; /* Signal that we map this trap into */
378 } hard_trap_info[] = {
379 { 6, SIGBUS }, /* instruction bus error */
380 { 7, SIGBUS }, /* data bus error */
381 { 9, SIGTRAP }, /* break */
382 { 10, SIGILL }, /* reserved instruction */
383 /* { 11, SIGILL }, */ /* CPU unusable */
384 { 12, SIGFPE }, /* overflow */
385 { 13, SIGTRAP }, /* trap */
386 { 14, SIGSEGV }, /* virtual instruction cache coherency */
387 { 15, SIGFPE }, /* floating point exception */
388 { 23, SIGSEGV }, /* watch */
389 { 31, SIGSEGV }, /* virtual data cache coherency */
390 { 0, 0} /* Must be last */
391 };
393 /* Save the normal trap handlers for user-mode traps. */
394 void *saved_vectors[32];
396 /*
397 * Set up exception handlers for tracing and breakpoints
398 */
399 void set_debug_traps(void)
400 {
401 struct hard_trap_info *ht;
402 unsigned long flags;
403 unsigned char c;
405 local_irq_save(flags);
406 for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
407 saved_vectors[ht->tt] = set_except_vector(ht->tt, trap_low);
409 putDebugChar('+'); /* 'hello world' */
410 /*
411 * In case GDB is started before us, ack any packets
412 * (presumably "$?#xx") sitting there.
413 */
414 while((c = getDebugChar()) != '$');
415 while((c = getDebugChar()) != '#');
416 c = getDebugChar(); /* eat first csum byte */
417 c = getDebugChar(); /* eat second csum byte */
418 putDebugChar('+'); /* ack it */
420 initialized = 1;
421 local_irq_restore(flags);
422 }
424 void restore_debug_traps(void)
425 {
426 struct hard_trap_info *ht;
427 unsigned long flags;
429 local_irq_save(flags);
430 for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
431 set_except_vector(ht->tt, saved_vectors[ht->tt]);
432 local_irq_restore(flags);
433 }
435 /*
436 * Convert the MIPS hardware trap type code to a Unix signal number.
437 */
438 static int computeSignal(int tt)
439 {
440 struct hard_trap_info *ht;
442 for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
443 if (ht->tt == tt)
444 return ht->signo;
446 return SIGHUP; /* default for things we don't know about */
447 }
449 /*
450 * While we find nice hex chars, build an int.
451 * Return number of chars processed.
452 */
453 static int hexToInt(char **ptr, int *intValue)
454 {
455 int numChars = 0;
456 int hexValue;
458 *intValue = 0;
460 while (**ptr) {
461 hexValue = hex(**ptr);
462 if (hexValue < 0)
463 break;
465 *intValue = (*intValue << 4) | hexValue;
466 numChars ++;
468 (*ptr)++;
469 }
471 return (numChars);
472 }
474 static int hexToLong(char **ptr, long *longValue)
475 {
476 int numChars = 0;
477 int hexValue;
479 *longValue = 0;
481 while (**ptr) {
482 hexValue = hex(**ptr);
483 if (hexValue < 0)
484 break;
486 *longValue = (*longValue << 4) | hexValue;
487 numChars ++;
489 (*ptr)++;
490 }
492 return numChars;
493 }
496 #if 0
497 /*
498 * Print registers (on target console)
499 * Used only to debug the stub...
500 */
501 void show_gdbregs(struct gdb_regs * regs)
502 {
503 /*
504 * Saved main processor registers
505 */
506 printk("$0 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
507 regs->reg0, regs->reg1, regs->reg2, regs->reg3,
508 regs->reg4, regs->reg5, regs->reg6, regs->reg7);
509 printk("$8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
510 regs->reg8, regs->reg9, regs->reg10, regs->reg11,
511 regs->reg12, regs->reg13, regs->reg14, regs->reg15);
512 printk("$16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
513 regs->reg16, regs->reg17, regs->reg18, regs->reg19,
514 regs->reg20, regs->reg21, regs->reg22, regs->reg23);
515 printk("$24: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
516 regs->reg24, regs->reg25, regs->reg26, regs->reg27,
517 regs->reg28, regs->reg29, regs->reg30, regs->reg31);
519 /*
520 * Saved cp0 registers
521 */
522 printk("epc : %08lx\nStatus: %08lx\nCause : %08lx\n",
523 regs->cp0_epc, regs->cp0_status, regs->cp0_cause);
524 }
525 #endif /* dead code */
527 /*
528 * We single-step by setting breakpoints. When an exception
529 * is handled, we need to restore the instructions hoisted
530 * when the breakpoints were set.
531 *
532 * This is where we save the original instructions.
533 */
534 static struct gdb_bp_save {
535 unsigned long addr;
536 unsigned int val;
537 } step_bp[2];
539 #define BP 0x0000000d /* break opcode */
541 /*
542 * Set breakpoint instructions for single stepping.
543 */
544 static void single_step(struct gdb_regs *regs)
545 {
546 union mips_instruction insn;
547 unsigned long targ;
548 int is_branch, is_cond, i;
550 targ = regs->cp0_epc;
551 insn.word = *(unsigned int *)targ;
552 is_branch = is_cond = 0;
554 switch (insn.i_format.opcode) {
555 /*
556 * jr and jalr are in r_format format.
557 */
558 case spec_op:
559 switch (insn.r_format.func) {
560 case jalr_op:
561 case jr_op:
562 targ = *(&regs->reg0 + insn.r_format.rs);
563 is_branch = 1;
564 break;
565 }
566 break;
568 /*
569 * This group contains:
570 * bltz_op, bgez_op, bltzl_op, bgezl_op,
571 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
572 */
573 case bcond_op:
574 is_branch = is_cond = 1;
575 targ += 4 + (insn.i_format.simmediate << 2);
576 break;
578 /*
579 * These are unconditional and in j_format.
580 */
581 case jal_op:
582 case j_op:
583 is_branch = 1;
584 targ += 4;
585 targ >>= 28;
586 targ <<= 28;
587 targ |= (insn.j_format.target << 2);
588 break;
590 /*
591 * These are conditional.
592 */
593 case beq_op:
594 case beql_op:
595 case bne_op:
596 case bnel_op:
597 case blez_op:
598 case blezl_op:
599 case bgtz_op:
600 case bgtzl_op:
601 case cop0_op:
602 case cop1_op:
603 case cop2_op:
604 case cop1x_op:
605 is_branch = is_cond = 1;
606 targ += 4 + (insn.i_format.simmediate << 2);
607 break;
608 }
610 if (is_branch) {
611 i = 0;
612 if (is_cond && targ != (regs->cp0_epc + 8)) {
613 step_bp[i].addr = regs->cp0_epc + 8;
614 step_bp[i++].val = *(unsigned *)(regs->cp0_epc + 8);
615 *(unsigned *)(regs->cp0_epc + 8) = BP;
616 }
617 step_bp[i].addr = targ;
618 step_bp[i].val = *(unsigned *)targ;
619 *(unsigned *)targ = BP;
620 } else {
621 step_bp[0].addr = regs->cp0_epc + 4;
622 step_bp[0].val = *(unsigned *)(regs->cp0_epc + 4);
623 *(unsigned *)(regs->cp0_epc + 4) = BP;
624 }
625 }
627 /*
628 * If asynchronously interrupted by gdb, then we need to set a breakpoint
629 * at the interrupted instruction so that we wind up stopped with a
630 * reasonable stack frame.
631 */
632 static struct gdb_bp_save async_bp;
634 /*
635 * Swap the interrupted EPC with our asynchronous breakpoint routine.
636 * This is safer than stuffing the breakpoint in-place, since no cache
637 * flushes (or resulting smp_call_functions) are required. The
638 * assumption is that only one CPU will be handling asynchronous bp's,
639 * and only one can be active at a time.
640 */
641 extern spinlock_t smp_call_lock;
643 void set_async_breakpoint(unsigned long *epc)
644 {
645 /* skip breaking into userland */
646 if ((*epc & 0x80000000) == 0)
647 return;
649 #ifdef CONFIG_SMP
650 /* avoid deadlock if someone is make IPC */
651 if (spin_is_locked(&smp_call_lock))
652 return;
653 #endif
655 async_bp.addr = *epc;
656 *epc = (unsigned long)async_breakpoint;
657 }
659 static void kgdb_wait(void *arg)
660 {
661 unsigned flags;
662 int cpu = smp_processor_id();
664 local_irq_save(flags);
666 __raw_spin_lock(&kgdb_cpulock[cpu]);
667 __raw_spin_unlock(&kgdb_cpulock[cpu]);
669 local_irq_restore(flags);
670 }
672 /*
673 * GDB stub needs to call kgdb_wait on all processor with interrupts
674 * disabled, so it uses it's own special variant.
675 */
676 static int kgdb_smp_call_kgdb_wait(void)
677 {
678 #ifdef CONFIG_SMP
679 struct call_data_struct data;
680 int i, cpus = num_online_cpus() - 1;
681 int cpu = smp_processor_id();
683 /*
684 * Can die spectacularly if this CPU isn't yet marked online
685 */
686 BUG_ON(!cpu_online(cpu));
688 if (!cpus)
689 return 0;
691 if (spin_is_locked(&smp_call_lock)) {
692 /*
693 * Some other processor is trying to make us do something
694 * but we're not going to respond... give up
695 */
696 return -1;
697 }
699 /*
700 * We will continue here, accepting the fact that
701 * the kernel may deadlock if another CPU attempts
702 * to call smp_call_function now...
703 */
705 data.func = kgdb_wait;
706 data.info = NULL;
707 atomic_set(&data.started, 0);
708 data.wait = 0;
710 spin_lock(&smp_call_lock);
711 call_data = &data;
712 mb();
714 /* Send a message to all other CPUs and wait for them to respond */
715 for (i = 0; i < NR_CPUS; i++)
716 if (cpu_online(i) && i != cpu)
717 core_send_ipi(i, SMP_CALL_FUNCTION);
719 /* Wait for response */
720 /* FIXME: lock-up detection, backtrace on lock-up */
721 while (atomic_read(&data.started) != cpus)
722 barrier();
724 call_data = NULL;
725 spin_unlock(&smp_call_lock);
726 #endif
728 return 0;
729 }
731 /*
732 * This function does all command processing for interfacing to gdb. It
733 * returns 1 if you should skip the instruction at the trap address, 0
734 * otherwise.
735 */
736 void handle_exception (struct gdb_regs *regs)
737 {
738 int trap; /* Trap type */
739 int sigval;
740 long addr;
741 int length;
742 char *ptr;
743 unsigned long *stack;
744 int i;
745 int bflag = 0;
747 kgdb_started = 1;
749 /*
750 * acquire the big kgdb spinlock
751 */
752 if (!spin_trylock(&kgdb_lock)) {
753 /*
754 * some other CPU has the lock, we should go back to
755 * receive the gdb_wait IPC
756 */
757 return;
758 }
760 /*
761 * If we're in async_breakpoint(), restore the real EPC from
762 * the breakpoint.
763 */
764 if (regs->cp0_epc == (unsigned long)async_breakinst) {
765 regs->cp0_epc = async_bp.addr;
766 async_bp.addr = 0;
767 }
769 /*
770 * acquire the CPU spinlocks
771 */
772 for (i = num_online_cpus()-1; i >= 0; i--)
773 if (__raw_spin_trylock(&kgdb_cpulock[i]) == 0)
774 panic("kgdb: couldn't get cpulock %d\n", i);
776 /*
777 * force other cpus to enter kgdb
778 */
779 kgdb_smp_call_kgdb_wait();
781 /*
782 * If we're in breakpoint() increment the PC
783 */
784 trap = (regs->cp0_cause & 0x7c) >> 2;
785 if (trap == 9 && regs->cp0_epc == (unsigned long)breakinst)
786 regs->cp0_epc += 4;
788 /*
789 * If we were single_stepping, restore the opcodes hoisted
790 * for the breakpoint[s].
791 */
792 if (step_bp[0].addr) {
793 *(unsigned *)step_bp[0].addr = step_bp[0].val;
794 step_bp[0].addr = 0;
796 if (step_bp[1].addr) {
797 *(unsigned *)step_bp[1].addr = step_bp[1].val;
798 step_bp[1].addr = 0;
799 }
800 }
802 stack = (long *)regs->reg29; /* stack ptr */
803 sigval = computeSignal(trap);
805 /*
806 * reply to host that an exception has occurred
807 */
808 ptr = output_buffer;
810 /*
811 * Send trap type (converted to signal)
812 */
813 *ptr++ = 'T';
814 *ptr++ = hexchars[sigval >> 4];
815 *ptr++ = hexchars[sigval & 0xf];
817 /*
818 * Send Error PC
819 */
820 *ptr++ = hexchars[REG_EPC >> 4];
821 *ptr++ = hexchars[REG_EPC & 0xf];
822 *ptr++ = ':';
823 ptr = mem2hex((char *)&regs->cp0_epc, ptr, sizeof(long), 0);
824 *ptr++ = ';';
826 /*
827 * Send frame pointer
828 */
829 *ptr++ = hexchars[REG_FP >> 4];
830 *ptr++ = hexchars[REG_FP & 0xf];
831 *ptr++ = ':';
832 ptr = mem2hex((char *)&regs->reg30, ptr, sizeof(long), 0);
833 *ptr++ = ';';
835 /*
836 * Send stack pointer
837 */
838 *ptr++ = hexchars[REG_SP >> 4];
839 *ptr++ = hexchars[REG_SP & 0xf];
840 *ptr++ = ':';
841 ptr = mem2hex((char *)&regs->reg29, ptr, sizeof(long), 0);
842 *ptr++ = ';';
844 *ptr++ = 0;
845 putpacket(output_buffer); /* send it off... */
847 /*
848 * Wait for input from remote GDB
849 */
850 while (1) {
851 output_buffer[0] = 0;
852 getpacket(input_buffer);
854 switch (input_buffer[0])
855 {
856 case '?':
857 output_buffer[0] = 'S';
858 output_buffer[1] = hexchars[sigval >> 4];
859 output_buffer[2] = hexchars[sigval & 0xf];
860 output_buffer[3] = 0;
861 break;
863 /*
864 * Detach debugger; let CPU run
865 */
866 case 'D':
867 putpacket(output_buffer);
868 goto finish_kgdb;
869 break;
871 case 'd':
872 /* toggle debug flag */
873 break;
875 /*
876 * Return the value of the CPU registers
877 */
878 case 'g':
879 ptr = output_buffer;
880 ptr = mem2hex((char *)&regs->reg0, ptr, 32*sizeof(long), 0); /* r0...r31 */
881 ptr = mem2hex((char *)&regs->cp0_status, ptr, 6*sizeof(long), 0); /* cp0 */
882 ptr = mem2hex((char *)&regs->fpr0, ptr, 32*sizeof(long), 0); /* f0...31 */
883 ptr = mem2hex((char *)&regs->cp1_fsr, ptr, 2*sizeof(long), 0); /* cp1 */
884 ptr = mem2hex((char *)&regs->frame_ptr, ptr, 2*sizeof(long), 0); /* frp */
885 ptr = mem2hex((char *)&regs->cp0_index, ptr, 16*sizeof(long), 0); /* cp0 */
886 break;
888 /*
889 * set the value of the CPU registers - return OK
890 */
891 case 'G':
892 {
893 ptr = &input_buffer[1];
894 hex2mem(ptr, (char *)&regs->reg0, 32*sizeof(long), 0, 0);
895 ptr += 32*(2*sizeof(long));
896 hex2mem(ptr, (char *)&regs->cp0_status, 6*sizeof(long), 0, 0);
897 ptr += 6*(2*sizeof(long));
898 hex2mem(ptr, (char *)&regs->fpr0, 32*sizeof(long), 0, 0);
899 ptr += 32*(2*sizeof(long));
900 hex2mem(ptr, (char *)&regs->cp1_fsr, 2*sizeof(long), 0, 0);
901 ptr += 2*(2*sizeof(long));
902 hex2mem(ptr, (char *)&regs->frame_ptr, 2*sizeof(long), 0, 0);
903 ptr += 2*(2*sizeof(long));
904 hex2mem(ptr, (char *)&regs->cp0_index, 16*sizeof(long), 0, 0);
905 strcpy(output_buffer,"OK");
906 }
907 break;
909 /*
910 * mAA..AA,LLLL Read LLLL bytes at address AA..AA
911 */
912 case 'm':
913 ptr = &input_buffer[1];
915 if (hexToLong(&ptr, &addr)
916 && *ptr++ == ','
917 && hexToInt(&ptr, &length)) {
918 if (mem2hex((char *)addr, output_buffer, length, 1))
919 break;
920 strcpy (output_buffer, "E03");
921 } else
922 strcpy(output_buffer,"E01");
923 break;
925 /*
926 * XAA..AA,LLLL: Write LLLL escaped binary bytes at address AA.AA
927 */
928 case 'X':
929 bflag = 1;
930 /* fall through */
932 /*
933 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK
934 */
935 case 'M':
936 ptr = &input_buffer[1];
938 if (hexToLong(&ptr, &addr)
939 && *ptr++ == ','
940 && hexToInt(&ptr, &length)
941 && *ptr++ == ':') {
942 if (hex2mem(ptr, (char *)addr, length, bflag, 1))
943 strcpy(output_buffer, "OK");
944 else
945 strcpy(output_buffer, "E03");
946 }
947 else
948 strcpy(output_buffer, "E02");
949 break;
951 /*
952 * cAA..AA Continue at address AA..AA(optional)
953 */
954 case 'c':
955 /* try to read optional parameter, pc unchanged if no parm */
957 ptr = &input_buffer[1];
958 if (hexToLong(&ptr, &addr))
959 regs->cp0_epc = addr;
961 goto exit_kgdb_exception;
962 break;
964 /*
965 * kill the program; let us try to restart the machine
966 * Reset the whole machine.
967 */
968 case 'k':
969 case 'r':
970 machine_restart("kgdb restarts machine");
971 break;
973 /*
974 * Step to next instruction
975 */
976 case 's':
977 /*
978 * There is no single step insn in the MIPS ISA, so we
979 * use breakpoints and continue, instead.
980 */
981 single_step(regs);
982 goto exit_kgdb_exception;
983 /* NOTREACHED */
984 break;
986 /*
987 * Set baud rate (bBB)
988 * FIXME: Needs to be written
989 */
990 case 'b':
991 {
992 #if 0
993 int baudrate;
994 extern void set_timer_3();
996 ptr = &input_buffer[1];
997 if (!hexToInt(&ptr, &baudrate))
998 {
999 strcpy(output_buffer,"B01");
1000 break;
1003 /* Convert baud rate to uart clock divider */
1005 switch (baudrate)
1007 case 38400:
1008 baudrate = 16;
1009 break;
1010 case 19200:
1011 baudrate = 33;
1012 break;
1013 case 9600:
1014 baudrate = 65;
1015 break;
1016 default:
1017 baudrate = 0;
1018 strcpy(output_buffer,"B02");
1019 goto x1;
1022 if (baudrate) {
1023 putpacket("OK"); /* Ack before changing speed */
1024 set_timer_3(baudrate); /* Set it */
1026 #endif
1028 break;
1030 } /* switch */
1032 /*
1033 * reply to the request
1034 */
1036 putpacket(output_buffer);
1038 } /* while */
1040 return;
1042 finish_kgdb:
1043 restore_debug_traps();
1045 exit_kgdb_exception:
1046 /* release locks so other CPUs can go */
1047 for (i = num_online_cpus()-1; i >= 0; i--)
1048 __raw_spin_unlock(&kgdb_cpulock[i]);
1049 spin_unlock(&kgdb_lock);
1051 __flush_cache_all();
1052 return;
1055 /*
1056 * This function will generate a breakpoint exception. It is used at the
1057 * beginning of a program to sync up with a debugger and can be used
1058 * otherwise as a quick means to stop program execution and "break" into
1059 * the debugger.
1060 */
1061 void breakpoint(void)
1063 if (!initialized)
1064 return;
1066 __asm__ __volatile__(
1067 ".globl breakinst\n\t"
1068 ".set\tnoreorder\n\t"
1069 "nop\n"
1070 "breakinst:\tbreak\n\t"
1071 "nop\n\t"
1072 ".set\treorder"
1073 );
1076 /* Nothing but the break; don't pollute any registers */
1077 void async_breakpoint(void)
1079 __asm__ __volatile__(
1080 ".globl async_breakinst\n\t"
1081 ".set\tnoreorder\n\t"
1082 "nop\n"
1083 "async_breakinst:\tbreak\n\t"
1084 "nop\n\t"
1085 ".set\treorder"
1086 );
1089 void adel(void)
1091 __asm__ __volatile__(
1092 ".globl\tadel\n\t"
1093 "lui\t$8,0x8000\n\t"
1094 "lw\t$9,1($8)\n\t"
1095 );
1098 /*
1099 * malloc is needed by gdb client in "call func()", even a private one
1100 * will make gdb happy
1101 */
1102 static void * __attribute_used__ malloc(size_t size)
1104 return kmalloc(size, GFP_ATOMIC);
1107 static void __attribute_used__ free (void *where)
1109 kfree(where);
1112 #ifdef CONFIG_GDB_CONSOLE
1114 void gdb_putsn(const char *str, int l)
1116 char outbuf[18];
1118 if (!kgdb_started)
1119 return;
1121 outbuf[0]='O';
1123 while(l) {
1124 int i = (l>8)?8:l;
1125 mem2hex((char *)str, &outbuf[1], i, 0);
1126 outbuf[(i*2)+1]=0;
1127 putpacket(outbuf);
1128 str += i;
1129 l -= i;
1133 static void gdb_console_write(struct console *con, const char *s, unsigned n)
1135 gdb_putsn(s, n);
1138 static struct console gdb_console = {
1139 .name = "gdb",
1140 .write = gdb_console_write,
1141 .flags = CON_PRINTBUFFER,
1142 .index = -1
1143 };
1145 static int __init register_gdb_console(void)
1147 register_console(&gdb_console);
1149 return 0;
1152 console_initcall(register_gdb_console);
1154 #endif