ia64/linux-2.6.18-xen.hg

view drivers/pci/pci.h @ 884:c7c92f868aa1

linux/pci: reserve io/memory space for bridge

reserve io/memory space for bridge which will be used later
by PCI hotplug.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Keir Fraser <keir.fraser@citrix.com>
date Thu May 28 10:00:03 2009 +0100 (2009-05-28)
parents b998614e2e2a
children
line source
1 /* Functions internal to the PCI core code */
3 extern int pci_uevent(struct device *dev, char **envp, int num_envp,
4 char *buffer, int buffer_size);
5 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
6 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
7 extern void pci_cleanup_rom(struct pci_dev *dev);
8 extern int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
9 resource_size_t size, resource_size_t align,
10 resource_size_t min, unsigned int type_mask,
11 void (*alignf)(void *, struct resource *,
12 resource_size_t, resource_size_t),
13 void *alignf_data);
14 /* Firmware callbacks */
15 extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state);
16 extern int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t state);
18 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
20 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
21 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
22 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
23 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
24 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
25 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
27 /* PCI /proc functions */
28 #ifdef CONFIG_PROC_FS
29 extern int pci_proc_attach_device(struct pci_dev *dev);
30 extern int pci_proc_detach_device(struct pci_dev *dev);
31 extern int pci_proc_detach_bus(struct pci_bus *bus);
32 #else
33 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
34 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
35 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
36 #endif
38 /* Functions for PCI Hotplug drivers to use */
39 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
40 extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
42 extern void pci_remove_legacy_files(struct pci_bus *bus);
44 /* Lock for read/write access to pci device and bus lists */
45 extern struct rw_semaphore pci_bus_sem;
47 #ifdef CONFIG_X86_IO_APIC
48 extern int pci_msi_quirk;
49 #else
50 #define pci_msi_quirk 0
51 #endif
52 extern unsigned int pci_pm_d3_delay;
53 #ifdef CONFIG_PCI_MSI
54 void disable_msi_mode(struct pci_dev *dev, int pos, int type);
55 void pci_no_msi(void);
56 #else
57 static inline void disable_msi_mode(struct pci_dev *dev, int pos, int type) { }
58 static inline void pci_no_msi(void) { }
59 #endif
60 #if defined(CONFIG_PCI_MSI) && defined(CONFIG_PM)
61 int pci_save_msi_state(struct pci_dev *dev);
62 int pci_save_msix_state(struct pci_dev *dev);
63 void pci_restore_msi_state(struct pci_dev *dev);
64 void pci_restore_msix_state(struct pci_dev *dev);
65 #else
66 static inline int pci_save_msi_state(struct pci_dev *dev) { return 0; }
67 static inline int pci_save_msix_state(struct pci_dev *dev) { return 0; }
68 static inline void pci_restore_msi_state(struct pci_dev *dev) {}
69 static inline void pci_restore_msix_state(struct pci_dev *dev) {}
70 #endif
71 static inline int pci_no_d1d2(struct pci_dev *dev)
72 {
73 unsigned int parent_dstates = 0;
75 if (dev->bus->self)
76 parent_dstates = dev->bus->self->no_d1d2;
77 return (dev->no_d1d2 || parent_dstates);
79 }
80 extern int pcie_mch_quirk;
81 extern struct device_attribute pci_dev_attrs[];
82 extern struct class_device_attribute class_device_attr_cpuaffinity;
84 /**
85 * pci_match_one_device - Tell if a PCI device structure has a matching
86 * PCI device id structure
87 * @id: single PCI device id structure to match
88 * @dev: the PCI device structure to match against
89 *
90 * Returns the matching pci_device_id structure or %NULL if there is no match.
91 */
92 static inline const struct pci_device_id *
93 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
94 {
95 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
96 (id->device == PCI_ANY_ID || id->device == dev->device) &&
97 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
98 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
99 !((id->class ^ dev->class) & id->class_mask))
100 return id;
101 return NULL;
102 }
104 #ifdef CONFIG_PCI_REASSIGN
105 extern void pci_disable_bridge_window(struct pci_dev *dev);
106 #endif
107 #ifdef CONFIG_PCI_GUESTDEV
108 extern int pci_is_guestdev(struct pci_dev *dev);
109 extern int pci_is_reassigndev(struct pci_dev *dev);
110 extern int pci_is_iomuldev(struct pci_dev *dev);
111 #else
112 #define pci_is_guestdev(dev) 0
113 #define pci_is_reassigndev(dev) 0
114 #define pci_is_iomuldev(dev) 0
115 #endif
117 #ifdef CONFIG_PCI_GUESTDEV
118 int pci_is_guestdev_to_reassign(struct pci_dev *dev);
119 #endif /* CONFIG_PCI_GUESTDEV */
121 enum pci_bar_type {
122 pci_bar_unknown, /* Standard PCI BAR probe */
123 pci_bar_io, /* An io port BAR */
124 pci_bar_mem32, /* A 32-bit memory BAR */
125 pci_bar_mem64, /* A 64-bit memory BAR */
126 };
128 extern int pci_setup_device(struct pci_dev *dev);
129 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
130 struct resource *res, unsigned int reg);
131 extern int pci_resource_bar(struct pci_dev *dev, int resno,
132 enum pci_bar_type *type);
133 extern void pci_enable_ari(struct pci_dev *dev);
134 /**
135 * pci_ari_enabled - query ARI forwarding status
136 * @bus: the PCI bus
137 *
138 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
139 */
140 static inline int pci_ari_enabled(struct pci_bus *bus)
141 {
142 return bus->self && bus->self->ari_enabled;
143 }
145 /* Single Root I/O Virtualization */
146 struct pci_sriov {
147 int pos; /* capability position */
148 int nres; /* number of resources */
149 u32 cap; /* SR-IOV Capabilities */
150 u16 ctrl; /* SR-IOV Control */
151 u16 total; /* total VFs associated with the PF */
152 u16 initial; /* initial VFs associated with the PF */
153 u16 nr_virtfn; /* number of VFs available */
154 u16 offset; /* first VF Routing ID offset */
155 u16 stride; /* following VF stride */
156 u32 pgsz; /* page size for BAR alignment */
157 u8 link; /* Function Dependency Link */
158 struct pci_dev *dev; /* lowest numbered PF */
159 struct pci_dev *self; /* this PF */
160 struct mutex lock; /* lock for VF bus */
161 };
163 #ifdef CONFIG_PCI_IOV
164 extern int pci_iov_init(struct pci_dev *dev);
165 extern void pci_iov_release(struct pci_dev *dev);
166 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
167 enum pci_bar_type *type);
168 extern void pci_restore_iov_state(struct pci_dev *dev);
169 extern int pci_iov_bus_range(struct pci_bus *bus);
170 #else
171 static inline int pci_iov_init(struct pci_dev *dev)
172 {
173 return -ENODEV;
174 }
175 static inline void pci_iov_release(struct pci_dev *dev)
177 {
178 }
179 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
180 enum pci_bar_type *type)
181 {
182 return 0;
183 }
184 static inline void pci_restore_iov_state(struct pci_dev *dev)
185 {
186 }
187 static inline int pci_iov_bus_range(struct pci_bus *bus)
188 {
189 return 0;
190 }
191 #endif /* CONFIG_PCI_IOV */
193 #ifdef CONFIG_PCI_RESERVE
194 unsigned long pci_reserve_size_io(struct pci_bus *bus);
195 unsigned long pci_reserve_size_mem(struct pci_bus *bus);
196 #else
197 static inline unsigned long pci_reserve_size_io(struct pci_bus *bus)
198 {
199 return 0;
200 }
202 static inline unsigned long pci_reserve_size_mem(struct pci_bus *bus)
203 {
204 return 0;
205 }
206 #endif /* CONFIG_PCI_RESERVE */