ia64/linux-2.6.18-xen.hg

view arch/cris/arch-v10/kernel/head.S @ 647:a5bb490065f6

Fix the build after public header sync.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Aug 13 14:01:49 2008 +0100 (2008-08-13)
parents 831230e53067
children
line source
1 /* $Id: head.S,v 1.10 2005/06/20 05:12:54 starvik Exp $
2 *
3 * Head of the kernel - alter with care
4 *
5 * Copyright (C) 2000, 2001 Axis Communications AB
6 *
7 * Authors: Bjorn Wesen (bjornw@axis.com)
8 *
9 * $Log: head.S,v $
10 * Revision 1.10 2005/06/20 05:12:54 starvik
11 * Remove unnecessary diff to kernel.org tree
12 *
13 * Revision 1.9 2004/12/13 12:21:51 starvik
14 * Added I/O and DMA allocators from Linux 2.4
15 *
16 * Revision 1.8 2004/11/22 11:41:14 starvik
17 * Kernel command line may be supplied to kernel. Not used by Axis but may
18 * be used by customers.
19 *
20 * Revision 1.7 2004/05/14 07:58:01 starvik
21 * Merge of changes from 2.4
22 *
23 * Revision 1.6 2003/04/28 05:31:46 starvik
24 * Added section attributes
25 *
26 * Revision 1.5 2002/12/11 15:42:02 starvik
27 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/*.c
28 *
29 * Revision 1.4 2002/11/07 09:00:44 starvik
30 * Names changed for init sections
31 * init_task_union -> init_thread_union
32 *
33 * Revision 1.3 2002/02/05 15:38:23 bjornw
34 * Oops.. non-CRAMFS_MAGIC should jump over the copying, not into it...
35 *
36 * Revision 1.2 2001/12/18 13:35:19 bjornw
37 * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15).
38 *
39 * Revision 1.43 2001/11/08 15:09:43 starvik
40 * Only start MII clock if Ethernet is configured
41 *
42 * Revision 1.42 2001/11/08 14:37:34 starvik
43 * Start MII clock early to make sure that it is running at tranceiver reset
44 *
45 * Revision 1.41 2001/10/29 14:55:58 pkj
46 * Corrected pa$r0 to par0.
47 *
48 * Revision 1.40 2001/10/03 14:59:57 pkj
49 * Added support for resetting the Bluetooth hardware.
50 *
51 * Revision 1.39 2001/10/01 14:45:03 bjornw
52 * Removed underscores and added register prefixes
53 *
54 * Revision 1.38 2001/09/21 07:14:11 jonashg
55 * Made root filesystem (cramfs) use mtdblock driver when booting from flash.
56 *
57 * Revision 1.37 2001/09/11 13:44:29 orjanf
58 * Decouple usage of serial ports for debug and kgdb.
59 *
60 * Revision 1.36 2001/06/29 12:39:31 pkj
61 * Added support for mirroring the first flash to just below the
62 * second one, to make them look consecutive to cramfs.
63 *
64 * Revision 1.35 2001/06/25 14:07:00 hp
65 * Fix review comment.
66 * * head.S: Use IO_STATE, IO_FIELD and IO_MASK constructs instead of
67 * magic numbers. Add comment that -traditional must not be used.
68 * * entry.S (SYMBOL_NAME): Change redefinition to use ## concatenation.
69 * Correct and update comment.
70 * * Makefile (.S.o): Don't use -traditional. Add comment why the
71 * toplevel rule can't be used (now that there's a reason).
72 *
73 * Revision 1.34 2001/05/15 07:08:14 hp
74 * Tweak "notice" to reflect that both r8 r9 are used
75 *
76 * Revision 1.33 2001/05/15 06:40:05 hp
77 * Put bulk of code in .text.init, data in .data.init
78 *
79 * Revision 1.32 2001/05/15 06:18:56 hp
80 * Execute review comment: s/bcc/bhs/g; s/bcs/blo/g
81 *
82 * Revision 1.31 2001/05/15 06:08:40 hp
83 * Add sentence about autodetecting the bit31-MMU-bug
84 *
85 * Revision 1.30 2001/05/15 06:00:05 hp
86 * Update comment: LOW_MAP is not forced on xsim anymore.
87 *
88 * Revision 1.29 2001/04/18 12:51:59 orjanf
89 * * Reverted review change regarding the use of bcs/bcc.
90 * * Removed non-working LED-clearing code.
91 *
92 * Revision 1.28 2001/04/17 13:58:39 orjanf
93 * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
94 *
95 * Revision 1.27 2001/04/17 11:42:35 orjanf
96 * Changed according to review:
97 * * Added comment explaining memory map bug.
98 * * Changed bcs and bcc to blo and bhs, respectively.
99 * * Removed mentioning of Stallone and Olga boards.
100 *
101 * Revision 1.26 2001/04/06 12:31:07 jonashg
102 * Check for cramfs in flash before RAM instead of RAM before flash.
103 *
104 * Revision 1.25 2001/04/04 06:23:53 starvik
105 * Initialize DRAM if not already initialized
106 *
107 * Revision 1.24 2001/04/03 11:12:00 starvik
108 * Removed dram init (done by rescue or etrax100boot
109 * Corrected include
110 *
111 * Revision 1.23 2001/04/03 09:53:03 starvik
112 * Include hw_settings.S
113 *
114 * Revision 1.22 2001/03/26 14:23:26 bjornw
115 * Namechange of some config options
116 *
117 * Revision 1.21 2001/03/08 12:14:41 bjornw
118 * * Config name for ETRAX IDE was renamed
119 * * Removed G27 auto-setting when JULIETTE is chosen (need to make this
120 * a new config option later)
121 *
122 * Revision 1.20 2001/02/23 12:47:56 bjornw
123 * MMU regs during LOW_MAP updated to reflect a newer reality
124 *
125 * Revision 1.19 2001/02/19 11:12:07 bjornw
126 * Changed comment header format
127 *
128 * Revision 1.18 2001/02/15 07:25:38 starvik
129 * Added support for synchronous serial ports
130 *
131 * Revision 1.17 2001/02/08 15:53:13 starvik
132 * Last commit removed some important ifdefs
133 *
134 * Revision 1.16 2001/02/08 15:20:38 starvik
135 * Include dram_init.S as inline
136 *
137 * Revision 1.15 2001/01/29 18:12:01 bjornw
138 * Corrected some comments
139 *
140 * Revision 1.14 2001/01/29 13:11:29 starvik
141 * Include dram_init.S (with DRAM/SDRAM initialization)
142 *
143 * Revision 1.13 2001/01/23 14:54:57 markusl
144 * Updated for USB
145 * i.e. added r_gen_config settings
146 *
147 * Revision 1.12 2001/01/19 16:16:29 perf
148 * Added temporary mapping of 0x0c->0x0c to avoid flash loading confusion.
149 * Renamed serial options from ETRAX100 to ETRAX.
150 *
151 * Revision 1.11 2001/01/16 16:31:38 bjornw
152 * * Changed name and semantics of running_from_flash to romfs_in_flash,
153 * set by head.S to indicate to setup.c whether there is a cramfs image
154 * after the kernels BSS or not. Should work for all three boot-cases
155 * (DRAM with cramfs in DRAM, DRAM with cramfs in flash (compressed boot),
156 * and flash with cramfs in flash)
157 *
158 * Revision 1.10 2001/01/16 14:12:21 bjornw
159 * * Check for cramfs start passed in r9 from the decompressor, if all other
160 * cramfs options fail (if we boot from DRAM but don't find a cramfs image
161 * after the kernel in DRAM, it is probably still in the flash)
162 * * Check magic in cramfs detection when booting from flash directly
163 *
164 * Revision 1.9 2001/01/15 17:17:02 bjornw
165 * * Corrected the code that detects the cramfs lengths
166 * * Added a comment saying that the above does not work due to other
167 * reasons..
168 *
169 * Revision 1.8 2001/01/15 16:27:51 jonashg
170 * Made boot after flashing work.
171 * * end destination is __vmlinux_end in RAM.
172 * * _romfs_start moved because of virtual memory.
173 *
174 * Revision 1.7 2000/11/21 13:55:29 bjornw
175 * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type
176 *
177 * Revision 1.6 2000/10/06 12:36:55 bjornw
178 * Forgot swapper_pg_dir when changing memory map..
179 *
180 * Revision 1.5 2000/10/04 16:49:30 bjornw
181 * * Fixed memory mapping in LX
182 * * Check for cramfs instead of romfs
183 *
184 */
186 #define ASSEMBLER_MACROS_ONLY
187 /* The IO_* macros use the ## token concatenation operator, so
188 -traditional must not be used when assembling this file. */
189 #include <asm/arch/sv_addr_ag.h>
191 #define CRAMFS_MAGIC 0x28cd3d45
192 #define RAM_INIT_MAGIC 0x56902387
193 #define COMMAND_LINE_MAGIC 0x87109563
195 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
196 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
198 ;; exported symbols
200 .globl etrax_irv
201 .globl romfs_start
202 .globl romfs_length
203 .globl romfs_in_flash
204 .globl swapper_pg_dir
206 .text
208 ;; This is the entry point of the kernel. We are in supervisor mode.
209 ;; 0x00000000 if Flash, 0x40004000 if DRAM
210 ;; since etrax actually starts at address 2 when booting from flash, we
211 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
212 ;;
213 ;; NOTICE! The registers r8 and r9 are used as parameters carrying
214 ;; information from the decompressor (if the kernel was compressed).
215 ;; They should not be used in the code below until read.
217 nop
218 di
220 ;; First setup the kseg_c mapping from where the kernel is linked
221 ;; to 0x40000000 (where the actual DRAM resides) otherwise
222 ;; we cannot do very much! See arch/cris/README.mm
223 ;;
224 ;; Notice that since we're potentially running at 0x00 or 0x40 right now,
225 ;; we will get a fault as soon as we enable the MMU if we dont
226 ;; temporarily map those segments linearily.
227 ;;
228 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
229 ;; slightly different. The bug is that you can't remap bit 31 of
230 ;; an address. Though we can check the version register for
231 ;; whether the bug is present, some constants would then have to
232 ;; be variables, so we don't. The drawback is that you can "only" map
233 ;; 1G per process with CONFIG_CRIS_LOW_MAP.
235 #ifdef CONFIG_CRIS_LOW_MAP
236 ; kseg mappings, temporary map of 0xc0->0x40
237 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
238 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
239 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
240 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
241 move.d $r0, [R_MMU_KBASE_HI]
243 ; temporary map of 0x40->0x40 and 0x60->0x40
244 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
245 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
246 move.d $r0, [R_MMU_KBASE_LO]
248 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
249 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
250 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
251 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
252 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
253 | IO_STATE (R_MMU_CONFIG, seg_f, page) \
254 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
255 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
256 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
257 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
258 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \
259 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
260 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
261 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
262 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \
263 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \
264 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
265 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
266 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
267 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
268 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
269 move.d $r0, [R_MMU_CONFIG]
270 #else
271 ; kseg mappings
272 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
273 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
274 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
275 move.d $r0, [R_MMU_KBASE_HI]
277 ; temporary map of 0x40->0x40 and 0x00->0x00
278 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
279 move.d $r0, [R_MMU_KBASE_LO]
281 ; mmu enable, segs f,e,c,b,4,0 segment mapped
282 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
283 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
284 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
285 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
286 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \
287 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
288 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
289 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
290 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
291 | IO_STATE (R_MMU_CONFIG, seg_a, page) \
292 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
293 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
294 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
295 | IO_STATE (R_MMU_CONFIG, seg_6, page) \
296 | IO_STATE (R_MMU_CONFIG, seg_5, page) \
297 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
298 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
299 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
300 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
301 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
302 move.d $r0, [R_MMU_CONFIG]
303 #endif
305 ;; Now we need to sort out the segments and their locations in RAM or
306 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
307 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
308 ;; But the linker has linked the kernel to expect this layout in
309 ;; DRAM memory:
310 ;; 1) kernel text, 2) kernel data, 3) kernel BSS
311 ;; (the location of the ROM filesystem is determined by the krom driver)
312 ;; If we boot this from Flash, we want to keep the ROM filesystem in
313 ;; the flash, we want to copy the text and need to copy the data to DRAM.
314 ;; But if we boot from DRAM, we need to move the ROMFS image
315 ;; from its position after kernel data, to after kernel BSS, BEFORE the
316 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
317 ;;
318 ;; In both cases, we start in un-cached mode, and need to jump into a
319 ;; cached PC after we're done fiddling around with the segments.
320 ;;
321 ;; arch/etrax100/etrax100.ld sets some symbols that define the start
322 ;; and end of each segment.
324 ;; Check if we start from DRAM or FLASH by testing PC
326 move.d $pc,$r0
327 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
328 cmp.d 0x10000,$r0 ; arbitrary... just something above this code
329 blo _inflash0
330 nop
332 jump _inram ; enter cached ram
334 ;; Jumpgate for branches.
335 _inflash0:
336 jump _inflash
338 ;; Put this in a suitable section where we can reclaim storage
339 ;; after init.
340 .section ".init.text", "ax"
341 _inflash:
342 #ifdef CONFIG_ETRAX_ETHERNET
343 ;; Start MII clock to make sure it is running when tranceiver is reset
344 move.d START_ETHERNET_CLOCK, $r0
345 move.d $r0, [R_NETWORK_GEN_CONFIG]
346 #endif
348 ;; Set up waitstates etc according to kernel configuration.
349 #ifndef CONFIG_SVINTO_SIM
350 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
351 move.d $r0, [R_WAITSTATES]
353 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
354 move.d $r0, [R_BUS_CONFIG]
355 #endif
357 ;; We need to initialze DRAM registers before we start using the DRAM
359 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
360 beq _dram_init_finished
361 nop
363 #include "../lib/dram_init.S"
365 _dram_init_finished:
366 ;; Copy text+data to DRAM
367 ;; This is fragile - the calculation of r4 as the image size depends
368 ;; on that the labels below actually are the first and last positions
369 ;; in the linker-script.
370 ;;
371 ;; Then the locating of the cramfs image depends on the aforementioned
372 ;; image being located in the flash at 0. This is most often not true,
373 ;; thus the following does not work (normally there is a rescue-block
374 ;; between the physical start of the flash and the flash-image start,
375 ;; and when run with compression, the kernel is actually unpacked to
376 ;; DRAM and we never get here in the first place :))
378 moveq 0, $r0 ; source
379 move.d text_start, $r1 ; destination
380 move.d __vmlinux_end, $r2 ; end destination
381 move.d $r2, $r4
382 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below
383 1: move.w [$r0+], $r3
384 move.w $r3, [$r1+]
385 cmp.d $r2, $r1
386 blo 1b
387 nop
389 ;; We keep the cramfs in the flash.
390 ;; There might be none, but that does not matter because
391 ;; we don't do anything than read some bytes here.
393 moveq 0, $r0
394 move.d $r0, [romfs_length] ; default if there is no cramfs
396 move.d [$r4], $r0 ; cramfs_super.magic
397 cmp.d CRAMFS_MAGIC, $r0
398 bne 1f
399 nop
400 move.d [$r4 + 4], $r0 ; cramfs_super.size
401 move.d $r0, [romfs_length]
402 #ifdef CONFIG_CRIS_LOW_MAP
403 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached)
404 #else
405 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
406 #endif
407 move.d $r4, [romfs_start]
408 1:
409 moveq 1, $r0
410 move.d $r0, [romfs_in_flash]
412 jump _start_it ; enter code, cached this time
414 _inram:
415 ;; Move the ROM fs to after BSS end. This assumes that the cramfs
416 ;; second longword contains the length of the cramfs
418 moveq 0, $r0
419 move.d $r0, [romfs_length] ; default if there is no cramfs
421 ;; The kernel could have been unpacked to DRAM by the loader, but
422 ;; the cramfs image could still be in the Flash directly after the
423 ;; compressed kernel image. The loader passes the address of the
424 ;; byte succeeding the last compressed byte in the flash in the
425 ;; register r9 when starting the kernel. Check if r9 points to a
426 ;; decent cramfs image!
427 ;; (Notice that if this is not booted from the loader, r9 will be
428 ;; garbage but we do sanity checks on it, the chance that it points
429 ;; to a cramfs magic is small.. )
431 cmp.d 0x0ffffff8, $r9
432 bhs _no_romfs_in_flash ; r9 points outside the flash area
433 nop
434 move.d [$r9], $r0 ; cramfs_super.magic
435 cmp.d CRAMFS_MAGIC, $r0
436 bne _no_romfs_in_flash
437 nop
438 move.d [$r9+4], $r0 ; cramfs_super.length
439 move.d $r0, [romfs_length]
440 #ifdef CONFIG_CRIS_LOW_MAP
441 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached)
442 #else
443 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached)
444 #endif
445 move.d $r9, [romfs_start]
447 moveq 1, $r0
448 move.d $r0, [romfs_in_flash]
450 jump _start_it ; enter code, cached this time
452 _no_romfs_in_flash:
454 ;; Check if there is a cramfs (magic value).
455 ;; Notice that we check for cramfs magic value - which is
456 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
457 ;; not need this mechanism anyway)
459 move.d __vmlinux_end, $r0; the image will be after the vmlinux end address
460 move.d [$r0], $r1 ; cramfs assumes same endian on host/target
461 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
462 bne 2f
463 nop
465 ;; Ok. What is its size ?
467 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
469 ;; We want to copy it to the end of the BSS
471 move.d _end, $r1
473 ;; Remember values so cramfs and setup can find this info
475 move.d $r1, [romfs_start] ; new romfs location
476 move.d $r2, [romfs_length]
478 ;; We need to copy it backwards, since they can be overlapping
480 add.d $r2, $r0
481 add.d $r2, $r1
483 ;; Go ahead. Make my loop.
485 lsrq 1, $r2 ; size is in bytes, we copy words
487 1: move.w [$r0=$r0-2],$r3
488 move.w $r3,[$r1=$r1-2]
489 subq 1, $r2
490 bne 1b
491 nop
493 2:
494 ;; Dont worry that the BSS is tainted. It will be cleared later.
496 moveq 0, $r0
497 move.d $r0, [romfs_in_flash]
499 jump _start_it ; better skip the additional cramfs check below
501 _start_it:
503 ;; Check if kernel command line is supplied
504 cmp.d COMMAND_LINE_MAGIC, $r10
505 bne no_command_line
506 nop
508 move.d 256, $r13
509 move.d cris_command_line, $r10
510 or.d 0x80000000, $r11 ; Make it virtual
511 1:
512 move.b [$r11+], $r12
513 move.b $r12, [$r10+]
514 subq 1, $r13
515 bne 1b
516 nop
518 no_command_line:
520 ;; the kernel stack is overlayed with the task structure for each
521 ;; task. thus the initial kernel stack is in the same page as the
522 ;; init_task (but starts in the top of the page, size 8192)
523 move.d init_thread_union + 8192, $sp
524 move.d ibr_start,$r0 ; this symbol is set by the linker script
525 move $r0,$ibr
526 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
528 ;; Clear BSS region, from _bss_start to _end
530 move.d __bss_start, $r0
531 move.d _end, $r1
532 1: clear.d [$r0+]
533 cmp.d $r1, $r0
534 blo 1b
535 nop
537 #ifdef CONFIG_BLK_DEV_ETRAXIDE
538 ;; disable ATA before enabling it in genconfig below
539 moveq 0,$r0
540 move.d $r0,[R_ATA_CTRL_DATA]
541 move.d $r0,[R_ATA_TRANSFER_CNT]
542 move.d $r0,[R_ATA_CONFIG]
543 #if 0
544 move.d R_PORT_G_DATA, $r1
545 move.d $r0, [$r1]; assert ATA bus-reset
546 nop
547 nop
548 nop
549 nop
550 nop
551 nop
552 move.d 0x08000000,$r0
553 move.d $r0,[$r1]
554 #endif
555 #endif
557 #ifdef CONFIG_JULIETTE
558 ;; configure external DMA channel 0 before enabling it in genconfig
560 moveq 0,$r0
561 move.d $r0,[R_EXT_DMA_0_ADDR]
562 ; cnt enable, word size, output, stop, size 0
563 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \
564 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \
565 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \
566 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \
567 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \
568 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \
569 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \
570 | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0
571 move.d $r0,[R_EXT_DMA_0_CMD]
573 ;; reset dma4 and wait for completion
575 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
576 move.b $r0,[R_DMA_CH4_CMD]
577 1: move.b [R_DMA_CH4_CMD],$r0
578 and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0
579 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
580 beq 1b
581 nop
583 ;; reset dma5 and wait for completion
585 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
586 move.b $r0,[R_DMA_CH5_CMD]
587 1: move.b [R_DMA_CH5_CMD],$r0
588 and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0
589 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
590 beq 1b
591 nop
592 #endif
594 ;; Etrax product HW genconfig setup
596 moveq 0,$r0
598 ;; Init interfaces (disable them).
599 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
600 | IO_STATE (R_GEN_CONFIG, ata, disable) \
601 | IO_STATE (R_GEN_CONFIG, par0, disable) \
602 | IO_STATE (R_GEN_CONFIG, ser2, disable) \
603 | IO_STATE (R_GEN_CONFIG, mio, disable) \
604 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
605 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
606 | IO_STATE (R_GEN_CONFIG, par1, disable) \
607 | IO_STATE (R_GEN_CONFIG, ser3, disable) \
608 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
609 | IO_STATE (R_GEN_CONFIG, usb1, disable) \
610 | IO_STATE (R_GEN_CONFIG, usb2, disable) \
611 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
613 ;; Init DMA channel muxing (set to unused clients).
614 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
615 | IO_STATE (R_GEN_CONFIG, dma3, ata) \
616 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
617 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
618 | IO_STATE (R_GEN_CONFIG, dma6, unused) \
619 | IO_STATE (R_GEN_CONFIG, dma7, unused) \
620 | IO_STATE (R_GEN_CONFIG, dma8, usb) \
621 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
624 #if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT)
625 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0
626 #endif
628 #if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT)
629 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
630 #endif
631 #if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT)
632 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0
633 #endif
635 #if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT)
636 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0
637 #endif
639 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
641 #ifndef CONFIG_SVINTO_SIM
642 move.d $r0,[R_GEN_CONFIG]
644 #if 0
645 moveq 4,$r0
646 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
647 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
648 1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
649 and.b 7,$r0
650 cmp.b 4,$r0
651 beq 1b
652 nop
653 1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
654 and.b 7,$r0
655 cmp.b 4,$r0
656 beq 1b
657 nop
658 #endif
660 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
661 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
662 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
663 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
664 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
665 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
666 beq 1b
667 nop
668 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
669 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
670 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
671 beq 1b
672 nop
674 ;; setup port PA and PB default initial directions and data
675 ;; including their shadow registers
677 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
678 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
679 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
680 #endif
681 move.b $r0,[port_pa_dir_shadow]
682 move.b $r0,[R_PORT_PA_DIR]
683 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
684 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
685 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
686 and.b ~(1 << 7),$r0
687 #else
688 or.b (1 << 7),$r0
689 #endif
690 #endif
691 move.b $r0,[port_pa_data_shadow]
692 move.b $r0,[R_PORT_PA_DATA]
694 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
695 move.b $r0,[port_pb_config_shadow]
696 move.b $r0,[R_PORT_PB_CONFIG]
697 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
698 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
699 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
700 #endif
701 move.b $r0,[port_pb_dir_shadow]
702 move.b $r0,[R_PORT_PB_DIR]
703 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
704 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
705 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
706 and.b ~(1 << 5),$r0
707 #else
708 or.b (1 << 5),$r0
709 #endif
710 #endif
711 move.b $r0,[port_pb_data_shadow]
712 move.b $r0,[R_PORT_PB_DATA]
714 moveq 0, $r0
715 move.d $r0,[port_pb_i2c_shadow]
716 move.d $r0, [R_PORT_PB_I2C]
718 moveq 0,$r0
719 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10)
720 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
721 and.d ~(1 << 10),$r0
722 #else
723 or.d (1 << 10),$r0
724 #endif
725 #endif
726 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11)
727 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
728 and.d ~(1 << 11),$r0
729 #else
730 or.d (1 << 11),$r0
731 #endif
732 #endif
733 move.d $r0,[port_g_data_shadow]
734 move.d $r0,[R_PORT_G_DATA]
736 ;; setup the serial port 0 at 115200 baud for debug purposes
738 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
739 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
740 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
741 move.d $r0,[R_SERIAL0_XOFF]
743 ; 115.2kbaud for both transmit and receive
744 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
745 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
746 move.b $r0,[R_SERIAL0_BAUD]
748 ; Set up and enable the serial0 receiver.
749 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
750 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
751 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
752 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
753 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
754 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
755 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
756 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
757 move.b $r0,[R_SERIAL0_REC_CTRL]
759 ; Set up and enable the serial0 transmitter.
760 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
761 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
762 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
763 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
764 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
765 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
766 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
767 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
768 move.b $r0,[R_SERIAL0_TR_CTRL]
770 ;; setup the serial port 1 at 115200 baud for debug purposes
772 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
773 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
774 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
775 move.d $r0,[R_SERIAL1_XOFF]
777 ; 115.2kbaud for both transmit and receive
778 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
779 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
780 move.b $r0,[R_SERIAL1_BAUD]
782 ; Set up and enable the serial1 receiver.
783 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
784 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
785 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
786 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
787 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
788 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
789 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
790 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
791 move.b $r0,[R_SERIAL1_REC_CTRL]
793 ; Set up and enable the serial1 transmitter.
794 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
795 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
796 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
797 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
798 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
799 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
800 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
801 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
802 move.b $r0,[R_SERIAL1_TR_CTRL]
805 #ifdef CONFIG_ETRAX_SERIAL_PORT3
806 ;; setup the serial port 3 at 115200 baud for debug purposes
808 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
809 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
810 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
811 move.d $r0,[R_SERIAL3_XOFF]
813 ; 115.2kbaud for both transmit and receive
814 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
815 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
816 move.b $r0,[R_SERIAL3_BAUD]
818 ; Set up and enable the serial3 receiver.
819 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
820 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
821 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
822 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
823 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
824 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
825 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
826 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
827 move.b $r0,[R_SERIAL3_REC_CTRL]
829 ; Set up and enable the serial3 transmitter.
830 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
831 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
832 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
833 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
834 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
835 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
836 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
837 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
838 move.b $r0,[R_SERIAL3_TR_CTRL]
839 #endif
841 #endif /* CONFIG_SVINTO_SIM */
843 jump start_kernel ; jump into the C-function start_kernel in init/main.c
845 .data
846 etrax_irv:
847 .dword 0
848 romfs_start:
849 .dword 0
850 romfs_length:
851 .dword 0
852 romfs_in_flash:
853 .dword 0
855 ;; put some special pages at the beginning of the kernel aligned
856 ;; to page boundaries - the kernel cannot start until after this
858 #ifdef CONFIG_CRIS_LOW_MAP
859 swapper_pg_dir = 0x60002000
860 #else
861 swapper_pg_dir = 0xc0002000
862 #endif
864 .section ".init.data", "aw"
865 #include "../lib/hw_settings.S"