ia64/linux-2.6.18-xen.hg

view sound/i2c/cs8427.c @ 782:9ab1c319531f

merge with linux-2.6.18-xen.hg
author Isaku Yamahata <yamahata@valinux.co.jp>
date Wed Jan 28 13:07:23 2009 +0900 (2009-01-28)
parents 831230e53067
children
line source
1 /*
2 * Routines for control of the CS8427 via i2c bus
3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
4 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
23 #include <sound/driver.h>
24 #include <linux/slab.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <sound/core.h>
28 #include <sound/control.h>
29 #include <sound/pcm.h>
30 #include <sound/cs8427.h>
31 #include <sound/asoundef.h>
33 static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
35 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
36 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
37 MODULE_LICENSE("GPL");
39 #define CS8427_ADDR (0x20>>1) /* fixed address */
41 struct cs8427_stream {
42 struct snd_pcm_substream *substream;
43 char hw_status[24]; /* hardware status */
44 char def_status[24]; /* default status */
45 char pcm_status[24]; /* PCM private status */
46 char hw_udata[32];
47 struct snd_kcontrol *pcm_ctl;
48 };
50 struct cs8427 {
51 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
52 unsigned int rate;
53 unsigned int reset_timeout;
54 struct cs8427_stream playback;
55 struct cs8427_stream capture;
56 };
58 static unsigned char swapbits(unsigned char val)
59 {
60 int bit;
61 unsigned char res = 0;
62 for (bit = 0; bit < 8; bit++) {
63 res <<= 1;
64 res |= val & 1;
65 val >>= 1;
66 }
67 return res;
68 }
70 int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
71 unsigned char val)
72 {
73 int err;
74 unsigned char buf[2];
76 buf[0] = reg & 0x7f;
77 buf[1] = val;
78 if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
79 snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
80 "to CS8427 (%i)\n", buf[0], buf[1], err);
81 return err < 0 ? err : -EIO;
82 }
83 return 0;
84 }
86 EXPORT_SYMBOL(snd_cs8427_reg_write);
88 static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
89 {
90 int err;
91 unsigned char buf;
93 if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
94 snd_printk(KERN_ERR "unable to send register 0x%x byte "
95 "to CS8427\n", reg);
96 return err < 0 ? err : -EIO;
97 }
98 if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
99 snd_printk(KERN_ERR "unable to read register 0x%x byte "
100 "from CS8427\n", reg);
101 return err < 0 ? err : -EIO;
102 }
103 return buf;
104 }
106 static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
107 {
108 struct cs8427 *chip = device->private_data;
109 int err;
111 udata = udata ? CS8427_BSEL : 0;
112 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
113 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
114 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
115 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
116 chip->regmap[CS8427_REG_CSDATABUF]);
117 if (err < 0)
118 return err;
119 }
120 return 0;
121 }
123 static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
124 int udata,
125 unsigned char *ndata,
126 int count)
127 {
128 struct cs8427 *chip = device->private_data;
129 char *hw_data = udata ?
130 chip->playback.hw_udata : chip->playback.hw_status;
131 char data[32];
132 int err, idx;
134 if (!memcmp(hw_data, ndata, count))
135 return 0;
136 if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
137 return err;
138 memcpy(hw_data, ndata, count);
139 if (udata) {
140 memset(data, 0, sizeof(data));
141 if (memcmp(hw_data, data, count) == 0) {
142 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
143 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
144 CS8427_EFTUI;
145 err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
146 chip->regmap[CS8427_REG_UDATABUF]);
147 return err < 0 ? err : 0;
148 }
149 }
150 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
151 for (idx = 0; idx < count; idx++)
152 data[idx + 1] = swapbits(ndata[idx]);
153 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
154 return -EIO;
155 return 1;
156 }
158 static void snd_cs8427_free(struct snd_i2c_device *device)
159 {
160 kfree(device->private_data);
161 }
163 int snd_cs8427_create(struct snd_i2c_bus *bus,
164 unsigned char addr,
165 unsigned int reset_timeout,
166 struct snd_i2c_device **r_cs8427)
167 {
168 static unsigned char initvals1[] = {
169 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
170 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
171 TCBL=output */
172 CS8427_SWCLK | CS8427_TCBLDIR,
173 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
174 normal stereo operation */
175 0x00,
176 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
177 Rx=>serial */
178 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
179 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
180 output time base = OMCK, input time base = recovered input clock,
181 recovered input clock source is ILRCK changed to AES3INPUT
182 (workaround, see snd_cs8427_reset) */
183 CS8427_RXDILRCK,
184 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
185 24-bit, 64*Fsi */
186 CS8427_SIDEL | CS8427_SILRPOL,
187 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
188 = I2S, 24-bit, 64*Fsi */
189 CS8427_SODEL | CS8427_SOLRPOL,
190 };
191 static unsigned char initvals2[] = {
192 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
193 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
194 biphase, parity status bits */
195 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
196 0xff, /* set everything */
197 /* CS8427_REG_CSDATABUF:
198 Registers 32-55 window to CS buffer
199 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
200 Inhibit D->E transfers (all) of CS data.
201 Allow E->F transfer of CS data.
202 One byte mode; both A/B channels get same written CB data.
203 A channel info is output to chip's EMPH* pin. */
204 CS8427_CBMR | CS8427_DETCI,
205 /* CS8427_REG_UDATABUF:
206 Use internal buffer to transmit User (U) data.
207 Chip's U pin is an output.
208 Transmit all O's for user data.
209 Inhibit D->E transfers.
210 Inhibit E->F transfers. */
211 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
212 };
213 int err;
214 struct cs8427 *chip;
215 struct snd_i2c_device *device;
216 unsigned char buf[24];
218 if ((err = snd_i2c_device_create(bus, "CS8427",
219 CS8427_ADDR | (addr & 7),
220 &device)) < 0)
221 return err;
222 chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
223 if (chip == NULL) {
224 snd_i2c_device_free(device);
225 return -ENOMEM;
226 }
227 device->private_free = snd_cs8427_free;
229 snd_i2c_lock(bus);
230 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
231 if (err != CS8427_VER8427A) {
232 snd_i2c_unlock(bus);
233 snd_printk(KERN_ERR "unable to find CS8427 signature "
234 "(expected 0x%x, read 0x%x),\n",
235 CS8427_VER8427A, err);
236 snd_printk(KERN_ERR " initialization is not completed\n");
237 return -EFAULT;
238 }
239 /* turn off run bit while making changes to configuration */
240 err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
241 if (err < 0)
242 goto __fail;
243 /* send initial values */
244 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
245 if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
246 err = err < 0 ? err : -EIO;
247 goto __fail;
248 }
249 /* Turn off CS8427 interrupt stuff that is not used in hardware */
250 memset(buf, 0, 7);
251 /* from address 9 to 15 */
252 buf[0] = 9; /* register */
253 if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
254 goto __fail;
255 /* send transfer initialization sequence */
256 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
257 if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
258 err = err < 0 ? err : -EIO;
259 goto __fail;
260 }
261 /* write default channel status bytes */
262 buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0));
263 buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8));
264 buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16));
265 buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24));
266 memset(buf + 4, 0, 24 - 4);
267 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
268 goto __fail;
269 memcpy(chip->playback.def_status, buf, 24);
270 memcpy(chip->playback.pcm_status, buf, 24);
271 snd_i2c_unlock(bus);
273 /* turn on run bit and rock'n'roll */
274 if (reset_timeout < 1)
275 reset_timeout = 1;
276 chip->reset_timeout = reset_timeout;
277 snd_cs8427_reset(device);
279 #if 0 // it's nice for read tests
280 {
281 char buf[128];
282 int xx;
283 buf[0] = 0x81;
284 snd_i2c_sendbytes(device, buf, 1);
285 snd_i2c_readbytes(device, buf, 127);
286 for (xx = 0; xx < 127; xx++)
287 printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
288 }
289 #endif
291 if (r_cs8427)
292 *r_cs8427 = device;
293 return 0;
295 __fail:
296 snd_i2c_unlock(bus);
297 snd_i2c_device_free(device);
298 return err < 0 ? err : -EIO;
299 }
301 EXPORT_SYMBOL(snd_cs8427_create);
303 /*
304 * Reset the chip using run bit, also lock PLL using ILRCK and
305 * put back AES3INPUT. This workaround is described in latest
306 * CS8427 datasheet, otherwise TXDSERIAL will not work.
307 */
308 static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
309 {
310 struct cs8427 *chip;
311 unsigned long end_time;
312 int data, aes3input = 0;
314 snd_assert(cs8427, return);
315 chip = cs8427->private_data;
316 snd_i2c_lock(cs8427->bus);
317 if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
318 CS8427_RXDAES3INPUT) /* AES3 bit is set */
319 aes3input = 1;
320 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
321 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
322 chip->regmap[CS8427_REG_CLOCKSOURCE]);
323 udelay(200);
324 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
325 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
326 chip->regmap[CS8427_REG_CLOCKSOURCE]);
327 udelay(200);
328 snd_i2c_unlock(cs8427->bus);
329 end_time = jiffies + chip->reset_timeout;
330 while (time_after_eq(end_time, jiffies)) {
331 snd_i2c_lock(cs8427->bus);
332 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
333 snd_i2c_unlock(cs8427->bus);
334 if (!(data & CS8427_UNLOCK))
335 break;
336 schedule_timeout_uninterruptible(1);
337 }
338 snd_i2c_lock(cs8427->bus);
339 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
340 if (aes3input)
341 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
342 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
343 chip->regmap[CS8427_REG_CLOCKSOURCE]);
344 snd_i2c_unlock(cs8427->bus);
345 }
347 static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
348 struct snd_ctl_elem_info *uinfo)
349 {
350 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
351 uinfo->count = 1;
352 uinfo->value.integer.min = 0;
353 uinfo->value.integer.max = 255;
354 return 0;
355 }
357 static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
358 struct snd_ctl_elem_value *ucontrol)
359 {
360 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
361 int data;
363 snd_i2c_lock(device->bus);
364 data = snd_cs8427_reg_read(device, kcontrol->private_value);
365 snd_i2c_unlock(device->bus);
366 if (data < 0)
367 return data;
368 ucontrol->value.integer.value[0] = data;
369 return 0;
370 }
372 static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
373 struct snd_ctl_elem_info *uinfo)
374 {
375 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
376 uinfo->count = 10;
377 return 0;
378 }
380 static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
381 struct snd_ctl_elem_value *ucontrol)
382 {
383 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
384 unsigned char reg = CS8427_REG_QSUBCODE;
385 int err;
387 snd_i2c_lock(device->bus);
388 if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
389 snd_printk(KERN_ERR "unable to send register 0x%x byte "
390 "to CS8427\n", reg);
391 snd_i2c_unlock(device->bus);
392 return err < 0 ? err : -EIO;
393 }
394 err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
395 if (err != 10) {
396 snd_printk(KERN_ERR "unable to read Q-subcode bytes "
397 "from CS8427\n");
398 snd_i2c_unlock(device->bus);
399 return err < 0 ? err : -EIO;
400 }
401 snd_i2c_unlock(device->bus);
402 return 0;
403 }
405 static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
406 struct snd_ctl_elem_info *uinfo)
407 {
408 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
409 uinfo->count = 1;
410 return 0;
411 }
413 static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
414 struct snd_ctl_elem_value *ucontrol)
415 {
416 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
417 struct cs8427 *chip = device->private_data;
419 snd_i2c_lock(device->bus);
420 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
421 snd_i2c_unlock(device->bus);
422 return 0;
423 }
425 static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
426 struct snd_ctl_elem_value *ucontrol)
427 {
428 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
429 struct cs8427 *chip = device->private_data;
430 unsigned char *status = kcontrol->private_value ?
431 chip->playback.pcm_status : chip->playback.def_status;
432 struct snd_pcm_runtime *runtime = chip->playback.substream ?
433 chip->playback.substream->runtime : NULL;
434 int err, change;
436 snd_i2c_lock(device->bus);
437 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
438 memcpy(status, ucontrol->value.iec958.status, 24);
439 if (change && (kcontrol->private_value ?
440 runtime != NULL : runtime == NULL)) {
441 err = snd_cs8427_send_corudata(device, 0, status, 24);
442 if (err < 0)
443 change = err;
444 }
445 snd_i2c_unlock(device->bus);
446 return change;
447 }
449 static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
450 struct snd_ctl_elem_info *uinfo)
451 {
452 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
453 uinfo->count = 1;
454 return 0;
455 }
457 static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
458 struct snd_ctl_elem_value *ucontrol)
459 {
460 memset(ucontrol->value.iec958.status, 0xff, 24);
461 return 0;
462 }
464 static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
465 {
466 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
467 .info = snd_cs8427_in_status_info,
468 .name = "IEC958 CS8427 Input Status",
469 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
470 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
471 .get = snd_cs8427_in_status_get,
472 .private_value = 15,
473 },
474 {
475 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
476 .info = snd_cs8427_in_status_info,
477 .name = "IEC958 CS8427 Error Status",
478 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
479 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
480 .get = snd_cs8427_in_status_get,
481 .private_value = 16,
482 },
483 {
484 .access = SNDRV_CTL_ELEM_ACCESS_READ,
485 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
486 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
487 .info = snd_cs8427_spdif_mask_info,
488 .get = snd_cs8427_spdif_mask_get,
489 },
490 {
491 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
492 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
493 .info = snd_cs8427_spdif_info,
494 .get = snd_cs8427_spdif_get,
495 .put = snd_cs8427_spdif_put,
496 .private_value = 0
497 },
498 {
499 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
500 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
501 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
502 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
503 .info = snd_cs8427_spdif_info,
504 .get = snd_cs8427_spdif_get,
505 .put = snd_cs8427_spdif_put,
506 .private_value = 1
507 },
508 {
509 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
510 .info = snd_cs8427_qsubcode_info,
511 .name = "IEC958 Q-subcode Capture Default",
512 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
513 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
514 .get = snd_cs8427_qsubcode_get
515 }};
517 int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
518 struct snd_pcm_substream *play_substream,
519 struct snd_pcm_substream *cap_substream)
520 {
521 struct cs8427 *chip = cs8427->private_data;
522 struct snd_kcontrol *kctl;
523 unsigned int idx;
524 int err;
526 snd_assert(play_substream && cap_substream, return -EINVAL);
527 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
528 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
529 if (kctl == NULL)
530 return -ENOMEM;
531 kctl->id.device = play_substream->pcm->device;
532 kctl->id.subdevice = play_substream->number;
533 err = snd_ctl_add(cs8427->bus->card, kctl);
534 if (err < 0)
535 return err;
536 if (! strcmp(kctl->id.name,
537 SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
538 chip->playback.pcm_ctl = kctl;
539 }
541 chip->playback.substream = play_substream;
542 chip->capture.substream = cap_substream;
543 snd_assert(chip->playback.pcm_ctl, return -EIO);
544 return 0;
545 }
547 EXPORT_SYMBOL(snd_cs8427_iec958_build);
549 int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
550 {
551 struct cs8427 *chip;
553 snd_assert(cs8427, return -ENXIO);
554 chip = cs8427->private_data;
555 if (active)
556 memcpy(chip->playback.pcm_status,
557 chip->playback.def_status, 24);
558 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
559 snd_ctl_notify(cs8427->bus->card,
560 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
561 &chip->playback.pcm_ctl->id);
562 return 0;
563 }
565 EXPORT_SYMBOL(snd_cs8427_iec958_active);
567 int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
568 {
569 struct cs8427 *chip;
570 char *status;
571 int err, reset;
573 snd_assert(cs8427, return -ENXIO);
574 chip = cs8427->private_data;
575 status = chip->playback.pcm_status;
576 snd_i2c_lock(cs8427->bus);
577 if (status[0] & IEC958_AES0_PROFESSIONAL) {
578 status[0] &= ~IEC958_AES0_PRO_FS;
579 switch (rate) {
580 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
581 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
582 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
583 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
584 }
585 } else {
586 status[3] &= ~IEC958_AES3_CON_FS;
587 switch (rate) {
588 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
589 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
590 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
591 }
592 }
593 err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
594 if (err > 0)
595 snd_ctl_notify(cs8427->bus->card,
596 SNDRV_CTL_EVENT_MASK_VALUE,
597 &chip->playback.pcm_ctl->id);
598 reset = chip->rate != rate;
599 chip->rate = rate;
600 snd_i2c_unlock(cs8427->bus);
601 if (reset)
602 snd_cs8427_reset(cs8427);
603 return err < 0 ? err : 0;
604 }
606 EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
608 static int __init alsa_cs8427_module_init(void)
609 {
610 return 0;
611 }
613 static void __exit alsa_cs8427_module_exit(void)
614 {
615 }
617 module_init(alsa_cs8427_module_init)
618 module_exit(alsa_cs8427_module_exit)