ia64/linux-2.6.18-xen.hg

view include/asm-arm/byteorder.h @ 782:9ab1c319531f

merge with linux-2.6.18-xen.hg
author Isaku Yamahata <yamahata@valinux.co.jp>
date Wed Jan 28 13:07:23 2009 +0900 (2009-01-28)
parents 831230e53067
children
line source
1 /*
2 * linux/include/asm-arm/byteorder.h
3 *
4 * ARM Endian-ness. In little endian mode, the data bus is connected such
5 * that byte accesses appear as:
6 * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
7 * and word accesses (data or instruction) appear as:
8 * d0...d31
9 *
10 * When in big endian mode, byte accesses appear as:
11 * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
12 * and word accesses (data or instruction) appear as:
13 * d0...d31
14 */
15 #ifndef __ASM_ARM_BYTEORDER_H
16 #define __ASM_ARM_BYTEORDER_H
18 #include <linux/compiler.h>
19 #include <asm/types.h>
21 static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
22 {
23 __u32 t;
25 #ifndef __thumb__
26 if (!__builtin_constant_p(x)) {
27 /*
28 * The compiler needs a bit of a hint here to always do the
29 * right thing and not screw it up to different degrees
30 * depending on the gcc version.
31 */
32 asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
33 } else
34 #endif
35 t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
37 x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
38 t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
39 x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
41 return x;
42 }
44 #define __arch__swab32(x) ___arch__swab32(x)
46 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
47 # define __BYTEORDER_HAS_U64__
48 # define __SWAB_64_THRU_32__
49 #endif
51 #ifdef __ARMEB__
52 #include <linux/byteorder/big_endian.h>
53 #else
54 #include <linux/byteorder/little_endian.h>
55 #endif
57 #endif