ia64/linux-2.6.18-xen.hg

view include/asm-arm/assembler.h @ 782:9ab1c319531f

merge with linux-2.6.18-xen.hg
author Isaku Yamahata <yamahata@valinux.co.jp>
date Wed Jan 28 13:07:23 2009 +0900 (2009-01-28)
parents 831230e53067
children
line source
1 /*
2 * linux/include/asm-arm/assembler.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This file contains arm architecture specific defines
11 * for the different processors.
12 *
13 * Do not include any C declarations in this file - it is included by
14 * assembler source.
15 */
16 #ifndef __ASSEMBLY__
17 #error "Only include this from assembly code"
18 #endif
20 #include <asm/ptrace.h>
22 /*
23 * Endian independent macros for shifting bytes within registers.
24 */
25 #ifndef __ARMEB__
26 #define pull lsr
27 #define push lsl
28 #define get_byte_0 lsl #0
29 #define get_byte_1 lsr #8
30 #define get_byte_2 lsr #16
31 #define get_byte_3 lsr #24
32 #define put_byte_0 lsl #0
33 #define put_byte_1 lsl #8
34 #define put_byte_2 lsl #16
35 #define put_byte_3 lsl #24
36 #else
37 #define pull lsl
38 #define push lsr
39 #define get_byte_0 lsr #24
40 #define get_byte_1 lsr #16
41 #define get_byte_2 lsr #8
42 #define get_byte_3 lsl #0
43 #define put_byte_0 lsl #24
44 #define put_byte_1 lsl #16
45 #define put_byte_2 lsl #8
46 #define put_byte_3 lsl #0
47 #endif
49 /*
50 * Data preload for architectures that support it
51 */
52 #if __LINUX_ARM_ARCH__ >= 5
53 #define PLD(code...) code
54 #else
55 #define PLD(code...)
56 #endif
58 /*
59 * Enable and disable interrupts
60 */
61 #if __LINUX_ARM_ARCH__ >= 6
62 .macro disable_irq
63 cpsid i
64 .endm
66 .macro enable_irq
67 cpsie i
68 .endm
69 #else
70 .macro disable_irq
71 msr cpsr_c, #PSR_I_BIT | SVC_MODE
72 .endm
74 .macro enable_irq
75 msr cpsr_c, #SVC_MODE
76 .endm
77 #endif
79 /*
80 * Save the current IRQ state and disable IRQs. Note that this macro
81 * assumes FIQs are enabled, and that the processor is in SVC mode.
82 */
83 .macro save_and_disable_irqs, oldcpsr
84 mrs \oldcpsr, cpsr
85 disable_irq
86 .endm
88 /*
89 * Restore interrupt state previously stored in a register. We don't
90 * guarantee that this will preserve the flags.
91 */
92 .macro restore_irqs, oldcpsr
93 msr cpsr_c, \oldcpsr
94 .endm
96 #define USER(x...) \
97 9999: x; \
98 .section __ex_table,"a"; \
99 .align 3; \
100 .long 9999b,9001f; \
101 .previous