ia64/linux-2.6.18-xen.hg

view include/asm-arm/arch-at91rm9200/system.h @ 782:9ab1c319531f

merge with linux-2.6.18-xen.hg
author Isaku Yamahata <yamahata@valinux.co.jp>
date Wed Jan 28 13:07:23 2009 +0900 (2009-01-28)
parents 831230e53067
children
line source
1 /*
2 * include/asm-arm/arch-at91rm9200/system.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
21 #ifndef __ASM_ARCH_SYSTEM_H
22 #define __ASM_ARCH_SYSTEM_H
24 #include <asm/hardware.h>
26 static inline void arch_idle(void)
27 {
28 /*
29 * Disable the processor clock. The processor will be automatically
30 * re-enabled by an interrupt or by a reset.
31 */
32 // at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
34 /*
35 * Set the processor (CP15) into 'Wait for Interrupt' mode.
36 * Unlike disabling the processor clock via the PMC (above)
37 * this allows the processor to be woken via JTAG.
38 */
39 cpu_do_idle();
40 }
42 static inline void arch_reset(char mode)
43 {
44 /*
45 * Perform a hardware reset with the use of the Watchdog timer.
46 */
47 at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
48 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
49 }
51 #define ARCH_ID_AT91RM9200 0x09200080
52 #define ARCH_ID_AT91SAM9261 0x019000a0
54 static inline unsigned long arch_identify(void)
55 {
56 return at91_sys_read(AT91_DBGU_CIDR) & (AT91_CIDR_EPROC | AT91_CIDR_ARCH);
57 }
59 #endif