ia64/linux-2.6.18-xen.hg

view include/asm-arm/arch-at91rm9200/at91rm9200_udp.h @ 782:9ab1c319531f

merge with linux-2.6.18-xen.hg
author Isaku Yamahata <yamahata@valinux.co.jp>
date Wed Jan 28 13:07:23 2009 +0900 (2009-01-28)
parents 831230e53067
children
line source
1 /*
2 * include/asm-arm/arch-at91rm9200/at91rm9200_udp.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * USB Device Port (UDP) registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
16 #ifndef AT91RM9200_UDP_H
17 #define AT91RM9200_UDP_H
19 #define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */
20 #define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */
21 #define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */
22 #define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */
24 #define AT91_UDP_GLB_STAT 0x04 /* Global State Register */
25 #define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */
26 #define AT91_UDP_CONFG (1 << 1) /* Configured */
27 #define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */
28 #define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */
29 #define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */
31 #define AT91_UDP_FADDR 0x08 /* Function Address Register */
32 #define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */
33 #define AT91_UDP_FEN (1 << 8) /* Function Enable */
35 #define AT91_UDP_IER 0x10 /* Interrupt Enable Register */
36 #define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */
37 #define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */
39 #define AT91_UDP_ISR 0x1c /* Interrupt Status Register */
40 #define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */
41 #define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */
42 #define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */
43 #define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */
44 #define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */
45 #define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */
46 #define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */
48 #define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */
49 #define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */
51 #define AT91_UDP_CSR(n) (0x30 + ((n) * 4)) /* Endpoint Control/Status Registers 0-7 */
52 #define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */
53 #define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */
54 #define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */
55 #define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */
56 #define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */
57 #define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */
58 #define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */
59 #define AT91_UDP_DIR (1 << 7) /* Transfer Direction */
60 #define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */
61 #define AT91_UDP_EPTYPE_CTRL (0 << 8)
62 #define AT91_UDP_EPTYPE_ISO_OUT (1 << 8)
63 #define AT91_UDP_EPTYPE_BULK_OUT (2 << 8)
64 #define AT91_UDP_EPTYPE_INT_OUT (3 << 8)
65 #define AT91_UDP_EPTYPE_ISO_IN (5 << 8)
66 #define AT91_UDP_EPTYPE_BULK_IN (6 << 8)
67 #define AT91_UDP_EPTYPE_INT_IN (7 << 8)
68 #define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */
69 #define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */
70 #define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */
72 #define AT91_UDP_FDR(n) (0x50 + ((n) * 4)) /* Endpoint FIFO Data Registers 0-7 */
74 #define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */
75 #define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */
77 #endif