ia64/linux-2.6.18-xen.hg

view arch/v850/kernel/teg.c @ 854:950b9eb27661

usbback: fix urb interval value for interrupt urbs.

Signed-off-by: Noboru Iwamatsu <n_iwamatsu@jp.fujitsu.com>
author Keir Fraser <keir.fraser@citrix.com>
date Mon Apr 06 13:51:20 2009 +0100 (2009-04-06)
parents 831230e53067
children
line source
1 /*
2 * arch/v850/kernel/teg.c -- NB85E-TEG cpu chip
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/mm.h>
17 #include <linux/swap.h>
18 #include <linux/bootmem.h>
19 #include <linux/irq.h>
21 #include <asm/atomic.h>
22 #include <asm/page.h>
23 #include <asm/machdep.h>
24 #include <asm/v850e_timer_d.h>
26 #include "mach.h"
28 void __init mach_sched_init (struct irqaction *timer_action)
29 {
30 /* Select timer interrupt instead of external pin. */
31 TEG_ISS |= 0x1;
32 /* Start hardware timer. */
33 v850e_timer_d_configure (0, HZ);
34 /* Install timer interrupt handler. */
35 setup_irq (IRQ_INTCMD(0), timer_action);
36 }
38 static struct v850e_intc_irq_init irq_inits[] = {
39 { "IRQ", 0, NUM_CPU_IRQS, 1, 7 },
40 { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 },
41 { "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 1, 3 },
42 { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 1, 4 },
43 { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 1, 5 },
44 { 0 }
45 };
46 #define NUM_IRQ_INITS ((sizeof irq_inits / sizeof irq_inits[0]) - 1)
48 static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
50 /* Initialize MA chip interrupts. */
51 void __init teg_init_irqs (void)
52 {
53 v850e_intc_init_irq_types (irq_inits, hw_itypes);
54 }
56 /* Called before configuring an on-chip UART. */
57 void teg_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
58 {
59 /* Enable UART I/O pins instead of external interrupt pins, and
60 UART interrupts instead of external pin interrupts. */
61 TEG_ISS |= 0x4E;
62 }