ia64/linux-2.6.18-xen.hg

view arch/v850/kernel/rte_ma1_cb.ld @ 854:950b9eb27661

usbback: fix urb interval value for interrupt urbs.

Signed-off-by: Noboru Iwamatsu <n_iwamatsu@jp.fujitsu.com>
author Keir Fraser <keir.fraser@citrix.com>
date Mon Apr 06 13:51:20 2009 +0100 (2009-04-06)
parents 831230e53067
children
line source
1 /* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board
2 (CONFIG_RTE_CB_MA1), with kernel in SDRAM, under Multi debugger. */
4 MEMORY {
5 /* 1MB of SRAM; we can't use the last 32KB, because it's used by
6 the monitor scratch-RAM. This memory is mirrored 4 times. */
7 SRAM : ORIGIN = SRAM_ADDR, LENGTH = (SRAM_SIZE - MON_SCRATCH_SIZE)
8 /* Monitor scratch RAM; only the interrupt vectors should go here. */
9 MRAM : ORIGIN = MON_SCRATCH_ADDR, LENGTH = MON_SCRATCH_SIZE
10 /* 32MB of SDRAM. */
11 SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE
12 }
14 #ifdef CONFIG_RTE_CB_MA1_KSRAM
15 # define KRAM SRAM
16 #else
17 # define KRAM SDRAM
18 #endif
20 SECTIONS {
21 /* We can't use RAMK_KRAM_CONTENTS because that puts the whole
22 kernel in a single ELF segment, and the Multi debugger (which
23 we use to load the kernel) appears to have bizarre problems
24 dealing with it. */
26 .text : {
27 __kram_start = . ;
28 TEXT_CONTENTS
29 } > KRAM
31 .data : {
32 DATA_CONTENTS
33 BSS_CONTENTS
34 RAMK_INIT_CONTENTS
35 __kram_end = . ;
36 BOOTMAP_CONTENTS
38 /* The address at which the interrupt vectors are initially
39 loaded by the loader. We can't load the interrupt vectors
40 directly into their target location, because the monitor
41 ROM for the GHS Multi debugger barfs if we try.
42 Unfortunately, Multi also doesn't deal correctly with ELF
43 sections where the LMA and VMA differ (it just ignores the
44 LMA), so we can't use that feature to work around the
45 problem! What we do instead is just put the interrupt
46 vectors into a normal section, and have the
47 `mach_early_init' function for Midas boards do the
48 necessary copying and relocation at runtime (this section
49 basically only contains `jr' instructions, so it's not
50 that hard). */
51 . = ALIGN (0x10) ;
52 __intv_load_start = . ;
53 INTV_CONTENTS
54 } > KRAM
56 .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM
57 }