ia64/linux-2.6.18-xen.hg

view include/asm-i386/mach-xen/asm/pgtable.h @ 761:5e1269aa5c29

blktap, gntdev: fix highpte handling

In case of highpte, virt_to_machine() can't be used. Introduce
ptep_to_machine() and use it, also to simplify xen_l1_entry_update().

Original patch from: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Dec 10 13:32:32 2008 +0000 (2008-12-10)
parents c6e36a53cf05
children
line source
1 #ifndef _I386_PGTABLE_H
2 #define _I386_PGTABLE_H
4 #include <asm/hypervisor.h>
6 /*
7 * The Linux memory management assumes a three-level page table setup. On
8 * the i386, we use that, but "fold" the mid level into the top-level page
9 * table, so that we physically have the same two-level page table as the
10 * i386 mmu expects.
11 *
12 * This file contains the functions and defines necessary to modify and use
13 * the i386 page table tree.
14 */
15 #ifndef __ASSEMBLY__
16 #include <asm/processor.h>
17 #include <asm/fixmap.h>
18 #include <linux/threads.h>
20 #ifndef _I386_BITOPS_H
21 #include <asm/bitops.h>
22 #endif
24 #include <linux/slab.h>
25 #include <linux/list.h>
26 #include <linux/spinlock.h>
28 /* Is this pagetable pinned? */
29 #define PG_pinned PG_arch_1
31 struct mm_struct;
32 struct vm_area_struct;
34 /*
35 * ZERO_PAGE is a global shared page that is always zero: used
36 * for zero-mapped memory areas etc..
37 */
38 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
39 extern unsigned long empty_zero_page[1024];
40 extern pgd_t *swapper_pg_dir;
41 extern kmem_cache_t *pgd_cache;
42 extern kmem_cache_t *pmd_cache;
43 extern spinlock_t pgd_lock;
44 extern struct page *pgd_list;
46 void pmd_ctor(void *, kmem_cache_t *, unsigned long);
47 void pgd_ctor(void *, kmem_cache_t *, unsigned long);
48 void pgd_dtor(void *, kmem_cache_t *, unsigned long);
49 void pgtable_cache_init(void);
50 void paging_init(void);
52 /*
53 * The Linux x86 paging architecture is 'compile-time dual-mode', it
54 * implements both the traditional 2-level x86 page tables and the
55 * newer 3-level PAE-mode page tables.
56 */
57 #ifdef CONFIG_X86_PAE
58 # include <asm/pgtable-3level-defs.h>
59 # define PMD_SIZE (1UL << PMD_SHIFT)
60 # define PMD_MASK (~(PMD_SIZE-1))
61 #else
62 # include <asm/pgtable-2level-defs.h>
63 #endif
65 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
66 #define PGDIR_MASK (~(PGDIR_SIZE-1))
68 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
69 #define FIRST_USER_ADDRESS 0
71 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
72 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
74 #define TWOLEVEL_PGDIR_SHIFT 22
75 #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
76 #define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)
78 /* Just any arbitrary offset to the start of the vmalloc VM area: the
79 * current 8MB value just means that there will be a 8MB "hole" after the
80 * physical memory until the kernel virtual memory starts. That means that
81 * any out-of-bounds memory accesses will hopefully be caught.
82 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
83 * area for the same reason. ;)
84 */
85 #define VMALLOC_OFFSET (8*1024*1024)
86 #define VMALLOC_START (((unsigned long) high_memory + vmalloc_earlyreserve + \
87 2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
88 #ifdef CONFIG_HIGHMEM
89 # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
90 #else
91 # define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
92 #endif
94 /*
95 * _PAGE_PSE set in the page directory entry just means that
96 * the page directory entry points directly to a 4MB-aligned block of
97 * memory.
98 */
99 #define _PAGE_BIT_PRESENT 0
100 #define _PAGE_BIT_RW 1
101 #define _PAGE_BIT_USER 2
102 #define _PAGE_BIT_PWT 3
103 #define _PAGE_BIT_PCD 4
104 #define _PAGE_BIT_ACCESSED 5
105 #define _PAGE_BIT_DIRTY 6
106 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page, Pentium+, if present.. */
107 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
108 /*#define _PAGE_BIT_UNUSED1 9*/ /* available for programmer */
109 #define _PAGE_BIT_UNUSED2 10
110 #define _PAGE_BIT_UNUSED3 11
111 #define _PAGE_BIT_NX 63
113 #define _PAGE_PRESENT 0x001
114 #define _PAGE_RW 0x002
115 #define _PAGE_USER 0x004
116 #define _PAGE_PWT 0x008
117 #define _PAGE_PCD 0x010
118 #define _PAGE_ACCESSED 0x020
119 #define _PAGE_DIRTY 0x040
120 #define _PAGE_PSE 0x080 /* 4 MB (or 2MB) page, Pentium+, if present.. */
121 #define _PAGE_GLOBAL 0x100 /* Global TLB entry PPro+ */
122 /*#define _PAGE_UNUSED1 0x200*/ /* available for programmer */
123 #define _PAGE_UNUSED2 0x400
124 #define _PAGE_UNUSED3 0x800
126 /* If _PAGE_PRESENT is clear, we use these: */
127 #define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
128 #define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
129 pte_present gives true */
130 #ifdef CONFIG_X86_PAE
131 #define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
132 #else
133 #define _PAGE_NX 0
134 #endif
136 /* Mapped page is I/O or foreign and has no associated page struct. */
137 #define _PAGE_IO 0x200
139 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
140 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
141 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_IO)
143 #define PAGE_NONE \
144 __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
145 #define PAGE_SHARED \
146 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
148 #define PAGE_SHARED_EXEC \
149 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
150 #define PAGE_COPY_NOEXEC \
151 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
152 #define PAGE_COPY_EXEC \
153 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
154 #define PAGE_COPY \
155 PAGE_COPY_NOEXEC
156 #define PAGE_READONLY \
157 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
158 #define PAGE_READONLY_EXEC \
159 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
161 #define _PAGE_KERNEL \
162 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
163 #define _PAGE_KERNEL_EXEC \
164 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
166 extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
167 #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
168 #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD)
169 #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
170 #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
172 #define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
173 #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
174 #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
175 #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
176 #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
177 #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
179 /*
180 * The i386 can't do page protection for execute, and considers that
181 * the same are read. Also, write permissions imply read permissions.
182 * This is the closest we can get..
183 */
184 #define __P000 PAGE_NONE
185 #define __P001 PAGE_READONLY
186 #define __P010 PAGE_COPY
187 #define __P011 PAGE_COPY
188 #define __P100 PAGE_READONLY_EXEC
189 #define __P101 PAGE_READONLY_EXEC
190 #define __P110 PAGE_COPY_EXEC
191 #define __P111 PAGE_COPY_EXEC
193 #define __S000 PAGE_NONE
194 #define __S001 PAGE_READONLY
195 #define __S010 PAGE_SHARED
196 #define __S011 PAGE_SHARED
197 #define __S100 PAGE_READONLY_EXEC
198 #define __S101 PAGE_READONLY_EXEC
199 #define __S110 PAGE_SHARED_EXEC
200 #define __S111 PAGE_SHARED_EXEC
202 /*
203 * Define this if things work differently on an i386 and an i486:
204 * it will (on an i486) warn about kernel memory accesses that are
205 * done without a 'access_ok(VERIFY_WRITE,..)'
206 */
207 #undef TEST_ACCESS_OK
209 /* The boot page tables (all created as a single array) */
210 extern unsigned long pg0[];
212 #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
214 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
215 #define pmd_none(x) (!(unsigned long)__pmd_val(x))
216 #if CONFIG_XEN_COMPAT <= 0x030002
217 /* pmd_present doesn't just test the _PAGE_PRESENT bit since wr.p.t.
218 can temporarily clear it. */
219 #define pmd_present(x) (__pmd_val(x))
220 #define pmd_bad(x) ((__pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER & ~_PAGE_PRESENT)) != (_KERNPG_TABLE & ~_PAGE_PRESENT))
221 #else
222 #define pmd_present(x) (__pmd_val(x) & _PAGE_PRESENT)
223 #define pmd_bad(x) ((__pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
224 #endif
227 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
229 /*
230 * The following only work if pte_present() is true.
231 * Undefined behaviour if not..
232 */
233 static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
234 static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
235 static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
236 static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
237 static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
238 static inline int pte_huge(pte_t pte) { return (pte).pte_low & _PAGE_PSE; }
240 /*
241 * The following only works if pte_present() is not true.
242 */
243 static inline int pte_file(pte_t pte) { return (pte).pte_low & _PAGE_FILE; }
245 static inline pte_t pte_rdprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
246 static inline pte_t pte_exprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
247 static inline pte_t pte_mkclean(pte_t pte) { (pte).pte_low &= ~_PAGE_DIRTY; return pte; }
248 static inline pte_t pte_mkold(pte_t pte) { (pte).pte_low &= ~_PAGE_ACCESSED; return pte; }
249 static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_RW; return pte; }
250 static inline pte_t pte_mkread(pte_t pte) { (pte).pte_low |= _PAGE_USER; return pte; }
251 static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return pte; }
252 static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
253 static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
254 static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
255 static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PSE; return pte; }
257 #ifdef CONFIG_X86_PAE
258 # include <asm/pgtable-3level.h>
259 #else
260 # include <asm/pgtable-2level.h>
261 #endif
263 #define ptep_test_and_clear_dirty(vma, addr, ptep) \
264 ({ \
265 pte_t __pte = *(ptep); \
266 int __ret = pte_dirty(__pte); \
267 if (__ret) { \
268 __pte = pte_mkclean(__pte); \
269 if ((vma)->vm_mm != current->mm || \
270 HYPERVISOR_update_va_mapping(addr, __pte, 0)) \
271 (ptep)->pte_low = __pte.pte_low; \
272 } \
273 __ret; \
274 })
276 #define ptep_test_and_clear_young(vma, addr, ptep) \
277 ({ \
278 pte_t __pte = *(ptep); \
279 int __ret = pte_young(__pte); \
280 if (__ret) \
281 __pte = pte_mkold(__pte); \
282 if ((vma)->vm_mm != current->mm || \
283 HYPERVISOR_update_va_mapping(addr, __pte, 0)) \
284 (ptep)->pte_low = __pte.pte_low; \
285 __ret; \
286 })
288 #define ptep_get_and_clear_full(mm, addr, ptep, full) \
289 ((full) ? ({ \
290 pte_t __res = *(ptep); \
291 if (test_bit(PG_pinned, &virt_to_page((mm)->pgd)->flags)) \
292 xen_l1_entry_update(ptep, __pte(0)); \
293 else \
294 *(ptep) = __pte(0); \
295 __res; \
296 }) : \
297 ptep_get_and_clear(mm, addr, ptep))
299 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
300 {
301 pte_t pte = *ptep;
302 if (pte_write(pte))
303 set_pte_at(mm, addr, ptep, pte_wrprotect(pte));
304 }
306 /*
307 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
308 *
309 * dst - pointer to pgd range anwhere on a pgd page
310 * src - ""
311 * count - the number of pgds to copy.
312 *
313 * dst and src can be on the same page, but the range must not overlap,
314 * and must not cross a page boundary.
315 */
316 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
317 {
318 memcpy(dst, src, count * sizeof(pgd_t));
319 }
321 /*
322 * Macro to mark a page protection value as "uncacheable". On processors which do not support
323 * it, this is a no-op.
324 */
325 #define pgprot_noncached(prot) ((boot_cpu_data.x86 > 3) \
326 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))
328 /*
329 * Conversion functions: convert a page and protection to a page entry,
330 * and a page entry and page directory to the page they refer to.
331 */
333 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
335 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
336 {
337 /*
338 * Since this might change the present bit (which controls whether
339 * a pte_t object has undergone p2m translation), we must use
340 * pte_val() on the input pte and __pte() for the return value.
341 */
342 paddr_t pteval = pte_val(pte);
344 pteval &= _PAGE_CHG_MASK;
345 pteval |= pgprot_val(newprot);
346 #ifdef CONFIG_X86_PAE
347 pteval &= __supported_pte_mask;
348 #endif
349 return __pte(pteval);
350 }
352 #define pmd_large(pmd) \
353 ((__pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT))
355 /*
356 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
357 *
358 * this macro returns the index of the entry in the pgd page which would
359 * control the given virtual address
360 */
361 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
362 #define pgd_index_k(addr) pgd_index(addr)
364 /*
365 * pgd_offset() returns a (pgd_t *)
366 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
367 */
368 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
370 /*
371 * a shortcut which implies the use of the kernel's pgd, instead
372 * of a process's
373 */
374 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
376 /*
377 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
378 *
379 * this macro returns the index of the entry in the pmd page which would
380 * control the given virtual address
381 */
382 #define pmd_index(address) \
383 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
385 /*
386 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
387 *
388 * this macro returns the index of the entry in the pte page which would
389 * control the given virtual address
390 */
391 #define pte_index(address) \
392 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
393 #define pte_offset_kernel(dir, address) \
394 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
396 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
398 #define pmd_page_kernel(pmd) \
399 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
401 /*
402 * Helper function that returns the kernel pagetable entry controlling
403 * the virtual address 'address'. NULL means no pagetable entry present.
404 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
405 * as a pte too.
406 */
407 extern pte_t *lookup_address(unsigned long address);
409 /*
410 * Make a given kernel text page executable/non-executable.
411 * Returns the previous executability setting of that page (which
412 * is used to restore the previous state). Used by the SMP bootup code.
413 * NOTE: this is an __init function for security reasons.
414 */
415 #ifdef CONFIG_X86_PAE
416 extern int set_kernel_exec(unsigned long vaddr, int enable);
417 #else
418 static inline int set_kernel_exec(unsigned long vaddr, int enable) { return 0;}
419 #endif
421 extern void noexec_setup(const char *str);
423 #if defined(CONFIG_HIGHPTE)
424 #define pte_offset_map(dir, address) \
425 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE0) + \
426 pte_index(address))
427 #define pte_offset_map_nested(dir, address) \
428 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE1) + \
429 pte_index(address))
430 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
431 #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
432 #else
433 #define pte_offset_map(dir, address) \
434 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
435 #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
436 #define pte_unmap(pte) do { } while (0)
437 #define pte_unmap_nested(pte) do { } while (0)
438 #endif
440 #define __HAVE_ARCH_PTEP_ESTABLISH
441 #define ptep_establish(vma, address, ptep, pteval) \
442 do { \
443 if ( likely((vma)->vm_mm == current->mm) ) { \
444 BUG_ON(HYPERVISOR_update_va_mapping(address, \
445 pteval, \
446 (unsigned long)(vma)->vm_mm->cpu_vm_mask.bits| \
447 UVMF_INVLPG|UVMF_MULTI)); \
448 } else { \
449 xen_l1_entry_update(ptep, pteval); \
450 flush_tlb_page(vma, address); \
451 } \
452 } while (0)
454 /*
455 * The i386 doesn't have any external MMU info: the kernel page
456 * tables contain all the necessary information.
457 *
458 * Also, we only update the dirty/accessed state if we set
459 * the dirty bit by hand in the kernel, since the hardware
460 * will do the accessed bit for us, and we don't want to
461 * race with other CPU's that might be updating the dirty
462 * bit at the same time.
463 */
464 #define update_mmu_cache(vma,address,pte) do { } while (0)
465 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
466 #define ptep_set_access_flags(vma, address, ptep, entry, dirty) \
467 do { \
468 if (dirty) \
469 ptep_establish(vma, address, ptep, entry); \
470 } while (0)
472 #include <xen/features.h>
473 void make_lowmem_page_readonly(void *va, unsigned int feature);
474 void make_lowmem_page_writable(void *va, unsigned int feature);
475 void make_page_readonly(void *va, unsigned int feature);
476 void make_page_writable(void *va, unsigned int feature);
477 void make_pages_readonly(void *va, unsigned int nr, unsigned int feature);
478 void make_pages_writable(void *va, unsigned int nr, unsigned int feature);
480 #define virt_to_ptep(va) \
481 ({ \
482 pte_t *__ptep = lookup_address((unsigned long)(va)); \
483 BUG_ON(!__ptep || !pte_present(*__ptep)); \
484 __ptep; \
485 })
487 #define arbitrary_virt_to_machine(va) \
488 (((maddr_t)pte_mfn(*virt_to_ptep(va)) << PAGE_SHIFT) \
489 | ((unsigned long)(va) & (PAGE_SIZE - 1)))
491 #ifdef CONFIG_HIGHPTE
492 #include <asm/io.h>
493 struct page *kmap_atomic_to_page(void *);
494 #define ptep_to_machine(ptep) \
495 ({ \
496 pte_t *__ptep = (ptep); \
497 page_to_phys(kmap_atomic_to_page(__ptep)) \
498 | ((unsigned long)__ptep & (PAGE_SIZE - 1)); \
499 })
500 #else
501 #define ptep_to_machine(ptep) virt_to_machine(ptep)
502 #endif
504 #endif /* !__ASSEMBLY__ */
506 #ifdef CONFIG_FLATMEM
507 #define kern_addr_valid(addr) (1)
508 #endif /* CONFIG_FLATMEM */
510 int direct_remap_pfn_range(struct vm_area_struct *vma,
511 unsigned long address,
512 unsigned long mfn,
513 unsigned long size,
514 pgprot_t prot,
515 domid_t domid);
516 int direct_kernel_remap_pfn_range(unsigned long address,
517 unsigned long mfn,
518 unsigned long size,
519 pgprot_t prot,
520 domid_t domid);
521 int create_lookup_pte_addr(struct mm_struct *mm,
522 unsigned long address,
523 uint64_t *ptep);
524 int touch_pte_range(struct mm_struct *mm,
525 unsigned long address,
526 unsigned long size);
528 int xen_change_pte_range(struct mm_struct *mm, pmd_t *pmd,
529 unsigned long addr, unsigned long end, pgprot_t newprot);
531 #define arch_change_pte_range(mm, pmd, addr, end, newprot) \
532 xen_change_pte_range(mm, pmd, addr, end, newprot)
534 #define io_remap_pfn_range(vma,from,pfn,size,prot) \
535 direct_remap_pfn_range(vma,from,pfn,size,prot,DOMID_IO)
537 #define MK_IOSPACE_PFN(space, pfn) (pfn)
538 #define GET_IOSPACE(pfn) 0
539 #define GET_PFN(pfn) (pfn)
541 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
542 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
543 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
544 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
545 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
546 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
547 #define __HAVE_ARCH_PTE_SAME
548 #include <asm-generic/pgtable.h>
550 #endif /* _I386_PGTABLE_H */