ia64/linux-2.6.18-xen.hg

view drivers/pci/pci-sysfs.c @ 240:3e8752eb6d9c

Apply patch for 2.6.18.8.

Signed-off-by: Ian Campbell <ian.campbell@xensource.com>
author Ian Campbell <ian.campbell@xensource.com>
date Wed Oct 03 10:00:44 2007 +0100 (2007-10-03)
parents 831230e53067
children f77ac4979fae
line source
1 /*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/stat.h>
21 #include <linux/topology.h>
22 #include <linux/mm.h>
24 #include "pci.h"
26 static int sysfs_initialized; /* = 0 */
28 /* show configuration fields */
29 #define pci_config_attr(field, format_string) \
30 static ssize_t \
31 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
32 { \
33 struct pci_dev *pdev; \
34 \
35 pdev = to_pci_dev (dev); \
36 return sprintf (buf, format_string, pdev->field); \
37 }
39 pci_config_attr(vendor, "0x%04x\n");
40 pci_config_attr(device, "0x%04x\n");
41 pci_config_attr(subsystem_vendor, "0x%04x\n");
42 pci_config_attr(subsystem_device, "0x%04x\n");
43 pci_config_attr(class, "0x%06x\n");
44 pci_config_attr(irq, "%u\n");
45 pci_config_attr(is_enabled, "%u\n");
47 static ssize_t broken_parity_status_show(struct device *dev,
48 struct device_attribute *attr,
49 char *buf)
50 {
51 struct pci_dev *pdev = to_pci_dev(dev);
52 return sprintf (buf, "%u\n", pdev->broken_parity_status);
53 }
55 static ssize_t broken_parity_status_store(struct device *dev,
56 struct device_attribute *attr,
57 const char *buf, size_t count)
58 {
59 struct pci_dev *pdev = to_pci_dev(dev);
60 ssize_t consumed = -EINVAL;
62 if ((count > 0) && (*buf == '0' || *buf == '1')) {
63 pdev->broken_parity_status = *buf == '1' ? 1 : 0;
64 consumed = count;
65 }
66 return consumed;
67 }
69 static ssize_t local_cpus_show(struct device *dev,
70 struct device_attribute *attr, char *buf)
71 {
72 cpumask_t mask;
73 int len;
75 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
76 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
77 strcat(buf,"\n");
78 return 1+len;
79 }
81 /* show resources */
82 static ssize_t
83 resource_show(struct device * dev, struct device_attribute *attr, char * buf)
84 {
85 struct pci_dev * pci_dev = to_pci_dev(dev);
86 char * str = buf;
87 int i;
88 int max = 7;
89 resource_size_t start, end;
91 if (pci_dev->subordinate)
92 max = DEVICE_COUNT_RESOURCE;
94 for (i = 0; i < max; i++) {
95 struct resource *res = &pci_dev->resource[i];
96 pci_resource_to_user(pci_dev, i, res, &start, &end);
97 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
98 (unsigned long long)start,
99 (unsigned long long)end,
100 (unsigned long long)res->flags);
101 }
102 return (str - buf);
103 }
105 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
106 {
107 struct pci_dev *pci_dev = to_pci_dev(dev);
109 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
110 pci_dev->vendor, pci_dev->device,
111 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
112 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
113 (u8)(pci_dev->class));
114 }
115 static ssize_t
116 is_enabled_store(struct device *dev, struct device_attribute *attr,
117 const char *buf, size_t count)
118 {
119 struct pci_dev *pdev = to_pci_dev(dev);
121 /* this can crash the machine when done on the "wrong" device */
122 if (!capable(CAP_SYS_ADMIN))
123 return count;
125 if (*buf == '0')
126 pci_disable_device(pdev);
128 if (*buf == '1')
129 pci_enable_device(pdev);
131 return count;
132 }
135 struct device_attribute pci_dev_attrs[] = {
136 __ATTR_RO(resource),
137 __ATTR_RO(vendor),
138 __ATTR_RO(device),
139 __ATTR_RO(subsystem_vendor),
140 __ATTR_RO(subsystem_device),
141 __ATTR_RO(class),
142 __ATTR_RO(irq),
143 __ATTR_RO(local_cpus),
144 __ATTR_RO(modalias),
145 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
146 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
147 broken_parity_status_show,broken_parity_status_store),
148 __ATTR_NULL,
149 };
151 static ssize_t
152 pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
153 {
154 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
155 unsigned int size = 64;
156 loff_t init_off = off;
157 u8 *data = (u8*) buf;
159 /* Several chips lock up trying to read undefined config space */
160 if (capable(CAP_SYS_ADMIN)) {
161 size = dev->cfg_size;
162 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
163 size = 128;
164 }
166 if (off > size)
167 return 0;
168 if (off + count > size) {
169 size -= off;
170 count = size;
171 } else {
172 size = count;
173 }
175 if ((off & 1) && size) {
176 u8 val;
177 pci_user_read_config_byte(dev, off, &val);
178 data[off - init_off] = val;
179 off++;
180 size--;
181 }
183 if ((off & 3) && size > 2) {
184 u16 val;
185 pci_user_read_config_word(dev, off, &val);
186 data[off - init_off] = val & 0xff;
187 data[off - init_off + 1] = (val >> 8) & 0xff;
188 off += 2;
189 size -= 2;
190 }
192 while (size > 3) {
193 u32 val;
194 pci_user_read_config_dword(dev, off, &val);
195 data[off - init_off] = val & 0xff;
196 data[off - init_off + 1] = (val >> 8) & 0xff;
197 data[off - init_off + 2] = (val >> 16) & 0xff;
198 data[off - init_off + 3] = (val >> 24) & 0xff;
199 off += 4;
200 size -= 4;
201 }
203 if (size >= 2) {
204 u16 val;
205 pci_user_read_config_word(dev, off, &val);
206 data[off - init_off] = val & 0xff;
207 data[off - init_off + 1] = (val >> 8) & 0xff;
208 off += 2;
209 size -= 2;
210 }
212 if (size > 0) {
213 u8 val;
214 pci_user_read_config_byte(dev, off, &val);
215 data[off - init_off] = val;
216 off++;
217 --size;
218 }
220 return count;
221 }
223 static ssize_t
224 pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
225 {
226 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
227 unsigned int size = count;
228 loff_t init_off = off;
229 u8 *data = (u8*) buf;
231 if (off > dev->cfg_size)
232 return 0;
233 if (off + count > dev->cfg_size) {
234 size = dev->cfg_size - off;
235 count = size;
236 }
238 if ((off & 1) && size) {
239 pci_user_write_config_byte(dev, off, data[off - init_off]);
240 off++;
241 size--;
242 }
244 if ((off & 3) && size > 2) {
245 u16 val = data[off - init_off];
246 val |= (u16) data[off - init_off + 1] << 8;
247 pci_user_write_config_word(dev, off, val);
248 off += 2;
249 size -= 2;
250 }
252 while (size > 3) {
253 u32 val = data[off - init_off];
254 val |= (u32) data[off - init_off + 1] << 8;
255 val |= (u32) data[off - init_off + 2] << 16;
256 val |= (u32) data[off - init_off + 3] << 24;
257 pci_user_write_config_dword(dev, off, val);
258 off += 4;
259 size -= 4;
260 }
262 if (size >= 2) {
263 u16 val = data[off - init_off];
264 val |= (u16) data[off - init_off + 1] << 8;
265 pci_user_write_config_word(dev, off, val);
266 off += 2;
267 size -= 2;
268 }
270 if (size) {
271 pci_user_write_config_byte(dev, off, data[off - init_off]);
272 off++;
273 --size;
274 }
276 return count;
277 }
279 #ifdef HAVE_PCI_LEGACY
280 /**
281 * pci_read_legacy_io - read byte(s) from legacy I/O port space
282 * @kobj: kobject corresponding to file to read from
283 * @buf: buffer to store results
284 * @off: offset into legacy I/O port space
285 * @count: number of bytes to read
286 *
287 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
288 * callback routine (pci_legacy_read).
289 */
290 ssize_t
291 pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
292 {
293 struct pci_bus *bus = to_pci_bus(container_of(kobj,
294 struct class_device,
295 kobj));
297 /* Only support 1, 2 or 4 byte accesses */
298 if (count != 1 && count != 2 && count != 4)
299 return -EINVAL;
301 return pci_legacy_read(bus, off, (u32 *)buf, count);
302 }
304 /**
305 * pci_write_legacy_io - write byte(s) to legacy I/O port space
306 * @kobj: kobject corresponding to file to read from
307 * @buf: buffer containing value to be written
308 * @off: offset into legacy I/O port space
309 * @count: number of bytes to write
310 *
311 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
312 * callback routine (pci_legacy_write).
313 */
314 ssize_t
315 pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
316 {
317 struct pci_bus *bus = to_pci_bus(container_of(kobj,
318 struct class_device,
319 kobj));
320 /* Only support 1, 2 or 4 byte accesses */
321 if (count != 1 && count != 2 && count != 4)
322 return -EINVAL;
324 return pci_legacy_write(bus, off, *(u32 *)buf, count);
325 }
327 /**
328 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
329 * @kobj: kobject corresponding to device to be mapped
330 * @attr: struct bin_attribute for this file
331 * @vma: struct vm_area_struct passed to mmap
332 *
333 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
334 * legacy memory space (first meg of bus space) into application virtual
335 * memory space.
336 */
337 int
338 pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
339 struct vm_area_struct *vma)
340 {
341 struct pci_bus *bus = to_pci_bus(container_of(kobj,
342 struct class_device,
343 kobj));
345 return pci_mmap_legacy_page_range(bus, vma);
346 }
347 #endif /* HAVE_PCI_LEGACY */
349 #ifdef HAVE_PCI_MMAP
350 /**
351 * pci_mmap_resource - map a PCI resource into user memory space
352 * @kobj: kobject for mapping
353 * @attr: struct bin_attribute for the file being mapped
354 * @vma: struct vm_area_struct passed into the mmap
355 *
356 * Use the regular PCI mapping routines to map a PCI resource into userspace.
357 * FIXME: write combining? maybe automatic for prefetchable regions?
358 */
359 static int
360 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
361 struct vm_area_struct *vma)
362 {
363 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
364 struct device, kobj));
365 struct resource *res = (struct resource *)attr->private;
366 enum pci_mmap_state mmap_type;
367 resource_size_t start, end;
368 int i;
370 for (i = 0; i < PCI_ROM_RESOURCE; i++)
371 if (res == &pdev->resource[i])
372 break;
373 if (i >= PCI_ROM_RESOURCE)
374 return -ENODEV;
376 /* pci_mmap_page_range() expects the same kind of entry as coming
377 * from /proc/bus/pci/ which is a "user visible" value. If this is
378 * different from the resource itself, arch will do necessary fixup.
379 */
380 pci_resource_to_user(pdev, i, res, &start, &end);
381 vma->vm_pgoff += start >> PAGE_SHIFT;
382 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
384 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
385 }
387 /**
388 * pci_create_resource_files - create resource files in sysfs for @dev
389 * @dev: dev in question
390 *
391 * Walk the resources in @dev creating files for each resource available.
392 */
393 static void
394 pci_create_resource_files(struct pci_dev *pdev)
395 {
396 int i;
398 /* Expose the PCI resources from this device as files */
399 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
400 struct bin_attribute *res_attr;
402 /* skip empty resources */
403 if (!pci_resource_len(pdev, i))
404 continue;
406 /* allocate attribute structure, piggyback attribute name */
407 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
408 if (res_attr) {
409 char *res_attr_name = (char *)(res_attr + 1);
411 pdev->res_attr[i] = res_attr;
412 sprintf(res_attr_name, "resource%d", i);
413 res_attr->attr.name = res_attr_name;
414 res_attr->attr.mode = S_IRUSR | S_IWUSR;
415 res_attr->attr.owner = THIS_MODULE;
416 res_attr->size = pci_resource_len(pdev, i);
417 res_attr->mmap = pci_mmap_resource;
418 res_attr->private = &pdev->resource[i];
419 sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
420 }
421 }
422 }
424 /**
425 * pci_remove_resource_files - cleanup resource files
426 * @dev: dev to cleanup
427 *
428 * If we created resource files for @dev, remove them from sysfs and
429 * free their resources.
430 */
431 static void
432 pci_remove_resource_files(struct pci_dev *pdev)
433 {
434 int i;
436 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
437 struct bin_attribute *res_attr;
439 res_attr = pdev->res_attr[i];
440 if (res_attr) {
441 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
442 kfree(res_attr);
443 }
444 }
445 }
446 #else /* !HAVE_PCI_MMAP */
447 static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
448 static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
449 #endif /* HAVE_PCI_MMAP */
451 /**
452 * pci_write_rom - used to enable access to the PCI ROM display
453 * @kobj: kernel object handle
454 * @buf: user input
455 * @off: file offset
456 * @count: number of byte in input
457 *
458 * writing anything except 0 enables it
459 */
460 static ssize_t
461 pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
462 {
463 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
465 if ((off == 0) && (*buf == '0') && (count == 2))
466 pdev->rom_attr_enabled = 0;
467 else
468 pdev->rom_attr_enabled = 1;
470 return count;
471 }
473 /**
474 * pci_read_rom - read a PCI ROM
475 * @kobj: kernel object handle
476 * @buf: where to put the data we read from the ROM
477 * @off: file offset
478 * @count: number of bytes to read
479 *
480 * Put @count bytes starting at @off into @buf from the ROM in the PCI
481 * device corresponding to @kobj.
482 */
483 static ssize_t
484 pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
485 {
486 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
487 void __iomem *rom;
488 size_t size;
490 if (!pdev->rom_attr_enabled)
491 return -EINVAL;
493 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
494 if (!rom)
495 return 0;
497 if (off >= size)
498 count = 0;
499 else {
500 if (off + count > size)
501 count = size - off;
503 memcpy_fromio(buf, rom + off, count);
504 }
505 pci_unmap_rom(pdev, rom);
507 return count;
508 }
510 static struct bin_attribute pci_config_attr = {
511 .attr = {
512 .name = "config",
513 .mode = S_IRUGO | S_IWUSR,
514 .owner = THIS_MODULE,
515 },
516 .size = 256,
517 .read = pci_read_config,
518 .write = pci_write_config,
519 };
521 static struct bin_attribute pcie_config_attr = {
522 .attr = {
523 .name = "config",
524 .mode = S_IRUGO | S_IWUSR,
525 .owner = THIS_MODULE,
526 },
527 .size = 4096,
528 .read = pci_read_config,
529 .write = pci_write_config,
530 };
532 int pci_create_sysfs_dev_files (struct pci_dev *pdev)
533 {
534 if (!sysfs_initialized)
535 return -EACCES;
537 if (pdev->cfg_size < 4096)
538 sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
539 else
540 sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
542 pci_create_resource_files(pdev);
544 /* If the device has a ROM, try to expose it in sysfs. */
545 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
546 struct bin_attribute *rom_attr;
548 rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
549 if (rom_attr) {
550 pdev->rom_attr = rom_attr;
551 rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
552 rom_attr->attr.name = "rom";
553 rom_attr->attr.mode = S_IRUSR;
554 rom_attr->attr.owner = THIS_MODULE;
555 rom_attr->read = pci_read_rom;
556 rom_attr->write = pci_write_rom;
557 sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
558 }
559 }
560 /* add platform-specific attributes */
561 pcibios_add_platform_entries(pdev);
563 return 0;
564 }
566 /**
567 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
568 * @pdev: device whose entries we should free
569 *
570 * Cleanup when @pdev is removed from sysfs.
571 */
572 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
573 {
574 if (!sysfs_initialized)
575 return;
577 if (pdev->cfg_size < 4096)
578 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
579 else
580 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
582 pci_remove_resource_files(pdev);
584 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
585 if (pdev->rom_attr) {
586 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
587 kfree(pdev->rom_attr);
588 }
589 }
590 }
592 static int __init pci_sysfs_init(void)
593 {
594 struct pci_dev *pdev = NULL;
596 sysfs_initialized = 1;
597 for_each_pci_dev(pdev)
598 pci_create_sysfs_dev_files(pdev);
600 return 0;
601 }
603 __initcall(pci_sysfs_init);