ia64/linux-2.6.18-xen.hg

view include/linux/pci.h @ 811:36d8c23b7574

Backport: PCI: support PCIe ARI capability

commit 58c3a727cb73b75a9104d295f096cca12959a5a5
Author: Yu Zhao <yu.zhao@intel.com>
Date: Tue Oct 14 14:02:53 2008 +0800

PCI: support PCIe ARI capability

This patch adds support for PCI Express Alternative Routing-ID
Interpretation (ARI) capability.

The ARI capability extends the Function Number field of the PCI
Express
Endpoint by reusing the Device Number which is otherwise hardwired
to 0.
With ARI, an Endpoint can have up to 256 functions.

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Mar 13 07:40:54 2009 +0000 (2009-03-13)
parents 77e3b255381e
children f0dd7eb92bc9
line source
1 /*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
23 /* Include the ID list */
24 #include <linux/pci_ids.h>
26 /*
27 * The PCI interface treats multi-function devices as independent
28 * devices. The slot/function address of each device is encoded
29 * in a single byte as follows:
30 *
31 * 7:3 = slot
32 * 2:0 = function
33 */
34 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
35 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
36 #define PCI_FUNC(devfn) ((devfn) & 0x07)
38 /* Ioctls for /proc/bus/pci/X/Y nodes. */
39 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
40 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
41 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
42 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
43 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
45 #ifdef __KERNEL__
47 #include <linux/mod_devicetable.h>
49 #include <linux/types.h>
50 #include <linux/ioport.h>
51 #include <linux/list.h>
52 #include <linux/errno.h>
53 #include <linux/device.h>
55 /* File state for mmap()s on /proc/bus/pci/X/Y */
56 enum pci_mmap_state {
57 pci_mmap_io,
58 pci_mmap_mem
59 };
61 /* This defines the direction arg to the DMA mapping routines. */
62 #define PCI_DMA_BIDIRECTIONAL 0
63 #define PCI_DMA_TODEVICE 1
64 #define PCI_DMA_FROMDEVICE 2
65 #define PCI_DMA_NONE 3
67 #define DEVICE_COUNT_COMPATIBLE 4
68 #define DEVICE_COUNT_RESOURCE 12
70 typedef int __bitwise pci_power_t;
72 #define PCI_D0 ((pci_power_t __force) 0)
73 #define PCI_D1 ((pci_power_t __force) 1)
74 #define PCI_D2 ((pci_power_t __force) 2)
75 #define PCI_D3hot ((pci_power_t __force) 3)
76 #define PCI_D3cold ((pci_power_t __force) 4)
77 #define PCI_UNKNOWN ((pci_power_t __force) 5)
78 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
80 /** The pci_channel state describes connectivity between the CPU and
81 * the pci device. If some PCI bus between here and the pci device
82 * has crashed or locked up, this info is reflected here.
83 */
84 typedef unsigned int __bitwise pci_channel_state_t;
86 enum pci_channel_state {
87 /* I/O channel is in normal state */
88 pci_channel_io_normal = (__force pci_channel_state_t) 1,
90 /* I/O to channel is blocked */
91 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
93 /* PCI card is dead */
94 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
95 };
97 typedef unsigned short __bitwise pci_bus_flags_t;
98 enum pci_bus_flags {
99 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
100 };
102 struct pci_cap_saved_state {
103 struct hlist_node next;
104 char cap_nr;
105 u32 data[0];
106 };
108 /*
109 * The pci_dev structure is used to describe PCI devices.
110 */
111 struct pci_dev {
112 struct list_head global_list; /* node in list of all PCI devices */
113 struct list_head bus_list; /* node in per-bus list */
114 struct pci_bus *bus; /* bus this device is on */
115 struct pci_bus *subordinate; /* bus this device bridges to */
117 void *sysdata; /* hook for sys-specific extension */
118 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
120 unsigned int devfn; /* encoded device & function index */
121 unsigned short vendor;
122 unsigned short device;
123 unsigned short subsystem_vendor;
124 unsigned short subsystem_device;
125 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
126 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
127 u8 rom_base_reg; /* which config register controls the ROM */
128 u8 pin; /* which interrupt pin this device uses */
130 struct pci_driver *driver; /* which driver has allocated this device */
131 u64 dma_mask; /* Mask of the bits of bus address this
132 device implements. Normally this is
133 0xffffffff. You only need to change
134 this if your device has broken DMA
135 or supports 64-bit transfers. */
137 pci_power_t current_state; /* Current operating state. In ACPI-speak,
138 this is D0-D3, D0 being fully functional,
139 and D3 being off. */
141 pci_channel_state_t error_state; /* current connectivity state */
142 struct device dev; /* Generic device interface */
144 /* device is compatible with these IDs */
145 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
146 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
148 int cfg_size; /* Size of configuration space */
150 /*
151 * Instead of touching interrupt line and base address registers
152 * directly, use the values stored here. They might be different!
153 */
154 unsigned int irq;
155 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
157 /* These fields are used by common fixups */
158 unsigned int transparent:1; /* Transparent PCI bridge */
159 unsigned int multifunction:1;/* Part of multi-function device */
160 /* keep track of device state */
161 unsigned int is_enabled:1; /* pci_enable_device has been called */
162 unsigned int is_busmaster:1; /* device is busmaster */
163 unsigned int no_msi:1; /* device may not use msi */
164 unsigned int no_d1d2:1; /* only allow d0 or d3 */
165 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
166 unsigned int broken_parity_status:1; /* Device generates false positive parity */
167 unsigned int msi_enabled:1;
168 unsigned int msix_enabled:1;
170 u32 saved_config_space[16]; /* config space saved at suspend time */
171 struct hlist_head saved_cap_space;
172 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
173 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
174 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
175 unsigned int ari_enabled:1; /* ARI forwarding */
176 };
178 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
179 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
180 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
181 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
183 static inline struct pci_cap_saved_state *pci_find_saved_cap(
184 struct pci_dev *pci_dev,char cap)
185 {
186 struct pci_cap_saved_state *tmp;
187 struct hlist_node *pos;
189 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
190 if (tmp->cap_nr == cap)
191 return tmp;
192 }
193 return NULL;
194 }
196 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
197 struct pci_cap_saved_state *new_cap)
198 {
199 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
200 }
202 static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
203 {
204 hlist_del(&cap->next);
205 }
207 /*
208 * For PCI devices, the region numbers are assigned this way:
209 *
210 * 0-5 standard PCI regions
211 * 6 expansion ROM
212 * 7-10 bridges: address space assigned to buses behind the bridge
213 */
215 #define PCI_ROM_RESOURCE 6
216 #define PCI_BRIDGE_RESOURCES 7
217 #define PCI_NUM_RESOURCES 11
219 #ifndef PCI_BUS_NUM_RESOURCES
220 #define PCI_BUS_NUM_RESOURCES 8
221 #endif
223 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
225 struct pci_bus {
226 struct list_head node; /* node in list of buses */
227 struct pci_bus *parent; /* parent bus this bridge is on */
228 struct list_head children; /* list of child buses */
229 struct list_head devices; /* list of devices on this bus */
230 struct pci_dev *self; /* bridge device as seen by parent */
231 struct resource *resource[PCI_BUS_NUM_RESOURCES];
232 /* address space routed to this bus */
234 struct pci_ops *ops; /* configuration access functions */
235 void *sysdata; /* hook for sys-specific extension */
236 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
238 unsigned char number; /* bus number */
239 unsigned char primary; /* number of primary bridge */
240 unsigned char secondary; /* number of secondary bridge */
241 unsigned char subordinate; /* max number of subordinate buses */
243 char name[48];
245 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
246 pci_bus_flags_t bus_flags; /* Inherited by child busses */
247 struct device *bridge;
248 struct class_device class_dev;
249 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
250 struct bin_attribute *legacy_mem; /* legacy mem */
251 };
253 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
254 #define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
256 /*
257 * Error values that may be returned by PCI functions.
258 */
259 #define PCIBIOS_SUCCESSFUL 0x00
260 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
261 #define PCIBIOS_BAD_VENDOR_ID 0x83
262 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
263 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
264 #define PCIBIOS_SET_FAILED 0x88
265 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
267 /* Low-level architecture-dependent routines */
269 struct pci_ops {
270 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
271 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
272 };
274 struct pci_raw_ops {
275 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
276 int reg, int len, u32 *val);
277 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
278 int reg, int len, u32 val);
279 };
281 extern struct pci_raw_ops *raw_pci_ops;
283 struct pci_bus_region {
284 unsigned long start;
285 unsigned long end;
286 };
288 struct pci_dynids {
289 spinlock_t lock; /* protects list, index */
290 struct list_head list; /* for IDs added at runtime */
291 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
292 };
294 /* ---------------------------------------------------------------- */
295 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
296 * a set fof callbacks in struct pci_error_handlers, then that device driver
297 * will be notified of PCI bus errors, and will be driven to recovery
298 * when an error occurs.
299 */
301 typedef unsigned int __bitwise pci_ers_result_t;
303 enum pci_ers_result {
304 /* no result/none/not supported in device driver */
305 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
307 /* Device driver can recover without slot reset */
308 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
310 /* Device driver wants slot to be reset. */
311 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
313 /* Device has completely failed, is unrecoverable */
314 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
316 /* Device driver is fully recovered and operational */
317 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
318 };
320 /* PCI bus error event callbacks */
321 struct pci_error_handlers
322 {
323 /* PCI bus error detected on this device */
324 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
325 enum pci_channel_state error);
327 /* MMIO has been re-enabled, but not DMA */
328 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
330 /* PCI Express link has been reset */
331 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
333 /* PCI slot has been reset */
334 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
336 /* Device driver may resume normal operations */
337 void (*resume)(struct pci_dev *dev);
338 };
340 /* ---------------------------------------------------------------- */
342 struct module;
343 struct pci_driver {
344 struct list_head node;
345 char *name;
346 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
347 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
348 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
349 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
350 int (*resume) (struct pci_dev *dev); /* Device woken up */
351 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
352 void (*shutdown) (struct pci_dev *dev);
354 struct pci_error_handlers *err_handler;
355 struct device_driver driver;
356 struct pci_dynids dynids;
357 };
359 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
361 /**
362 * PCI_DEVICE - macro used to describe a specific pci device
363 * @vend: the 16 bit PCI Vendor ID
364 * @dev: the 16 bit PCI Device ID
365 *
366 * This macro is used to create a struct pci_device_id that matches a
367 * specific device. The subvendor and subdevice fields will be set to
368 * PCI_ANY_ID.
369 */
370 #define PCI_DEVICE(vend,dev) \
371 .vendor = (vend), .device = (dev), \
372 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
374 /**
375 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
376 * @dev_class: the class, subclass, prog-if triple for this device
377 * @dev_class_mask: the class mask for this device
378 *
379 * This macro is used to create a struct pci_device_id that matches a
380 * specific PCI class. The vendor, device, subvendor, and subdevice
381 * fields will be set to PCI_ANY_ID.
382 */
383 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
384 .class = (dev_class), .class_mask = (dev_class_mask), \
385 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
386 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
388 /*
389 * pci_module_init is obsolete, this stays here till we fix up all usages of it
390 * in the tree.
391 */
392 #define pci_module_init pci_register_driver
394 /* these external functions are only available when PCI support is enabled */
395 #ifdef CONFIG_PCI
397 extern struct bus_type pci_bus_type;
399 /* Do NOT directly access these two variables, unless you are arch specific pci
400 * code, or pci core code. */
401 extern struct list_head pci_root_buses; /* list of all known PCI buses */
402 extern struct list_head pci_devices; /* list of all devices */
404 void pcibios_fixup_bus(struct pci_bus *);
405 int pcibios_enable_device(struct pci_dev *, int mask);
406 char *pcibios_setup (char *str);
408 /* Used only when drivers/pci/setup.c is used */
409 void pcibios_align_resource(void *, struct resource *, resource_size_t,
410 resource_size_t);
411 void pcibios_update_irq(struct pci_dev *, int irq);
413 /* Generic PCI functions used internally */
415 extern struct pci_bus *pci_find_bus(int domain, int busnr);
416 void pci_bus_add_devices(struct pci_bus *bus);
417 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
418 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
419 {
420 struct pci_bus *root_bus;
421 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
422 if (root_bus)
423 pci_bus_add_devices(root_bus);
424 return root_bus;
425 }
426 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
427 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
428 int pci_scan_slot(struct pci_bus *bus, int devfn);
429 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
430 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
431 unsigned int pci_scan_child_bus(struct pci_bus *bus);
432 void pci_bus_add_device(struct pci_dev *dev);
433 void pci_read_bridge_bases(struct pci_bus *child);
434 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
435 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
436 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
437 extern void pci_dev_put(struct pci_dev *dev);
438 extern void pci_remove_bus(struct pci_bus *b);
439 extern void pci_remove_bus_device(struct pci_dev *dev);
440 void pci_setup_cardbus(struct pci_bus *bus);
442 /* Generic PCI functions exported to card drivers */
444 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
445 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
446 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
447 int pci_find_capability (struct pci_dev *dev, int cap);
448 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
449 int pci_find_ext_capability (struct pci_dev *dev, int cap);
450 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
452 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
453 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
454 unsigned int ss_vendor, unsigned int ss_device,
455 struct pci_dev *from);
456 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
457 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
458 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
459 int pci_dev_present(const struct pci_device_id *ids);
461 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
462 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
463 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
464 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
465 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
466 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
468 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
469 {
470 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
471 }
472 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
473 {
474 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
475 }
476 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
477 {
478 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
479 }
480 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
481 {
482 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
483 }
484 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
485 {
486 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
487 }
488 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
489 {
490 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
491 }
493 int pci_enable_device(struct pci_dev *dev);
494 int pci_enable_device_bars(struct pci_dev *dev, int mask);
495 void pci_disable_device(struct pci_dev *dev);
496 void pci_set_master(struct pci_dev *dev);
497 #define HAVE_PCI_SET_MWI
498 int pci_set_mwi(struct pci_dev *dev);
499 void pci_clear_mwi(struct pci_dev *dev);
500 void pci_intx(struct pci_dev *dev, int enable);
501 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
502 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
503 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
504 int pci_assign_resource(struct pci_dev *dev, int i);
505 int pci_assign_resource_fixed(struct pci_dev *dev, int i);
506 void pci_restore_bars(struct pci_dev *dev);
508 /* ROM control related routines */
509 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
510 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
511 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
512 void pci_remove_rom(struct pci_dev *pdev);
514 /* Power management related routines */
515 int pci_save_state(struct pci_dev *dev);
516 int pci_restore_state(struct pci_dev *dev);
517 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
518 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
519 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
521 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
522 void pci_bus_assign_resources(struct pci_bus *bus);
523 void pci_bus_size_bridges(struct pci_bus *bus);
524 int pci_claim_resource(struct pci_dev *, int);
525 void pci_assign_unassigned_resources(void);
526 void pdev_enable_device(struct pci_dev *);
527 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
528 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
529 int (*)(struct pci_dev *, u8, u8));
530 #define HAVE_PCI_REQ_REGIONS 2
531 int pci_request_regions(struct pci_dev *, const char *);
532 void pci_release_regions(struct pci_dev *);
533 int pci_request_region(struct pci_dev *, int, const char *);
534 void pci_release_region(struct pci_dev *, int);
536 /* drivers/pci/bus.c */
537 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
538 resource_size_t size, resource_size_t align,
539 resource_size_t min, unsigned int type_mask,
540 void (*alignf)(void *, struct resource *,
541 resource_size_t, resource_size_t),
542 void *alignf_data);
543 void pci_enable_bridges(struct pci_bus *bus);
545 /* Proper probing supporting hot-pluggable devices */
546 int __pci_register_driver(struct pci_driver *, struct module *);
547 static inline int pci_register_driver(struct pci_driver *driver)
548 {
549 return __pci_register_driver(driver, THIS_MODULE);
550 }
552 void pci_unregister_driver(struct pci_driver *);
553 void pci_remove_behind_bridge(struct pci_dev *);
554 struct pci_driver *pci_dev_driver(const struct pci_dev *);
555 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
556 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
557 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
559 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
560 void *userdata);
561 int pci_cfg_space_size(struct pci_dev *dev);
562 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
564 /* kmem_cache style wrapper around pci_alloc_consistent() */
566 #include <linux/dmapool.h>
568 #define pci_pool dma_pool
569 #define pci_pool_create(name, pdev, size, align, allocation) \
570 dma_pool_create(name, &pdev->dev, size, align, allocation)
571 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
572 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
573 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
575 enum pci_dma_burst_strategy {
576 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
577 strategy_parameter is N/A */
578 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
579 byte boundaries */
580 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
581 strategy_parameter byte boundaries */
582 };
584 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
585 extern struct pci_dev *isa_bridge;
586 #endif
588 struct msix_entry {
589 u16 vector; /* kernel uses to write allocated vector */
590 u16 entry; /* driver uses to specify entry, OS writes */
591 };
593 #ifndef CONFIG_PCI_MSI
594 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
595 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
596 static inline void pci_disable_msi(struct pci_dev *dev) {}
597 static inline int pci_enable_msix(struct pci_dev* dev,
598 struct msix_entry *entries, int nvec) {return -1;}
599 static inline void pci_disable_msix(struct pci_dev *dev) {}
600 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
601 #ifdef CONFIG_XEN
602 #define register_msi_get_owner(func) 0
603 #define unregister_msi_get_owner(func) 0
604 #endif
605 #else
606 extern void pci_scan_msi_device(struct pci_dev *dev);
607 extern int pci_enable_msi(struct pci_dev *dev);
608 extern void pci_disable_msi(struct pci_dev *dev);
609 extern int pci_enable_msix(struct pci_dev* dev,
610 struct msix_entry *entries, int nvec);
611 extern void pci_disable_msix(struct pci_dev *dev);
612 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
613 #ifdef CONFIG_XEN
614 extern int register_msi_get_owner(int (*func)(struct pci_dev *dev));
615 extern int unregister_msi_get_owner(int (*func)(struct pci_dev *dev));
616 #endif
617 #endif
619 extern void pci_block_user_cfg_access(struct pci_dev *dev);
620 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
622 /*
623 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
624 * a PCI domain is defined to be a set of PCI busses which share
625 * configuration space.
626 */
627 #ifndef CONFIG_PCI_DOMAINS
628 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
629 static inline int pci_proc_domain(struct pci_bus *bus)
630 {
631 return 0;
632 }
633 #endif
635 #else /* CONFIG_PCI is not enabled */
637 /*
638 * If the system does not have PCI, clearly these return errors. Define
639 * these as simple inline functions to avoid hair in drivers.
640 */
642 #define _PCI_NOP(o,s,t) \
643 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
644 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
645 #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
646 _PCI_NOP(o,word,u16 x) \
647 _PCI_NOP(o,dword,u32 x)
648 _PCI_NOP_ALL(read, *)
649 _PCI_NOP_ALL(write,)
651 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
652 { return NULL; }
654 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
655 { return NULL; }
658 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn)
659 {
660 return NULL;
661 }
662 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
663 { return NULL; }
665 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
666 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
667 { return NULL; }
669 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
670 { return NULL; }
672 #define pci_dev_present(ids) (0)
673 #define pci_dev_put(dev) do { } while (0)
675 static inline void pci_set_master(struct pci_dev *dev) { }
676 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
677 static inline void pci_disable_device(struct pci_dev *dev) { }
678 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
679 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
680 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
681 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
682 static inline void pci_unregister_driver(struct pci_driver *drv) { }
683 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
684 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
685 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
686 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
688 /* Power management related routines */
689 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
690 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
691 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
692 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
693 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
695 #define isa_bridge ((struct pci_dev *)NULL)
697 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
699 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
700 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
702 #endif /* CONFIG_PCI */
704 /* Include architecture-dependent settings and functions */
706 #include <asm/pci.h>
708 /* these helpers provide future and backwards compatibility
709 * for accessing popular PCI BAR info */
710 #define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
711 #define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
712 #define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
713 #define pci_resource_len(dev,bar) \
714 ((pci_resource_start((dev),(bar)) == 0 && \
715 pci_resource_end((dev),(bar)) == \
716 pci_resource_start((dev),(bar))) ? 0 : \
717 \
718 (pci_resource_end((dev),(bar)) - \
719 pci_resource_start((dev),(bar)) + 1))
721 /* Similar to the helpers above, these manipulate per-pci_dev
722 * driver-specific data. They are really just a wrapper around
723 * the generic device structure functions of these calls.
724 */
725 static inline void *pci_get_drvdata (struct pci_dev *pdev)
726 {
727 return dev_get_drvdata(&pdev->dev);
728 }
730 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
731 {
732 dev_set_drvdata(&pdev->dev, data);
733 }
735 /* If you want to know what to call your pci_dev, ask this function.
736 * Again, it's a wrapper around the generic device.
737 */
738 static inline char *pci_name(struct pci_dev *pdev)
739 {
740 return pdev->dev.bus_id;
741 }
744 /* Some archs don't want to expose struct resource to userland as-is
745 * in sysfs and /proc
746 */
747 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
748 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
749 const struct resource *rsrc, resource_size_t *start,
750 resource_size_t *end)
751 {
752 *start = rsrc->start;
753 *end = rsrc->end;
754 }
755 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
758 /*
759 * The world is not perfect and supplies us with broken PCI devices.
760 * For at least a part of these bugs we need a work-around, so both
761 * generic (drivers/pci/quirks.c) and per-architecture code can define
762 * fixup hooks to be called for particular buggy devices.
763 */
765 struct pci_fixup {
766 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
767 void (*hook)(struct pci_dev *dev);
768 };
770 enum pci_fixup_pass {
771 pci_fixup_early, /* Before probing BARs */
772 pci_fixup_header, /* After reading configuration header */
773 pci_fixup_final, /* Final phase of device fixups */
774 pci_fixup_enable, /* pci_enable_device() time */
775 };
777 /* Anonymous variables would be nice... */
778 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
779 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
780 __attribute__((__section__(#section))) = { vendor, device, hook };
781 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
782 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
783 vendor##device##hook, vendor, device, hook)
784 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
785 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
786 vendor##device##hook, vendor, device, hook)
787 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
788 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
789 vendor##device##hook, vendor, device, hook)
790 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
791 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
792 vendor##device##hook, vendor, device, hook)
795 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
797 extern int pci_pci_problems;
798 #define PCIPCI_FAIL 1
799 #define PCIPCI_TRITON 2
800 #define PCIPCI_NATOMA 4
801 #define PCIPCI_VIAETBF 8
802 #define PCIPCI_VSFX 16
803 #define PCIPCI_ALIMAGIK 32
805 #ifdef CONFIG_PCI_GUESTDEV
806 int pci_is_guestdev(struct pci_dev *dev);
807 #endif /* CONFIG_PCI_GUESTDEV */
809 #endif /* __KERNEL__ */
810 #endif /* LINUX_PCI_H */