ia64/linux-2.6.18-xen.hg

view drivers/serial/mpc52xx_uart.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * drivers/serial/mpc52xx_uart.c
3 *
4 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
5 *
6 * FIXME According to the usermanual the status bits in the status register
7 * are only updated when the peripherals access the FIFO and not when the
8 * CPU access them. So since we use this bits to know when we stop writing
9 * and reading, they may not be updated in-time and a race condition may
10 * exists. But I haven't be able to prove this and I don't care. But if
11 * any problem arises, it might worth checking. The TX/RX FIFO Stats
12 * registers should be used in addition.
13 * Update: Actually, they seem updated ... At least the bits we use.
14 *
15 *
16 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
17 *
18 * Some of the code has been inspired/copied from the 2.4 code written
19 * by Dale Farnsworth <dfarnsworth@mvista.com>.
20 *
21 * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
22 * Copyright (C) 2003 MontaVista, Software, Inc.
23 *
24 * This file is licensed under the terms of the GNU General Public License
25 * version 2. This program is licensed "as is" without any warranty of any
26 * kind, whether express or implied.
27 */
29 /* Platform device Usage :
30 *
31 * Since PSCs can have multiple function, the correct driver for each one
32 * is selected by calling mpc52xx_match_psc_function(...). The function
33 * handled by this driver is "uart".
34 *
35 * The driver init all necessary registers to place the PSC in uart mode without
36 * DCD. However, the pin multiplexing aren't changed and should be set either
37 * by the bootloader or in the platform init code.
38 *
39 * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
40 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
41 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
42 * fpr the console code : without this 1:1 mapping, at early boot time, when we
43 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
44 * will be mapped to.
45 */
47 #include <linux/platform_device.h>
48 #include <linux/module.h>
49 #include <linux/tty.h>
50 #include <linux/serial.h>
51 #include <linux/sysrq.h>
52 #include <linux/console.h>
54 #include <asm/delay.h>
55 #include <asm/io.h>
57 #include <asm/mpc52xx.h>
58 #include <asm/mpc52xx_psc.h>
60 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 #define SUPPORT_SYSRQ
62 #endif
64 #include <linux/serial_core.h>
67 /* We've been assigned a range on the "Low-density serial ports" major */
68 #define SERIAL_PSC_MAJOR 204
69 #define SERIAL_PSC_MINOR 148
72 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
75 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
76 /* Rem: - We use the read_status_mask as a shadow of
77 * psc->mpc52xx_psc_imr
78 * - It's important that is array is all zero on start as we
79 * use it to know if it's initialized or not ! If it's not sure
80 * it's cleared, then a memset(...,0,...) should be added to
81 * the console_init
82 */
84 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
87 /* Forward declaration of the interruption handling routine */
88 static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id,struct pt_regs *regs);
91 /* Simple macro to test if a port is console or not. This one is taken
92 * for serial_core.c and maybe should be moved to serial_core.h ? */
93 #ifdef CONFIG_SERIAL_CORE_CONSOLE
94 #define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
95 #else
96 #define uart_console(port) (0)
97 #endif
100 /* ======================================================================== */
101 /* UART operations */
102 /* ======================================================================== */
104 static unsigned int
105 mpc52xx_uart_tx_empty(struct uart_port *port)
106 {
107 int status = in_be16(&PSC(port)->mpc52xx_psc_status);
108 return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
109 }
111 static void
112 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
113 {
114 /* Not implemented */
115 }
117 static unsigned int
118 mpc52xx_uart_get_mctrl(struct uart_port *port)
119 {
120 /* Not implemented */
121 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
122 }
124 static void
125 mpc52xx_uart_stop_tx(struct uart_port *port)
126 {
127 /* port->lock taken by caller */
128 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
129 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
130 }
132 static void
133 mpc52xx_uart_start_tx(struct uart_port *port)
134 {
135 /* port->lock taken by caller */
136 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
137 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
138 }
140 static void
141 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
142 {
143 unsigned long flags;
144 spin_lock_irqsave(&port->lock, flags);
146 port->x_char = ch;
147 if (ch) {
148 /* Make sure tx interrupts are on */
149 /* Truly necessary ??? They should be anyway */
150 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
151 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
152 }
154 spin_unlock_irqrestore(&port->lock, flags);
155 }
157 static void
158 mpc52xx_uart_stop_rx(struct uart_port *port)
159 {
160 /* port->lock taken by caller */
161 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
162 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
163 }
165 static void
166 mpc52xx_uart_enable_ms(struct uart_port *port)
167 {
168 /* Not implemented */
169 }
171 static void
172 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
173 {
174 unsigned long flags;
175 spin_lock_irqsave(&port->lock, flags);
177 if ( ctl == -1 )
178 out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
179 else
180 out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
182 spin_unlock_irqrestore(&port->lock, flags);
183 }
185 static int
186 mpc52xx_uart_startup(struct uart_port *port)
187 {
188 struct mpc52xx_psc __iomem *psc = PSC(port);
189 int ret;
191 /* Request IRQ */
192 ret = request_irq(port->irq, mpc52xx_uart_int,
193 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
194 if (ret)
195 return ret;
197 /* Reset/activate the port, clear and enable interrupts */
198 out_8(&psc->command,MPC52xx_PSC_RST_RX);
199 out_8(&psc->command,MPC52xx_PSC_RST_TX);
201 out_be32(&psc->sicr,0); /* UART mode DCD ignored */
203 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
205 out_8(&psc->rfcntl, 0x00);
206 out_be16(&psc->rfalarm, 0x1ff);
207 out_8(&psc->tfcntl, 0x07);
208 out_be16(&psc->tfalarm, 0x80);
210 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
211 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
213 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
214 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
216 return 0;
217 }
219 static void
220 mpc52xx_uart_shutdown(struct uart_port *port)
221 {
222 struct mpc52xx_psc __iomem *psc = PSC(port);
224 /* Shut down the port, interrupt and all */
225 out_8(&psc->command,MPC52xx_PSC_RST_RX);
226 out_8(&psc->command,MPC52xx_PSC_RST_TX);
228 port->read_status_mask = 0;
229 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
231 /* Release interrupt */
232 free_irq(port->irq, port);
233 }
235 static void
236 mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
237 struct termios *old)
238 {
239 struct mpc52xx_psc __iomem *psc = PSC(port);
240 unsigned long flags;
241 unsigned char mr1, mr2;
242 unsigned short ctr;
243 unsigned int j, baud, quot;
245 /* Prepare what we're gonna write */
246 mr1 = 0;
248 switch (new->c_cflag & CSIZE) {
249 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
250 break;
251 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
252 break;
253 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
254 break;
255 case CS8:
256 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
257 }
259 if (new->c_cflag & PARENB) {
260 mr1 |= (new->c_cflag & PARODD) ?
261 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
262 } else
263 mr1 |= MPC52xx_PSC_MODE_PARNONE;
266 mr2 = 0;
268 if (new->c_cflag & CSTOPB)
269 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
270 else
271 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
272 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
273 MPC52xx_PSC_MODE_ONE_STOP;
276 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
277 quot = uart_get_divisor(port, baud);
278 ctr = quot & 0xffff;
280 /* Get the lock */
281 spin_lock_irqsave(&port->lock, flags);
283 /* Update the per-port timeout */
284 uart_update_timeout(port, new->c_cflag, baud);
286 /* Do our best to flush TX & RX, so we don't loose anything */
287 /* But we don't wait indefinitly ! */
288 j = 5000000; /* Maximum wait */
289 /* FIXME Can't receive chars since set_termios might be called at early
290 * boot for the console, all stuff is not yet ready to receive at that
291 * time and that just makes the kernel oops */
292 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
293 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
294 --j)
295 udelay(1);
297 if (!j)
298 printk( KERN_ERR "mpc52xx_uart.c: "
299 "Unable to flush RX & TX fifos in-time in set_termios."
300 "Some chars may have been lost.\n" );
302 /* Reset the TX & RX */
303 out_8(&psc->command,MPC52xx_PSC_RST_RX);
304 out_8(&psc->command,MPC52xx_PSC_RST_TX);
306 /* Send new mode settings */
307 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
308 out_8(&psc->mode,mr1);
309 out_8(&psc->mode,mr2);
310 out_8(&psc->ctur,ctr >> 8);
311 out_8(&psc->ctlr,ctr & 0xff);
313 /* Reenable TX & RX */
314 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
315 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
317 /* We're all set, release the lock */
318 spin_unlock_irqrestore(&port->lock, flags);
319 }
321 static const char *
322 mpc52xx_uart_type(struct uart_port *port)
323 {
324 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
325 }
327 static void
328 mpc52xx_uart_release_port(struct uart_port *port)
329 {
330 if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
331 iounmap(port->membase);
332 port->membase = NULL;
333 }
335 release_mem_region(port->mapbase, MPC52xx_PSC_SIZE);
336 }
338 static int
339 mpc52xx_uart_request_port(struct uart_port *port)
340 {
341 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
342 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
344 if (!port->membase)
345 return -EINVAL;
347 return request_mem_region(port->mapbase, MPC52xx_PSC_SIZE,
348 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
349 }
351 static void
352 mpc52xx_uart_config_port(struct uart_port *port, int flags)
353 {
354 if ( (flags & UART_CONFIG_TYPE) &&
355 (mpc52xx_uart_request_port(port) == 0) )
356 port->type = PORT_MPC52xx;
357 }
359 static int
360 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
361 {
362 if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
363 return -EINVAL;
365 if ( (ser->irq != port->irq) ||
366 (ser->io_type != SERIAL_IO_MEM) ||
367 (ser->baud_base != port->uartclk) ||
368 (ser->iomem_base != (void*)port->mapbase) ||
369 (ser->hub6 != 0 ) )
370 return -EINVAL;
372 return 0;
373 }
376 static struct uart_ops mpc52xx_uart_ops = {
377 .tx_empty = mpc52xx_uart_tx_empty,
378 .set_mctrl = mpc52xx_uart_set_mctrl,
379 .get_mctrl = mpc52xx_uart_get_mctrl,
380 .stop_tx = mpc52xx_uart_stop_tx,
381 .start_tx = mpc52xx_uart_start_tx,
382 .send_xchar = mpc52xx_uart_send_xchar,
383 .stop_rx = mpc52xx_uart_stop_rx,
384 .enable_ms = mpc52xx_uart_enable_ms,
385 .break_ctl = mpc52xx_uart_break_ctl,
386 .startup = mpc52xx_uart_startup,
387 .shutdown = mpc52xx_uart_shutdown,
388 .set_termios = mpc52xx_uart_set_termios,
389 /* .pm = mpc52xx_uart_pm, Not supported yet */
390 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
391 .type = mpc52xx_uart_type,
392 .release_port = mpc52xx_uart_release_port,
393 .request_port = mpc52xx_uart_request_port,
394 .config_port = mpc52xx_uart_config_port,
395 .verify_port = mpc52xx_uart_verify_port
396 };
399 /* ======================================================================== */
400 /* Interrupt handling */
401 /* ======================================================================== */
403 static inline int
404 mpc52xx_uart_int_rx_chars(struct uart_port *port, struct pt_regs *regs)
405 {
406 struct tty_struct *tty = port->info->tty;
407 unsigned char ch, flag;
408 unsigned short status;
410 /* While we can read, do so ! */
411 while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
412 MPC52xx_PSC_SR_RXRDY) {
414 /* Get the char */
415 ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
417 /* Handle sysreq char */
418 #ifdef SUPPORT_SYSRQ
419 if (uart_handle_sysrq_char(port, ch, regs)) {
420 port->sysrq = 0;
421 continue;
422 }
423 #endif
425 /* Store it */
427 flag = TTY_NORMAL;
428 port->icount.rx++;
430 if ( status & (MPC52xx_PSC_SR_PE |
431 MPC52xx_PSC_SR_FE |
432 MPC52xx_PSC_SR_RB) ) {
434 if (status & MPC52xx_PSC_SR_RB) {
435 flag = TTY_BREAK;
436 uart_handle_break(port);
437 } else if (status & MPC52xx_PSC_SR_PE)
438 flag = TTY_PARITY;
439 else if (status & MPC52xx_PSC_SR_FE)
440 flag = TTY_FRAME;
442 /* Clear error condition */
443 out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
445 }
446 tty_insert_flip_char(tty, ch, flag);
447 if (status & MPC52xx_PSC_SR_OE) {
448 /*
449 * Overrun is special, since it's
450 * reported immediately, and doesn't
451 * affect the current character
452 */
453 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
454 }
455 }
457 tty_flip_buffer_push(tty);
459 return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
460 }
462 static inline int
463 mpc52xx_uart_int_tx_chars(struct uart_port *port)
464 {
465 struct circ_buf *xmit = &port->info->xmit;
467 /* Process out of band chars */
468 if (port->x_char) {
469 out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
470 port->icount.tx++;
471 port->x_char = 0;
472 return 1;
473 }
475 /* Nothing to do ? */
476 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
477 mpc52xx_uart_stop_tx(port);
478 return 0;
479 }
481 /* Send chars */
482 while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
483 out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
484 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
485 port->icount.tx++;
486 if (uart_circ_empty(xmit))
487 break;
488 }
490 /* Wake up */
491 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
492 uart_write_wakeup(port);
494 /* Maybe we're done after all */
495 if (uart_circ_empty(xmit)) {
496 mpc52xx_uart_stop_tx(port);
497 return 0;
498 }
500 return 1;
501 }
503 static irqreturn_t
504 mpc52xx_uart_int(int irq, void *dev_id, struct pt_regs *regs)
505 {
506 struct uart_port *port = (struct uart_port *) dev_id;
507 unsigned long pass = ISR_PASS_LIMIT;
508 unsigned int keepgoing;
509 unsigned short status;
511 if ( irq != port->irq ) {
512 printk( KERN_WARNING
513 "mpc52xx_uart_int : " \
514 "Received wrong int %d. Waiting for %d\n",
515 irq, port->irq);
516 return IRQ_NONE;
517 }
519 spin_lock(&port->lock);
521 /* While we have stuff to do, we continue */
522 do {
523 /* If we don't find anything to do, we stop */
524 keepgoing = 0;
526 /* Read status */
527 status = in_be16(&PSC(port)->mpc52xx_psc_isr);
528 status &= port->read_status_mask;
530 /* Do we need to receive chars ? */
531 /* For this RX interrupts must be on and some chars waiting */
532 if ( status & MPC52xx_PSC_IMR_RXRDY )
533 keepgoing |= mpc52xx_uart_int_rx_chars(port, regs);
535 /* Do we need to send chars ? */
536 /* For this, TX must be ready and TX interrupt enabled */
537 if ( status & MPC52xx_PSC_IMR_TXRDY )
538 keepgoing |= mpc52xx_uart_int_tx_chars(port);
540 /* Limit number of iteration */
541 if ( !(--pass) )
542 keepgoing = 0;
544 } while (keepgoing);
546 spin_unlock(&port->lock);
548 return IRQ_HANDLED;
549 }
552 /* ======================================================================== */
553 /* Console ( if applicable ) */
554 /* ======================================================================== */
556 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
558 static void __init
559 mpc52xx_console_get_options(struct uart_port *port,
560 int *baud, int *parity, int *bits, int *flow)
561 {
562 struct mpc52xx_psc __iomem *psc = PSC(port);
563 unsigned char mr1;
565 /* Read the mode registers */
566 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
567 mr1 = in_8(&psc->mode);
569 /* CT{U,L}R are write-only ! */
570 *baud = __res.bi_baudrate ?
571 __res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
573 /* Parse them */
574 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
575 case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
576 case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
577 case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
578 case MPC52xx_PSC_MODE_8_BITS:
579 default: *bits = 8;
580 }
582 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
583 *parity = 'n';
584 else
585 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
586 }
588 static void
589 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
590 {
591 struct uart_port *port = &mpc52xx_uart_ports[co->index];
592 struct mpc52xx_psc __iomem *psc = PSC(port);
593 unsigned int i, j;
595 /* Disable interrupts */
596 out_be16(&psc->mpc52xx_psc_imr, 0);
598 /* Wait the TX buffer to be empty */
599 j = 5000000; /* Maximum wait */
600 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
601 --j)
602 udelay(1);
604 /* Write all the chars */
605 for (i = 0; i < count; i++, s++) {
606 /* Line return handling */
607 if (*s == '\n')
608 out_8(&psc->mpc52xx_psc_buffer_8, '\r');
610 /* Send the char */
611 out_8(&psc->mpc52xx_psc_buffer_8, *s);
613 /* Wait the TX buffer to be empty */
614 j = 20000; /* Maximum wait */
615 while (!(in_be16(&psc->mpc52xx_psc_status) &
616 MPC52xx_PSC_SR_TXEMP) && --j)
617 udelay(1);
618 }
620 /* Restore interrupt state */
621 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
622 }
624 static int __init
625 mpc52xx_console_setup(struct console *co, char *options)
626 {
627 struct uart_port *port = &mpc52xx_uart_ports[co->index];
629 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
630 int bits = 8;
631 int parity = 'n';
632 int flow = 'n';
634 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
635 return -EINVAL;
637 /* Basic port init. Needed since we use some uart_??? func before
638 * real init for early access */
639 spin_lock_init(&port->lock);
640 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
641 port->ops = &mpc52xx_uart_ops;
642 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
644 /* We ioremap ourself */
645 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
646 if (port->membase == NULL)
647 return -EINVAL;
649 /* Setup the port parameters accoding to options */
650 if (options)
651 uart_parse_options(options, &baud, &parity, &bits, &flow);
652 else
653 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
655 return uart_set_options(port, co, baud, parity, bits, flow);
656 }
659 static struct uart_driver mpc52xx_uart_driver;
661 static struct console mpc52xx_console = {
662 .name = "ttyPSC",
663 .write = mpc52xx_console_write,
664 .device = uart_console_device,
665 .setup = mpc52xx_console_setup,
666 .flags = CON_PRINTBUFFER,
667 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
668 .data = &mpc52xx_uart_driver,
669 };
672 static int __init
673 mpc52xx_console_init(void)
674 {
675 register_console(&mpc52xx_console);
676 return 0;
677 }
679 console_initcall(mpc52xx_console_init);
681 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
682 #else
683 #define MPC52xx_PSC_CONSOLE NULL
684 #endif
687 /* ======================================================================== */
688 /* UART Driver */
689 /* ======================================================================== */
691 static struct uart_driver mpc52xx_uart_driver = {
692 .owner = THIS_MODULE,
693 .driver_name = "mpc52xx_psc_uart",
694 .dev_name = "ttyPSC",
695 .major = SERIAL_PSC_MAJOR,
696 .minor = SERIAL_PSC_MINOR,
697 .nr = MPC52xx_PSC_MAXNUM,
698 .cons = MPC52xx_PSC_CONSOLE,
699 };
702 /* ======================================================================== */
703 /* Platform Driver */
704 /* ======================================================================== */
706 static int __devinit
707 mpc52xx_uart_probe(struct platform_device *dev)
708 {
709 struct resource *res = dev->resource;
711 struct uart_port *port = NULL;
712 int i, idx, ret;
714 /* Check validity & presence */
715 idx = dev->id;
716 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
717 return -EINVAL;
719 if (!mpc52xx_match_psc_function(idx,"uart"))
720 return -ENODEV;
722 /* Init the port structure */
723 port = &mpc52xx_uart_ports[idx];
725 memset(port, 0x00, sizeof(struct uart_port));
727 spin_lock_init(&port->lock);
728 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
729 port->fifosize = 512;
730 port->iotype = UPIO_MEM;
731 port->flags = UPF_BOOT_AUTOCONF |
732 ( uart_console(port) ? 0 : UPF_IOREMAP );
733 port->line = idx;
734 port->ops = &mpc52xx_uart_ops;
736 /* Search for IRQ and mapbase */
737 for (i=0 ; i<dev->num_resources ; i++, res++) {
738 if (res->flags & IORESOURCE_MEM)
739 port->mapbase = res->start;
740 else if (res->flags & IORESOURCE_IRQ)
741 port->irq = res->start;
742 }
743 if (!port->irq || !port->mapbase)
744 return -EINVAL;
746 /* Add the port to the uart sub-system */
747 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
748 if (!ret)
749 platform_set_drvdata(dev, (void*)port);
751 return ret;
752 }
754 static int
755 mpc52xx_uart_remove(struct platform_device *dev)
756 {
757 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
759 platform_set_drvdata(dev, NULL);
761 if (port)
762 uart_remove_one_port(&mpc52xx_uart_driver, port);
764 return 0;
765 }
767 #ifdef CONFIG_PM
768 static int
769 mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
770 {
771 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
773 if (sport)
774 uart_suspend_port(&mpc52xx_uart_driver, port);
776 return 0;
777 }
779 static int
780 mpc52xx_uart_resume(struct platform_device *dev)
781 {
782 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
784 if (port)
785 uart_resume_port(&mpc52xx_uart_driver, port);
787 return 0;
788 }
789 #endif
791 static struct platform_driver mpc52xx_uart_platform_driver = {
792 .probe = mpc52xx_uart_probe,
793 .remove = mpc52xx_uart_remove,
794 #ifdef CONFIG_PM
795 .suspend = mpc52xx_uart_suspend,
796 .resume = mpc52xx_uart_resume,
797 #endif
798 .driver = {
799 .name = "mpc52xx-psc",
800 },
801 };
804 /* ======================================================================== */
805 /* Module */
806 /* ======================================================================== */
808 static int __init
809 mpc52xx_uart_init(void)
810 {
811 int ret;
813 printk(KERN_INFO "Serial: MPC52xx PSC driver\n");
815 ret = uart_register_driver(&mpc52xx_uart_driver);
816 if (ret == 0) {
817 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
818 if (ret)
819 uart_unregister_driver(&mpc52xx_uart_driver);
820 }
822 return ret;
823 }
825 static void __exit
826 mpc52xx_uart_exit(void)
827 {
828 platform_driver_unregister(&mpc52xx_uart_platform_driver);
829 uart_unregister_driver(&mpc52xx_uart_driver);
830 }
833 module_init(mpc52xx_uart_init);
834 module_exit(mpc52xx_uart_exit);
836 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
837 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
838 MODULE_LICENSE("GPL");