ia64/linux-2.6.18-xen.hg

view drivers/serial/at91_serial.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * linux/drivers/char/at91_serial.c
3 *
4 * Driver for Atmel AT91RM9200 Serial ports
5 * Copyright (C) 2003 Rick Bronson
6 *
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <asm/io.h>
39 #include <asm/arch/at91rm9200_usart.h>
40 #include <asm/arch/at91rm9200_pdc.h>
41 #include <asm/mach/serial_at91.h>
42 #include <asm/arch/board.h>
43 #include <asm/arch/system.h>
44 #include <asm/arch/gpio.h>
46 #if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
47 #define SUPPORT_SYSRQ
48 #endif
50 #include <linux/serial_core.h>
52 #ifdef CONFIG_SERIAL_AT91_TTYAT
54 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
55 * should coexist with the 8250 driver, such as if we have an external 16C550
56 * UART. */
57 #define SERIAL_AT91_MAJOR 204
58 #define MINOR_START 154
59 #define AT91_DEVICENAME "ttyAT"
61 #else
63 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
64 * name, but it is legally reserved for the 8250 driver. */
65 #define SERIAL_AT91_MAJOR TTY_MAJOR
66 #define MINOR_START 64
67 #define AT91_DEVICENAME "ttyS"
69 #endif
71 #define AT91_ISR_PASS_LIMIT 256
73 #define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR)
74 #define UART_GET_MR(port) readl((port)->membase + AT91_US_MR)
75 #define UART_PUT_MR(port,v) writel(v, (port)->membase + AT91_US_MR)
76 #define UART_PUT_IER(port,v) writel(v, (port)->membase + AT91_US_IER)
77 #define UART_PUT_IDR(port,v) writel(v, (port)->membase + AT91_US_IDR)
78 #define UART_GET_IMR(port) readl((port)->membase + AT91_US_IMR)
79 #define UART_GET_CSR(port) readl((port)->membase + AT91_US_CSR)
80 #define UART_GET_CHAR(port) readl((port)->membase + AT91_US_RHR)
81 #define UART_PUT_CHAR(port,v) writel(v, (port)->membase + AT91_US_THR)
82 #define UART_GET_BRGR(port) readl((port)->membase + AT91_US_BRGR)
83 #define UART_PUT_BRGR(port,v) writel(v, (port)->membase + AT91_US_BRGR)
84 #define UART_PUT_RTOR(port,v) writel(v, (port)->membase + AT91_US_RTOR)
86 // #define UART_GET_CR(port) readl((port)->membase + AT91_US_CR) // is write-only
88 /* PDC registers */
89 #define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR)
90 #define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR)
92 #define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR)
93 #define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR)
94 #define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR)
95 #define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR)
96 #define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR)
98 #define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR)
99 #define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR)
100 //#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR)
101 //#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR)
103 static int (*at91_open)(struct uart_port *);
104 static void (*at91_close)(struct uart_port *);
106 /*
107 * We wrap our port structure around the generic uart_port.
108 */
109 struct at91_uart_port {
110 struct uart_port uart; /* uart */
111 struct clk *clk; /* uart clock */
112 unsigned short suspended; /* is port suspended? */
113 };
115 static struct at91_uart_port at91_ports[AT91_NR_UART];
117 #ifdef SUPPORT_SYSRQ
118 static struct console at91_console;
119 #endif
121 /*
122 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
123 */
124 static u_int at91_tx_empty(struct uart_port *port)
125 {
126 return (UART_GET_CSR(port) & AT91_US_TXEMPTY) ? TIOCSER_TEMT : 0;
127 }
129 /*
130 * Set state of the modem control output lines
131 */
132 static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
133 {
134 unsigned int control = 0;
135 unsigned int mode;
137 if (arch_identify() == ARCH_ID_AT91RM9200) {
138 /*
139 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
140 * We need to drive the pin manually.
141 */
142 if (port->mapbase == AT91_BASE_US0) {
143 if (mctrl & TIOCM_RTS)
144 at91_set_gpio_value(AT91_PIN_PA21, 0);
145 else
146 at91_set_gpio_value(AT91_PIN_PA21, 1);
147 }
148 }
150 if (mctrl & TIOCM_RTS)
151 control |= AT91_US_RTSEN;
152 else
153 control |= AT91_US_RTSDIS;
155 if (mctrl & TIOCM_DTR)
156 control |= AT91_US_DTREN;
157 else
158 control |= AT91_US_DTRDIS;
160 UART_PUT_CR(port, control);
162 /* Local loopback mode? */
163 mode = UART_GET_MR(port) & ~AT91_US_CHMODE;
164 if (mctrl & TIOCM_LOOP)
165 mode |= AT91_US_CHMODE_LOC_LOOP;
166 else
167 mode |= AT91_US_CHMODE_NORMAL;
168 UART_PUT_MR(port, mode);
169 }
171 /*
172 * Get state of the modem control input lines
173 */
174 static u_int at91_get_mctrl(struct uart_port *port)
175 {
176 unsigned int status, ret = 0;
178 status = UART_GET_CSR(port);
180 /*
181 * The control signals are active low.
182 */
183 if (!(status & AT91_US_DCD))
184 ret |= TIOCM_CD;
185 if (!(status & AT91_US_CTS))
186 ret |= TIOCM_CTS;
187 if (!(status & AT91_US_DSR))
188 ret |= TIOCM_DSR;
189 if (!(status & AT91_US_RI))
190 ret |= TIOCM_RI;
192 return ret;
193 }
195 /*
196 * Stop transmitting.
197 */
198 static void at91_stop_tx(struct uart_port *port)
199 {
200 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
202 UART_PUT_IDR(port, AT91_US_TXRDY);
203 }
205 /*
206 * Start transmitting.
207 */
208 static void at91_start_tx(struct uart_port *port)
209 {
210 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
212 UART_PUT_IER(port, AT91_US_TXRDY);
213 }
215 /*
216 * Stop receiving - port is in process of being closed.
217 */
218 static void at91_stop_rx(struct uart_port *port)
219 {
220 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
222 UART_PUT_IDR(port, AT91_US_RXRDY);
223 }
225 /*
226 * Enable modem status interrupts
227 */
228 static void at91_enable_ms(struct uart_port *port)
229 {
230 UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
231 }
233 /*
234 * Control the transmission of a break signal
235 */
236 static void at91_break_ctl(struct uart_port *port, int break_state)
237 {
238 if (break_state != 0)
239 UART_PUT_CR(port, AT91_US_STTBRK); /* start break */
240 else
241 UART_PUT_CR(port, AT91_US_STPBRK); /* stop break */
242 }
244 /*
245 * Characters received (called from interrupt handler)
246 */
247 static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
248 {
249 struct tty_struct *tty = port->info->tty;
250 unsigned int status, ch, flg;
252 status = UART_GET_CSR(port);
253 while (status & AT91_US_RXRDY) {
254 ch = UART_GET_CHAR(port);
256 port->icount.rx++;
258 flg = TTY_NORMAL;
260 /*
261 * note that the error handling code is
262 * out of the main execution path
263 */
264 if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE | AT91_US_RXBRK))) {
265 UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */
266 if (status & AT91_US_RXBRK) {
267 status &= ~(AT91_US_PARE | AT91_US_FRAME); /* ignore side-effect */
268 port->icount.brk++;
269 if (uart_handle_break(port))
270 goto ignore_char;
271 }
272 if (status & AT91_US_PARE)
273 port->icount.parity++;
274 if (status & AT91_US_FRAME)
275 port->icount.frame++;
276 if (status & AT91_US_OVRE)
277 port->icount.overrun++;
279 status &= port->read_status_mask;
281 if (status & AT91_US_RXBRK)
282 flg = TTY_BREAK;
283 else if (status & AT91_US_PARE)
284 flg = TTY_PARITY;
285 else if (status & AT91_US_FRAME)
286 flg = TTY_FRAME;
287 }
289 if (uart_handle_sysrq_char(port, ch, regs))
290 goto ignore_char;
292 uart_insert_char(port, status, AT91_US_OVRE, ch, flg);
294 ignore_char:
295 status = UART_GET_CSR(port);
296 }
298 tty_flip_buffer_push(tty);
299 }
301 /*
302 * Transmit characters (called from interrupt handler)
303 */
304 static void at91_tx_chars(struct uart_port *port)
305 {
306 struct circ_buf *xmit = &port->info->xmit;
308 if (port->x_char) {
309 UART_PUT_CHAR(port, port->x_char);
310 port->icount.tx++;
311 port->x_char = 0;
312 return;
313 }
314 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
315 at91_stop_tx(port);
316 return;
317 }
319 while (UART_GET_CSR(port) & AT91_US_TXRDY) {
320 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
321 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
322 port->icount.tx++;
323 if (uart_circ_empty(xmit))
324 break;
325 }
327 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
328 uart_write_wakeup(port);
330 if (uart_circ_empty(xmit))
331 at91_stop_tx(port);
332 }
334 /*
335 * Interrupt handler
336 */
337 static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
338 {
339 struct uart_port *port = dev_id;
340 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
341 unsigned int status, pending, pass_counter = 0;
343 status = UART_GET_CSR(port);
344 pending = status & UART_GET_IMR(port);
345 while (pending) {
346 /* Interrupt receive */
347 if (pending & AT91_US_RXRDY)
348 at91_rx_chars(port, regs);
350 // TODO: All reads to CSR will clear these interrupts!
351 if (pending & AT91_US_RIIC) port->icount.rng++;
352 if (pending & AT91_US_DSRIC) port->icount.dsr++;
353 if (pending & AT91_US_DCDIC)
354 uart_handle_dcd_change(port, !(status & AT91_US_DCD));
355 if (pending & AT91_US_CTSIC)
356 uart_handle_cts_change(port, !(status & AT91_US_CTS));
357 if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC))
358 wake_up_interruptible(&port->info->delta_msr_wait);
360 /* Interrupt transmit */
361 if (pending & AT91_US_TXRDY)
362 at91_tx_chars(port);
364 if (pass_counter++ > AT91_ISR_PASS_LIMIT)
365 break;
367 status = UART_GET_CSR(port);
368 pending = status & UART_GET_IMR(port);
369 }
370 return IRQ_HANDLED;
371 }
373 /*
374 * Perform initialization and enable port for reception
375 */
376 static int at91_startup(struct uart_port *port)
377 {
378 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
379 int retval;
381 /*
382 * Ensure that no interrupts are enabled otherwise when
383 * request_irq() is called we could get stuck trying to
384 * handle an unexpected interrupt
385 */
386 UART_PUT_IDR(port, -1);
388 /*
389 * Allocate the IRQ
390 */
391 retval = request_irq(port->irq, at91_interrupt, IRQF_SHARED, "at91_serial", port);
392 if (retval) {
393 printk("at91_serial: at91_startup - Can't get irq\n");
394 return retval;
395 }
397 /*
398 * If there is a specific "open" function (to register
399 * control line interrupts)
400 */
401 if (at91_open) {
402 retval = at91_open(port);
403 if (retval) {
404 free_irq(port->irq, port);
405 return retval;
406 }
407 }
409 /*
410 * Finally, enable the serial port
411 */
412 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
413 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */
415 UART_PUT_IER(port, AT91_US_RXRDY); /* enable receive only */
417 return 0;
418 }
420 /*
421 * Disable the port
422 */
423 static void at91_shutdown(struct uart_port *port)
424 {
425 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
427 /*
428 * Disable all interrupts, port and break condition.
429 */
430 UART_PUT_CR(port, AT91_US_RSTSTA);
431 UART_PUT_IDR(port, -1);
433 /*
434 * Free the interrupt
435 */
436 free_irq(port->irq, port);
438 /*
439 * If there is a specific "close" function (to unregister
440 * control line interrupts)
441 */
442 if (at91_close)
443 at91_close(port);
444 }
446 /*
447 * Power / Clock management.
448 */
449 static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
450 {
451 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
453 switch (state) {
454 case 0:
455 /*
456 * Enable the peripheral clock for this serial port.
457 * This is called on uart_open() or a resume event.
458 */
459 clk_enable(at91_port->clk);
460 break;
461 case 3:
462 /*
463 * Disable the peripheral clock for this serial port.
464 * This is called on uart_close() or a suspend event.
465 */
466 clk_disable(at91_port->clk);
467 break;
468 default:
469 printk(KERN_ERR "at91_serial: unknown pm %d\n", state);
470 }
471 }
473 /*
474 * Change the port parameters
475 */
476 static void at91_set_termios(struct uart_port *port, struct termios * termios, struct termios * old)
477 {
478 unsigned long flags;
479 unsigned int mode, imr, quot, baud;
481 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
482 quot = uart_get_divisor(port, baud);
484 /* Get current mode register */
485 mode = UART_GET_MR(port) & ~(AT91_US_CHRL | AT91_US_NBSTOP | AT91_US_PAR);
487 /* byte size */
488 switch (termios->c_cflag & CSIZE) {
489 case CS5:
490 mode |= AT91_US_CHRL_5;
491 break;
492 case CS6:
493 mode |= AT91_US_CHRL_6;
494 break;
495 case CS7:
496 mode |= AT91_US_CHRL_7;
497 break;
498 default:
499 mode |= AT91_US_CHRL_8;
500 break;
501 }
503 /* stop bits */
504 if (termios->c_cflag & CSTOPB)
505 mode |= AT91_US_NBSTOP_2;
507 /* parity */
508 if (termios->c_cflag & PARENB) {
509 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
510 if (termios->c_cflag & PARODD)
511 mode |= AT91_US_PAR_MARK;
512 else
513 mode |= AT91_US_PAR_SPACE;
514 }
515 else if (termios->c_cflag & PARODD)
516 mode |= AT91_US_PAR_ODD;
517 else
518 mode |= AT91_US_PAR_EVEN;
519 }
520 else
521 mode |= AT91_US_PAR_NONE;
523 spin_lock_irqsave(&port->lock, flags);
525 port->read_status_mask = AT91_US_OVRE;
526 if (termios->c_iflag & INPCK)
527 port->read_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
528 if (termios->c_iflag & (BRKINT | PARMRK))
529 port->read_status_mask |= AT91_US_RXBRK;
531 /*
532 * Characters to ignore
533 */
534 port->ignore_status_mask = 0;
535 if (termios->c_iflag & IGNPAR)
536 port->ignore_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
537 if (termios->c_iflag & IGNBRK) {
538 port->ignore_status_mask |= AT91_US_RXBRK;
539 /*
540 * If we're ignoring parity and break indicators,
541 * ignore overruns too (for real raw support).
542 */
543 if (termios->c_iflag & IGNPAR)
544 port->ignore_status_mask |= AT91_US_OVRE;
545 }
547 // TODO: Ignore all characters if CREAD is set.
549 /* update the per-port timeout */
550 uart_update_timeout(port, termios->c_cflag, baud);
552 /* disable interrupts and drain transmitter */
553 imr = UART_GET_IMR(port); /* get interrupt mask */
554 UART_PUT_IDR(port, -1); /* disable all interrupts */
555 while (!(UART_GET_CSR(port) & AT91_US_TXEMPTY)) { barrier(); }
557 /* disable receiver and transmitter */
558 UART_PUT_CR(port, AT91_US_TXDIS | AT91_US_RXDIS);
560 /* set the parity, stop bits and data size */
561 UART_PUT_MR(port, mode);
563 /* set the baud rate */
564 UART_PUT_BRGR(port, quot);
565 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
566 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
568 /* restore interrupts */
569 UART_PUT_IER(port, imr);
571 /* CTS flow-control and modem-status interrupts */
572 if (UART_ENABLE_MS(port, termios->c_cflag))
573 port->ops->enable_ms(port);
575 spin_unlock_irqrestore(&port->lock, flags);
576 }
578 /*
579 * Return string describing the specified port
580 */
581 static const char *at91_type(struct uart_port *port)
582 {
583 return (port->type == PORT_AT91) ? "AT91_SERIAL" : NULL;
584 }
586 /*
587 * Release the memory region(s) being used by 'port'.
588 */
589 static void at91_release_port(struct uart_port *port)
590 {
591 struct platform_device *pdev = to_platform_device(port->dev);
592 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
594 release_mem_region(port->mapbase, size);
596 if (port->flags & UPF_IOREMAP) {
597 iounmap(port->membase);
598 port->membase = NULL;
599 }
600 }
602 /*
603 * Request the memory region(s) being used by 'port'.
604 */
605 static int at91_request_port(struct uart_port *port)
606 {
607 struct platform_device *pdev = to_platform_device(port->dev);
608 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
610 if (!request_mem_region(port->mapbase, size, "at91_serial"))
611 return -EBUSY;
613 if (port->flags & UPF_IOREMAP) {
614 port->membase = ioremap(port->mapbase, size);
615 if (port->membase == NULL) {
616 release_mem_region(port->mapbase, size);
617 return -ENOMEM;
618 }
619 }
621 return 0;
622 }
624 /*
625 * Configure/autoconfigure the port.
626 */
627 static void at91_config_port(struct uart_port *port, int flags)
628 {
629 if (flags & UART_CONFIG_TYPE) {
630 port->type = PORT_AT91;
631 at91_request_port(port);
632 }
633 }
635 /*
636 * Verify the new serial_struct (for TIOCSSERIAL).
637 */
638 static int at91_verify_port(struct uart_port *port, struct serial_struct *ser)
639 {
640 int ret = 0;
641 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91)
642 ret = -EINVAL;
643 if (port->irq != ser->irq)
644 ret = -EINVAL;
645 if (ser->io_type != SERIAL_IO_MEM)
646 ret = -EINVAL;
647 if (port->uartclk / 16 != ser->baud_base)
648 ret = -EINVAL;
649 if ((void *)port->mapbase != ser->iomem_base)
650 ret = -EINVAL;
651 if (port->iobase != ser->port)
652 ret = -EINVAL;
653 if (ser->hub6 != 0)
654 ret = -EINVAL;
655 return ret;
656 }
658 static struct uart_ops at91_pops = {
659 .tx_empty = at91_tx_empty,
660 .set_mctrl = at91_set_mctrl,
661 .get_mctrl = at91_get_mctrl,
662 .stop_tx = at91_stop_tx,
663 .start_tx = at91_start_tx,
664 .stop_rx = at91_stop_rx,
665 .enable_ms = at91_enable_ms,
666 .break_ctl = at91_break_ctl,
667 .startup = at91_startup,
668 .shutdown = at91_shutdown,
669 .set_termios = at91_set_termios,
670 .type = at91_type,
671 .release_port = at91_release_port,
672 .request_port = at91_request_port,
673 .config_port = at91_config_port,
674 .verify_port = at91_verify_port,
675 .pm = at91_serial_pm,
676 };
678 /*
679 * Configure the port from the platform device resource info.
680 */
681 static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct platform_device *pdev)
682 {
683 struct uart_port *port = &at91_port->uart;
684 struct at91_uart_data *data = pdev->dev.platform_data;
686 port->iotype = UPIO_MEM;
687 port->flags = UPF_BOOT_AUTOCONF;
688 port->ops = &at91_pops;
689 port->fifosize = 1;
690 port->line = pdev->id;
691 port->dev = &pdev->dev;
693 port->mapbase = pdev->resource[0].start;
694 port->irq = pdev->resource[1].start;
696 if (port->mapbase == AT91_VA_BASE_SYS + AT91_DBGU) /* Part of system perpherals - already mapped */
697 port->membase = (void __iomem *) port->mapbase;
698 else {
699 port->flags |= UPF_IOREMAP;
700 port->membase = NULL;
701 }
703 if (!at91_port->clk) { /* for console, the clock could already be configured */
704 at91_port->clk = clk_get(&pdev->dev, "usart");
705 clk_enable(at91_port->clk);
706 port->uartclk = clk_get_rate(at91_port->clk);
707 }
708 }
710 /*
711 * Register board-specific modem-control line handlers.
712 */
713 void __init at91_register_uart_fns(struct at91_port_fns *fns)
714 {
715 if (fns->enable_ms)
716 at91_pops.enable_ms = fns->enable_ms;
717 if (fns->get_mctrl)
718 at91_pops.get_mctrl = fns->get_mctrl;
719 if (fns->set_mctrl)
720 at91_pops.set_mctrl = fns->set_mctrl;
721 at91_open = fns->open;
722 at91_close = fns->close;
723 at91_pops.pm = fns->pm;
724 at91_pops.set_wake = fns->set_wake;
725 }
728 #ifdef CONFIG_SERIAL_AT91_CONSOLE
729 static void at91_console_putchar(struct uart_port *port, int ch)
730 {
731 while (!(UART_GET_CSR(port) & AT91_US_TXRDY))
732 barrier();
733 UART_PUT_CHAR(port, ch);
734 }
736 /*
737 * Interrupts are disabled on entering
738 */
739 static void at91_console_write(struct console *co, const char *s, u_int count)
740 {
741 struct uart_port *port = &at91_ports[co->index].uart;
742 unsigned int status, imr;
744 /*
745 * First, save IMR and then disable interrupts
746 */
747 imr = UART_GET_IMR(port); /* get interrupt mask */
748 UART_PUT_IDR(port, AT91_US_RXRDY | AT91_US_TXRDY);
750 uart_console_write(port, s, count, at91_console_putchar);
752 /*
753 * Finally, wait for transmitter to become empty
754 * and restore IMR
755 */
756 do {
757 status = UART_GET_CSR(port);
758 } while (!(status & AT91_US_TXRDY));
759 UART_PUT_IER(port, imr); /* set interrupts back the way they were */
760 }
762 /*
763 * If the port was already initialised (eg, by a boot loader), try to determine
764 * the current setup.
765 */
766 static void __init at91_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
767 {
768 unsigned int mr, quot;
770 // TODO: CR is a write-only register
771 // unsigned int cr;
772 //
773 // cr = UART_GET_CR(port) & (AT91_US_RXEN | AT91_US_TXEN);
774 // if (cr == (AT91_US_RXEN | AT91_US_TXEN)) {
775 // /* ok, the port was enabled */
776 // }
778 mr = UART_GET_MR(port) & AT91_US_CHRL;
779 if (mr == AT91_US_CHRL_8)
780 *bits = 8;
781 else
782 *bits = 7;
784 mr = UART_GET_MR(port) & AT91_US_PAR;
785 if (mr == AT91_US_PAR_EVEN)
786 *parity = 'e';
787 else if (mr == AT91_US_PAR_ODD)
788 *parity = 'o';
790 quot = UART_GET_BRGR(port);
791 *baud = port->uartclk / (16 * (quot));
792 }
794 static int __init at91_console_setup(struct console *co, char *options)
795 {
796 struct uart_port *port = &at91_ports[co->index].uart;
797 int baud = 115200;
798 int bits = 8;
799 int parity = 'n';
800 int flow = 'n';
802 if (port->membase == 0) /* Port not initialized yet - delay setup */
803 return -ENODEV;
805 UART_PUT_IDR(port, -1); /* disable interrupts */
806 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
807 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
809 if (options)
810 uart_parse_options(options, &baud, &parity, &bits, &flow);
811 else
812 at91_console_get_options(port, &baud, &parity, &bits);
814 return uart_set_options(port, co, baud, parity, bits, flow);
815 }
817 static struct uart_driver at91_uart;
819 static struct console at91_console = {
820 .name = AT91_DEVICENAME,
821 .write = at91_console_write,
822 .device = uart_console_device,
823 .setup = at91_console_setup,
824 .flags = CON_PRINTBUFFER,
825 .index = -1,
826 .data = &at91_uart,
827 };
829 #define AT91_CONSOLE_DEVICE &at91_console
831 /*
832 * Early console initialization (before VM subsystem initialized).
833 */
834 static int __init at91_console_init(void)
835 {
836 if (at91_default_console_device) {
837 add_preferred_console(AT91_DEVICENAME, at91_default_console_device->id, NULL);
838 at91_init_port(&(at91_ports[at91_default_console_device->id]), at91_default_console_device);
839 register_console(&at91_console);
840 }
842 return 0;
843 }
844 console_initcall(at91_console_init);
846 /*
847 * Late console initialization.
848 */
849 static int __init at91_late_console_init(void)
850 {
851 if (at91_default_console_device && !(at91_console.flags & CON_ENABLED))
852 register_console(&at91_console);
854 return 0;
855 }
856 core_initcall(at91_late_console_init);
858 #else
859 #define AT91_CONSOLE_DEVICE NULL
860 #endif
862 static struct uart_driver at91_uart = {
863 .owner = THIS_MODULE,
864 .driver_name = "at91_serial",
865 .dev_name = AT91_DEVICENAME,
866 .major = SERIAL_AT91_MAJOR,
867 .minor = MINOR_START,
868 .nr = AT91_NR_UART,
869 .cons = AT91_CONSOLE_DEVICE,
870 };
872 #ifdef CONFIG_PM
873 static int at91_serial_suspend(struct platform_device *pdev, pm_message_t state)
874 {
875 struct uart_port *port = platform_get_drvdata(pdev);
876 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
878 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
879 enable_irq_wake(port->irq);
880 else {
881 disable_irq_wake(port->irq);
882 uart_suspend_port(&at91_uart, port);
883 at91_port->suspended = 1;
884 }
886 return 0;
887 }
889 static int at91_serial_resume(struct platform_device *pdev)
890 {
891 struct uart_port *port = platform_get_drvdata(pdev);
892 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
894 if (at91_port->suspended) {
895 uart_resume_port(&at91_uart, port);
896 at91_port->suspended = 0;
897 }
899 return 0;
900 }
901 #else
902 #define at91_serial_suspend NULL
903 #define at91_serial_resume NULL
904 #endif
906 static int __devinit at91_serial_probe(struct platform_device *pdev)
907 {
908 struct at91_uart_port *port;
909 int ret;
911 port = &at91_ports[pdev->id];
912 at91_init_port(port, pdev);
914 ret = uart_add_one_port(&at91_uart, &port->uart);
915 if (!ret) {
916 device_init_wakeup(&pdev->dev, 1);
917 platform_set_drvdata(pdev, port);
918 }
920 return ret;
921 }
923 static int __devexit at91_serial_remove(struct platform_device *pdev)
924 {
925 struct uart_port *port = platform_get_drvdata(pdev);
926 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
927 int ret = 0;
929 clk_disable(at91_port->clk);
930 clk_put(at91_port->clk);
932 device_init_wakeup(&pdev->dev, 0);
933 platform_set_drvdata(pdev, NULL);
935 if (port) {
936 ret = uart_remove_one_port(&at91_uart, port);
937 kfree(port);
938 }
940 return ret;
941 }
943 static struct platform_driver at91_serial_driver = {
944 .probe = at91_serial_probe,
945 .remove = __devexit_p(at91_serial_remove),
946 .suspend = at91_serial_suspend,
947 .resume = at91_serial_resume,
948 .driver = {
949 .name = "at91_usart",
950 .owner = THIS_MODULE,
951 },
952 };
954 static int __init at91_serial_init(void)
955 {
956 int ret;
958 ret = uart_register_driver(&at91_uart);
959 if (ret)
960 return ret;
962 ret = platform_driver_register(&at91_serial_driver);
963 if (ret)
964 uart_unregister_driver(&at91_uart);
966 return ret;
967 }
969 static void __exit at91_serial_exit(void)
970 {
971 platform_driver_unregister(&at91_serial_driver);
972 uart_unregister_driver(&at91_uart);
973 }
975 module_init(at91_serial_init);
976 module_exit(at91_serial_exit);
978 MODULE_AUTHOR("Rick Bronson");
979 MODULE_DESCRIPTION("AT91 generic serial port driver");
980 MODULE_LICENSE("GPL");