ia64/linux-2.6.18-xen.hg

view drivers/serial/68360serial.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * UART driver for 68360 CPM SCC or SMC
3 * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5 * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6 *
7 * I used the serial.c driver as the framework for this driver.
8 * Give credit to those guys.
9 * The original code was written for the MBX860 board. I tried to make
10 * it generic, but there may be some assumptions in the structures that
11 * have to be fixed later.
12 * To save porting time, I did not bother to change any object names
13 * that are not accessed outside of this file.
14 * It still needs lots of work........When it was easy, I included code
15 * to support the SCCs, but this has never been tested, nor is it complete.
16 * Only the SCCs support modem control, so that is not complete either.
17 *
18 * This module exports the following rs232 io functions:
19 *
20 * int rs_360_init(void);
21 */
23 #include <linux/module.h>
24 #include <linux/errno.h>
25 #include <linux/signal.h>
26 #include <linux/sched.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial.h>
32 #include <linux/serialP.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/fcntl.h>
36 #include <linux/ptrace.h>
37 #include <linux/mm.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <asm/irq.h>
41 #include <asm/m68360.h>
42 #include <asm/commproc.h>
45 #ifdef CONFIG_KGDB
46 extern void breakpoint(void);
47 extern void set_debug_traps(void);
48 extern int kgdb_output_string (const char* s, unsigned int count);
49 #endif
52 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
53 #include <linux/console.h>
55 /* this defines the index into rs_table for the port to use
56 */
57 #ifndef CONFIG_SERIAL_CONSOLE_PORT
58 #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
59 #endif
60 /* #endif */
62 #if 0
63 /* SCC2 for console
64 */
65 #undef CONFIG_SERIAL_CONSOLE_PORT
66 #define CONFIG_SERIAL_CONSOLE_PORT 2
67 #endif
70 #define TX_WAKEUP ASYNC_SHARE_IRQ
72 static char *serial_name = "CPM UART driver";
73 static char *serial_version = "0.03";
75 static struct tty_driver *serial_driver;
76 int serial_console_setup(struct console *co, char *options);
78 /*
79 * Serial driver configuration section. Here are the various options:
80 */
81 #define SERIAL_PARANOIA_CHECK
82 #define CONFIG_SERIAL_NOPAUSE_IO
83 #define SERIAL_DO_RESTART
85 /* Set of debugging defines */
87 #undef SERIAL_DEBUG_INTR
88 #undef SERIAL_DEBUG_OPEN
89 #undef SERIAL_DEBUG_FLOW
90 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
92 #define _INLINE_ inline
94 #define DBG_CNT(s)
96 /* We overload some of the items in the data structure to meet our
97 * needs. For example, the port address is the CPM parameter ram
98 * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
99 * 2 SMCs. The "hub6" field is used to indicate the channel number, with
100 * a flag indicating SCC or SMC, and the number is used as an index into
101 * the CPM parameter area for this device.
102 * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
103 * not currently used. I should probably use it to indicate the port
104 * type of SMC or SCC.
105 * The SMCs do not support any modem control signals.
106 */
107 #define smc_scc_num hub6
108 #define NUM_IS_SCC ((int)0x00010000)
109 #define PORT_NUM(P) ((P) & 0x0000ffff)
112 #if defined (CONFIG_UCQUICC)
114 volatile extern void *_periph_base;
115 /* sipex transceiver
116 * mode bits for are on pins
117 *
118 * SCC2 d16..19
119 * SCC3 d20..23
120 * SCC4 d24..27
121 */
122 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
124 static uint sipex_mode_bits = 0x00000000;
126 #endif
128 /* There is no `serial_state' defined back here in 2.0.
129 * Try to get by with serial_struct
130 */
131 /* #define serial_state serial_struct */
133 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
134 * extras: */
136 #if 0
137 struct async_icount_24 {
138 __u32 cts, dsr, rng, dcd, tx, rx;
139 __u32 frame, parity, overrun, brk;
140 __u32 buf_overrun;
141 } icount;
142 #endif
144 #if 0
146 struct serial_state {
147 int magic;
148 int baud_base;
149 unsigned long port;
150 int irq;
151 int flags;
152 int hub6;
153 int type;
154 int line;
155 int revision; /* Chip revision (950) */
156 int xmit_fifo_size;
157 int custom_divisor;
158 int count;
159 u8 *iomem_base;
160 u16 iomem_reg_shift;
161 unsigned short close_delay;
162 unsigned short closing_wait; /* time to wait before closing */
163 struct async_icount_24 icount;
164 int io_type;
165 struct async_struct *info;
166 };
167 #endif
169 #define SSTATE_MAGIC 0x5302
173 /* SMC2 is sometimes used for low performance TDM interfaces. Define
174 * this as 1 if you want SMC2 as a serial port UART managed by this driver.
175 * Define this as 0 if you wish to use SMC2 for something else.
176 */
177 #define USE_SMC2 1
179 #if 0
180 /* Define SCC to ttySx mapping. */
181 #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
183 /* Define which SCC is the first one to use for a serial port. These
184 * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
185 * for Ethernet, and the first available SCC for serial UART is SCC2.
186 * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
187 * interrupt vectors in the table below to match.
188 */
189 #define SCC_IDX_BASE 1 /* table index */
190 #endif
193 /* Processors other than the 860 only get SMCs configured by default.
194 * Either they don't have SCCs or they are allocated somewhere else.
195 * Of course, there are now 860s without some SCCs, so we will need to
196 * address that someday.
197 * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
198 * stereo codec parts, and we use SMC2 to help support that.
199 */
200 static struct serial_state rs_table[] = {
201 /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
202 { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
203 #if USE_SMC2
204 ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
205 #endif
207 #if defined(CONFIG_SERIAL_68360_SCC)
208 ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
209 ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
210 ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
211 #endif
212 };
214 #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
216 /* The number of buffer descriptors and their sizes.
217 */
218 #define RX_NUM_FIFO 4
219 #define RX_BUF_SIZE 32
220 #define TX_NUM_FIFO 4
221 #define TX_BUF_SIZE 32
223 #define CONSOLE_NUM_FIFO 2
224 #define CONSOLE_BUF_SIZE 4
226 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
228 /* The async_struct in serial.h does not really give us what we
229 * need, so define our own here.
230 */
231 typedef struct serial_info {
232 int magic;
233 int flags;
235 struct serial_state *state;
236 /* struct serial_struct *state; */
237 /* struct async_struct *state; */
239 struct tty_struct *tty;
240 int read_status_mask;
241 int ignore_status_mask;
242 int timeout;
243 int line;
244 int x_char; /* xon/xoff character */
245 int close_delay;
246 unsigned short closing_wait;
247 unsigned short closing_wait2;
248 unsigned long event;
249 unsigned long last_active;
250 int blocked_open; /* # of blocked opens */
251 struct work_struct tqueue;
252 struct work_struct tqueue_hangup;
253 wait_queue_head_t open_wait;
254 wait_queue_head_t close_wait;
257 /* CPM Buffer Descriptor pointers.
258 */
259 QUICC_BD *rx_bd_base;
260 QUICC_BD *rx_cur;
261 QUICC_BD *tx_bd_base;
262 QUICC_BD *tx_cur;
263 } ser_info_t;
266 /* since kmalloc_init() does not get called until much after this initialization: */
267 static ser_info_t quicc_ser_info[NR_PORTS];
268 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
269 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
271 static void change_speed(ser_info_t *info);
272 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
274 static inline int serial_paranoia_check(ser_info_t *info,
275 char *name, const char *routine)
276 {
277 #ifdef SERIAL_PARANOIA_CHECK
278 static const char *badmagic =
279 "Warning: bad magic number for serial struct (%s) in %s\n";
280 static const char *badinfo =
281 "Warning: null async_struct for (%s) in %s\n";
283 if (!info) {
284 printk(badinfo, name, routine);
285 return 1;
286 }
287 if (info->magic != SERIAL_MAGIC) {
288 printk(badmagic, name, routine);
289 return 1;
290 }
291 #endif
292 return 0;
293 }
295 /*
296 * This is used to figure out the divisor speeds and the timeouts,
297 * indexed by the termio value. The generic CPM functions are responsible
298 * for setting and assigning baud rate generators for us.
299 */
300 static int baud_table[] = {
301 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
302 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
304 /* This sucks. There is a better way: */
305 #if defined(CONFIG_CONSOLE_9600)
306 #define CONSOLE_BAUDRATE 9600
307 #elif defined(CONFIG_CONSOLE_19200)
308 #define CONSOLE_BAUDRATE 19200
309 #elif defined(CONFIG_CONSOLE_115200)
310 #define CONSOLE_BAUDRATE 115200
311 #else
312 #warning "console baud rate undefined"
313 #define CONSOLE_BAUDRATE 9600
314 #endif
316 /*
317 * ------------------------------------------------------------
318 * rs_stop() and rs_start()
319 *
320 * This routines are called before setting or resetting tty->stopped.
321 * They enable or disable transmitter interrupts, as necessary.
322 * ------------------------------------------------------------
323 */
324 static void rs_360_stop(struct tty_struct *tty)
325 {
326 ser_info_t *info = (ser_info_t *)tty->driver_data;
327 int idx;
328 unsigned long flags;
329 volatile struct scc_regs *sccp;
330 volatile struct smc_regs *smcp;
332 if (serial_paranoia_check(info, tty->name, "rs_stop"))
333 return;
335 local_irq_save(flags);
336 idx = PORT_NUM(info->state->smc_scc_num);
337 if (info->state->smc_scc_num & NUM_IS_SCC) {
338 sccp = &pquicc->scc_regs[idx];
339 sccp->scc_sccm &= ~UART_SCCM_TX;
340 } else {
341 /* smcp = &cpmp->cp_smc[idx]; */
342 smcp = &pquicc->smc_regs[idx];
343 smcp->smc_smcm &= ~SMCM_TX;
344 }
345 local_irq_restore(flags);
346 }
349 static void rs_360_start(struct tty_struct *tty)
350 {
351 ser_info_t *info = (ser_info_t *)tty->driver_data;
352 int idx;
353 unsigned long flags;
354 volatile struct scc_regs *sccp;
355 volatile struct smc_regs *smcp;
357 if (serial_paranoia_check(info, tty->name, "rs_stop"))
358 return;
360 local_irq_save(flags);
361 idx = PORT_NUM(info->state->smc_scc_num);
362 if (info->state->smc_scc_num & NUM_IS_SCC) {
363 sccp = &pquicc->scc_regs[idx];
364 sccp->scc_sccm |= UART_SCCM_TX;
365 } else {
366 smcp = &pquicc->smc_regs[idx];
367 smcp->smc_smcm |= SMCM_TX;
368 }
369 local_irq_restore(flags);
370 }
372 /*
373 * ----------------------------------------------------------------------
374 *
375 * Here starts the interrupt handling routines. All of the following
376 * subroutines are declared as inline and are folded into
377 * rs_interrupt(). They were separated out for readability's sake.
378 *
379 * Note: rs_interrupt() is a "fast" interrupt, which means that it
380 * runs with interrupts turned off. People who may want to modify
381 * rs_interrupt() should try to keep the interrupt handler as fast as
382 * possible. After you are done making modifications, it is not a bad
383 * idea to do:
384 *
385 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
386 *
387 * and look at the resulting assemble code in serial.s.
388 *
389 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
390 * -----------------------------------------------------------------------
391 */
393 static _INLINE_ void receive_chars(ser_info_t *info)
394 {
395 struct tty_struct *tty = info->tty;
396 unsigned char ch, flag, *cp;
397 /*int ignored = 0;*/
398 int i;
399 ushort status;
400 struct async_icount *icount;
401 /* struct async_icount_24 *icount; */
402 volatile QUICC_BD *bdp;
404 icount = &info->state->icount;
406 /* Just loop through the closed BDs and copy the characters into
407 * the buffer.
408 */
409 bdp = info->rx_cur;
410 for (;;) {
411 if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
412 break; /* we are all done */
414 /* The read status mask tell us what we should do with
415 * incoming characters, especially if errors occur.
416 * One special case is the use of BD_SC_EMPTY. If
417 * this is not set, we are supposed to be ignoring
418 * inputs. In this case, just mark the buffer empty and
419 * continue.
420 */
421 if (!(info->read_status_mask & BD_SC_EMPTY)) {
422 bdp->status |= BD_SC_EMPTY;
423 bdp->status &=
424 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
426 if (bdp->status & BD_SC_WRAP)
427 bdp = info->rx_bd_base;
428 else
429 bdp++;
430 continue;
431 }
433 /* Get the number of characters and the buffer pointer.
434 */
435 i = bdp->length;
436 /* cp = (unsigned char *)__va(bdp->buf); */
437 cp = (char *)bdp->buf;
438 status = bdp->status;
440 while (i-- > 0) {
441 ch = *cp++;
442 icount->rx++;
444 #ifdef SERIAL_DEBUG_INTR
445 printk("DR%02x:%02x...", ch, status);
446 #endif
447 flag = TTY_NORMAL;
449 if (status & (BD_SC_BR | BD_SC_FR |
450 BD_SC_PR | BD_SC_OV)) {
451 /*
452 * For statistics only
453 */
454 if (status & BD_SC_BR)
455 icount->brk++;
456 else if (status & BD_SC_PR)
457 icount->parity++;
458 else if (status & BD_SC_FR)
459 icount->frame++;
460 if (status & BD_SC_OV)
461 icount->overrun++;
463 /*
464 * Now check to see if character should be
465 * ignored, and mask off conditions which
466 * should be ignored.
467 if (status & info->ignore_status_mask) {
468 if (++ignored > 100)
469 break;
470 continue;
471 }
472 */
473 status &= info->read_status_mask;
475 if (status & (BD_SC_BR)) {
476 #ifdef SERIAL_DEBUG_INTR
477 printk("handling break....");
478 #endif
479 *tty->flip.flag_buf_ptr = TTY_BREAK;
480 if (info->flags & ASYNC_SAK)
481 do_SAK(tty);
482 } else if (status & BD_SC_PR)
483 flag = TTY_PARITY;
484 else if (status & BD_SC_FR)
485 flag = TTY_FRAME;
486 }
487 tty_insert_flip_char(tty, ch, flag);
488 if (status & BD_SC_OV)
489 /*
490 * Overrun is special, since it's
491 * reported immediately, and doesn't
492 * affect the current character
493 */
494 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
495 }
497 /* This BD is ready to be used again. Clear status.
498 * Get next BD.
499 */
500 bdp->status |= BD_SC_EMPTY;
501 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
503 if (bdp->status & BD_SC_WRAP)
504 bdp = info->rx_bd_base;
505 else
506 bdp++;
507 }
509 info->rx_cur = (QUICC_BD *)bdp;
511 tty_schedule_flip(tty);
512 }
514 static _INLINE_ void receive_break(ser_info_t *info)
515 {
516 struct tty_struct *tty = info->tty;
518 info->state->icount.brk++;
519 /* Check to see if there is room in the tty buffer for
520 * the break. If not, we exit now, losing the break. FIXME
521 */
522 tty_insert_flip_char(tty, 0, TTY_BREAK);
523 tty_schedule_flip(tty);
524 }
526 static _INLINE_ void transmit_chars(ser_info_t *info)
527 {
529 if ((info->flags & TX_WAKEUP) ||
530 (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
531 schedule_work(&info->tqueue);
532 }
534 #ifdef SERIAL_DEBUG_INTR
535 printk("THRE...");
536 #endif
537 }
539 #ifdef notdef
540 /* I need to do this for the SCCs, so it is left as a reminder.
541 */
542 static _INLINE_ void check_modem_status(struct async_struct *info)
543 {
544 int status;
545 /* struct async_icount *icount; */
546 struct async_icount_24 *icount;
548 status = serial_in(info, UART_MSR);
550 if (status & UART_MSR_ANY_DELTA) {
551 icount = &info->state->icount;
552 /* update input line counters */
553 if (status & UART_MSR_TERI)
554 icount->rng++;
555 if (status & UART_MSR_DDSR)
556 icount->dsr++;
557 if (status & UART_MSR_DDCD) {
558 icount->dcd++;
559 #ifdef CONFIG_HARD_PPS
560 if ((info->flags & ASYNC_HARDPPS_CD) &&
561 (status & UART_MSR_DCD))
562 hardpps();
563 #endif
564 }
565 if (status & UART_MSR_DCTS)
566 icount->cts++;
567 wake_up_interruptible(&info->delta_msr_wait);
568 }
570 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
571 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
572 printk("ttys%d CD now %s...", info->line,
573 (status & UART_MSR_DCD) ? "on" : "off");
574 #endif
575 if (status & UART_MSR_DCD)
576 wake_up_interruptible(&info->open_wait);
577 else {
578 #ifdef SERIAL_DEBUG_OPEN
579 printk("scheduling hangup...");
580 #endif
581 queue_task(&info->tqueue_hangup,
582 &tq_scheduler);
583 }
584 }
585 if (info->flags & ASYNC_CTS_FLOW) {
586 if (info->tty->hw_stopped) {
587 if (status & UART_MSR_CTS) {
588 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
589 printk("CTS tx start...");
590 #endif
591 info->tty->hw_stopped = 0;
592 info->IER |= UART_IER_THRI;
593 serial_out(info, UART_IER, info->IER);
594 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
595 return;
596 }
597 } else {
598 if (!(status & UART_MSR_CTS)) {
599 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
600 printk("CTS tx stop...");
601 #endif
602 info->tty->hw_stopped = 1;
603 info->IER &= ~UART_IER_THRI;
604 serial_out(info, UART_IER, info->IER);
605 }
606 }
607 }
608 }
609 #endif
611 /*
612 * This is the serial driver's interrupt routine for a single port
613 */
614 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
615 static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
616 {
617 u_char events;
618 int idx;
619 ser_info_t *info;
620 volatile struct smc_regs *smcp;
621 volatile struct scc_regs *sccp;
623 info = (ser_info_t *)dev_id;
625 idx = PORT_NUM(info->state->smc_scc_num);
626 if (info->state->smc_scc_num & NUM_IS_SCC) {
627 sccp = &pquicc->scc_regs[idx];
628 events = sccp->scc_scce;
629 if (events & SCCM_RX)
630 receive_chars(info);
631 if (events & SCCM_TX)
632 transmit_chars(info);
633 sccp->scc_scce = events;
634 } else {
635 smcp = &pquicc->smc_regs[idx];
636 events = smcp->smc_smce;
637 if (events & SMCM_BRKE)
638 receive_break(info);
639 if (events & SMCM_RX)
640 receive_chars(info);
641 if (events & SMCM_TX)
642 transmit_chars(info);
643 smcp->smc_smce = events;
644 }
646 #ifdef SERIAL_DEBUG_INTR
647 printk("rs_interrupt_single(%d, %x)...",
648 info->state->smc_scc_num, events);
649 #endif
650 #ifdef modem_control
651 check_modem_status(info);
652 #endif
653 info->last_active = jiffies;
654 #ifdef SERIAL_DEBUG_INTR
655 printk("end.\n");
656 #endif
657 }
660 /*
661 * -------------------------------------------------------------------
662 * Here ends the serial interrupt routines.
663 * -------------------------------------------------------------------
664 */
667 static void do_softint(void *private_)
668 {
669 ser_info_t *info = (ser_info_t *) private_;
670 struct tty_struct *tty;
672 tty = info->tty;
673 if (!tty)
674 return;
676 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
677 tty_wakeup(tty);
678 }
681 /*
682 * This routine is called from the scheduler tqueue when the interrupt
683 * routine has signalled that a hangup has occurred. The path of
684 * hangup processing is:
685 *
686 * serial interrupt routine -> (scheduler tqueue) ->
687 * do_serial_hangup() -> tty->hangup() -> rs_hangup()
688 *
689 */
690 static void do_serial_hangup(void *private_)
691 {
692 struct async_struct *info = (struct async_struct *) private_;
693 struct tty_struct *tty;
695 tty = info->tty;
696 if (!tty)
697 return;
699 tty_hangup(tty);
700 }
703 static int startup(ser_info_t *info)
704 {
705 unsigned long flags;
706 int retval=0;
707 int idx;
708 /*struct serial_state *state = info->state;*/
709 volatile struct smc_regs *smcp;
710 volatile struct scc_regs *sccp;
711 volatile struct smc_uart_pram *up;
712 volatile struct uart_pram *scup;
715 local_irq_save(flags);
717 if (info->flags & ASYNC_INITIALIZED) {
718 goto errout;
719 }
721 #ifdef maybe
722 if (!state->port || !state->type) {
723 if (info->tty)
724 set_bit(TTY_IO_ERROR, &info->tty->flags);
725 goto errout;
726 }
727 #endif
729 #ifdef SERIAL_DEBUG_OPEN
730 printk("starting up ttys%d (irq %d)...", info->line, state->irq);
731 #endif
734 #ifdef modem_control
735 info->MCR = 0;
736 if (info->tty->termios->c_cflag & CBAUD)
737 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
738 #endif
740 if (info->tty)
741 clear_bit(TTY_IO_ERROR, &info->tty->flags);
743 /*
744 * and set the speed of the serial port
745 */
746 change_speed(info);
748 idx = PORT_NUM(info->state->smc_scc_num);
749 if (info->state->smc_scc_num & NUM_IS_SCC) {
750 sccp = &pquicc->scc_regs[idx];
751 scup = &pquicc->pram[info->state->port].scc.pscc.u;
753 scup->mrblr = RX_BUF_SIZE;
754 scup->max_idl = RX_BUF_SIZE;
756 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
757 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
759 } else {
760 smcp = &pquicc->smc_regs[idx];
762 /* Enable interrupts and I/O.
763 */
764 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
765 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
767 /* We can tune the buffer length and idle characters
768 * to take advantage of the entire incoming buffer size.
769 * If mrblr is something other than 1, maxidl has to be
770 * non-zero or we never get an interrupt. The maxidl
771 * is the number of character times we wait after reception
772 * of the last character before we decide no more characters
773 * are coming.
774 */
775 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
776 /* holy unionized structures, Batman: */
777 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
779 up->mrblr = RX_BUF_SIZE;
780 up->max_idl = RX_BUF_SIZE;
782 up->brkcr = 1; /* number of break chars */
783 }
785 info->flags |= ASYNC_INITIALIZED;
786 local_irq_restore(flags);
787 return 0;
789 errout:
790 local_irq_restore(flags);
791 return retval;
792 }
794 /*
795 * This routine will shutdown a serial port; interrupts are disabled, and
796 * DTR is dropped if the hangup on close termio flag is on.
797 */
798 static void shutdown(ser_info_t *info)
799 {
800 unsigned long flags;
801 struct serial_state *state;
802 int idx;
803 volatile struct smc_regs *smcp;
804 volatile struct scc_regs *sccp;
806 if (!(info->flags & ASYNC_INITIALIZED))
807 return;
809 state = info->state;
811 #ifdef SERIAL_DEBUG_OPEN
812 printk("Shutting down serial port %d (irq %d)....", info->line,
813 state->irq);
814 #endif
816 local_irq_save(flags);
818 idx = PORT_NUM(state->smc_scc_num);
819 if (state->smc_scc_num & NUM_IS_SCC) {
820 sccp = &pquicc->scc_regs[idx];
821 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
822 #ifdef CONFIG_SERIAL_CONSOLE
823 /* We can't disable the transmitter if this is the
824 * system console.
825 */
826 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
827 #endif
828 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
829 } else {
830 smcp = &pquicc->smc_regs[idx];
832 /* Disable interrupts and I/O.
833 */
834 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
835 #ifdef CONFIG_SERIAL_CONSOLE
836 /* We can't disable the transmitter if this is the
837 * system console.
838 */
839 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
840 #endif
841 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
842 }
844 if (info->tty)
845 set_bit(TTY_IO_ERROR, &info->tty->flags);
847 info->flags &= ~ASYNC_INITIALIZED;
848 local_irq_restore(flags);
849 }
851 /*
852 * This routine is called to set the UART divisor registers to match
853 * the specified baud rate for a serial port.
854 */
855 static void change_speed(ser_info_t *info)
856 {
857 int baud_rate;
858 unsigned cflag, cval, scval, prev_mode;
859 int i, bits, sbits, idx;
860 unsigned long flags;
861 struct serial_state *state;
862 volatile struct smc_regs *smcp;
863 volatile struct scc_regs *sccp;
865 if (!info->tty || !info->tty->termios)
866 return;
867 cflag = info->tty->termios->c_cflag;
869 state = info->state;
871 /* Character length programmed into the mode register is the
872 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
873 * 1 or 2 stop bits, minus 1.
874 * The value 'bits' counts this for us.
875 */
876 cval = 0;
877 scval = 0;
879 /* byte size and parity */
880 switch (cflag & CSIZE) {
881 case CS5: bits = 5; break;
882 case CS6: bits = 6; break;
883 case CS7: bits = 7; break;
884 case CS8: bits = 8; break;
885 /* Never happens, but GCC is too dumb to figure it out */
886 default: bits = 8; break;
887 }
888 sbits = bits - 5;
890 if (cflag & CSTOPB) {
891 cval |= SMCMR_SL; /* Two stops */
892 scval |= SCU_PMSR_SL;
893 bits++;
894 }
895 if (cflag & PARENB) {
896 cval |= SMCMR_PEN;
897 scval |= SCU_PMSR_PEN;
898 bits++;
899 }
900 if (!(cflag & PARODD)) {
901 cval |= SMCMR_PM_EVEN;
902 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
903 }
905 /* Determine divisor based on baud rate */
906 i = cflag & CBAUD;
907 if (i >= (sizeof(baud_table)/sizeof(int)))
908 baud_rate = 9600;
909 else
910 baud_rate = baud_table[i];
912 info->timeout = (TX_BUF_SIZE*HZ*bits);
913 info->timeout += HZ/50; /* Add .02 seconds of slop */
915 #ifdef modem_control
916 /* CTS flow control flag and modem status interrupts */
917 info->IER &= ~UART_IER_MSI;
918 if (info->flags & ASYNC_HARDPPS_CD)
919 info->IER |= UART_IER_MSI;
920 if (cflag & CRTSCTS) {
921 info->flags |= ASYNC_CTS_FLOW;
922 info->IER |= UART_IER_MSI;
923 } else
924 info->flags &= ~ASYNC_CTS_FLOW;
925 if (cflag & CLOCAL)
926 info->flags &= ~ASYNC_CHECK_CD;
927 else {
928 info->flags |= ASYNC_CHECK_CD;
929 info->IER |= UART_IER_MSI;
930 }
931 serial_out(info, UART_IER, info->IER);
932 #endif
934 /*
935 * Set up parity check flag
936 */
937 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
939 info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
940 if (I_INPCK(info->tty))
941 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
942 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
943 info->read_status_mask |= BD_SC_BR;
945 /*
946 * Characters to ignore
947 */
948 info->ignore_status_mask = 0;
949 if (I_IGNPAR(info->tty))
950 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
951 if (I_IGNBRK(info->tty)) {
952 info->ignore_status_mask |= BD_SC_BR;
953 /*
954 * If we're ignore parity and break indicators, ignore
955 * overruns too. (For real raw support).
956 */
957 if (I_IGNPAR(info->tty))
958 info->ignore_status_mask |= BD_SC_OV;
959 }
960 /*
961 * !!! ignore all characters if CREAD is not set
962 */
963 if ((cflag & CREAD) == 0)
964 info->read_status_mask &= ~BD_SC_EMPTY;
965 local_irq_save(flags);
967 /* Start bit has not been added (so don't, because we would just
968 * subtract it later), and we need to add one for the number of
969 * stops bits (there is always at least one).
970 */
971 bits++;
972 idx = PORT_NUM(state->smc_scc_num);
973 if (state->smc_scc_num & NUM_IS_SCC) {
974 sccp = &pquicc->scc_regs[idx];
975 sccp->scc_psmr = (sbits << 12) | scval;
976 } else {
977 smcp = &pquicc->smc_regs[idx];
979 /* Set the mode register. We want to keep a copy of the
980 * enables, because we want to put them back if they were
981 * present.
982 */
983 prev_mode = smcp->smc_smcmr;
984 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
985 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
986 }
988 m360_cpm_setbrg((state - rs_table), baud_rate);
990 local_irq_restore(flags);
991 }
993 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
994 {
995 ser_info_t *info = (ser_info_t *)tty->driver_data;
996 volatile QUICC_BD *bdp;
998 if (serial_paranoia_check(info, tty->name, "rs_put_char"))
999 return;
1001 if (!tty)
1002 return;
1004 bdp = info->tx_cur;
1005 while (bdp->status & BD_SC_READY);
1007 /* *((char *)__va(bdp->buf)) = ch; */
1008 *((char *)bdp->buf) = ch;
1009 bdp->length = 1;
1010 bdp->status |= BD_SC_READY;
1012 /* Get next BD.
1013 */
1014 if (bdp->status & BD_SC_WRAP)
1015 bdp = info->tx_bd_base;
1016 else
1017 bdp++;
1019 info->tx_cur = (QUICC_BD *)bdp;
1023 static int rs_360_write(struct tty_struct * tty,
1024 const unsigned char *buf, int count)
1026 int c, ret = 0;
1027 ser_info_t *info = (ser_info_t *)tty->driver_data;
1028 volatile QUICC_BD *bdp;
1030 #ifdef CONFIG_KGDB
1031 /* Try to let stub handle output. Returns true if it did. */
1032 if (kgdb_output_string(buf, count))
1033 return ret;
1034 #endif
1036 if (serial_paranoia_check(info, tty->name, "rs_write"))
1037 return 0;
1039 if (!tty)
1040 return 0;
1042 bdp = info->tx_cur;
1044 while (1) {
1045 c = min(count, TX_BUF_SIZE);
1047 if (c <= 0)
1048 break;
1050 if (bdp->status & BD_SC_READY) {
1051 info->flags |= TX_WAKEUP;
1052 break;
1055 /* memcpy(__va(bdp->buf), buf, c); */
1056 memcpy((void *)bdp->buf, buf, c);
1058 bdp->length = c;
1059 bdp->status |= BD_SC_READY;
1061 buf += c;
1062 count -= c;
1063 ret += c;
1065 /* Get next BD.
1066 */
1067 if (bdp->status & BD_SC_WRAP)
1068 bdp = info->tx_bd_base;
1069 else
1070 bdp++;
1071 info->tx_cur = (QUICC_BD *)bdp;
1073 return ret;
1076 static int rs_360_write_room(struct tty_struct *tty)
1078 ser_info_t *info = (ser_info_t *)tty->driver_data;
1079 int ret;
1081 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1082 return 0;
1084 if ((info->tx_cur->status & BD_SC_READY) == 0) {
1085 info->flags &= ~TX_WAKEUP;
1086 ret = TX_BUF_SIZE;
1088 else {
1089 info->flags |= TX_WAKEUP;
1090 ret = 0;
1092 return ret;
1095 /* I could track this with transmit counters....maybe later.
1096 */
1097 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1099 ser_info_t *info = (ser_info_t *)tty->driver_data;
1101 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1102 return 0;
1103 return 0;
1106 static void rs_360_flush_buffer(struct tty_struct *tty)
1108 ser_info_t *info = (ser_info_t *)tty->driver_data;
1110 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1111 return;
1113 /* There is nothing to "flush", whatever we gave the CPM
1114 * is on its way out.
1115 */
1116 tty_wakeup(tty);
1117 info->flags &= ~TX_WAKEUP;
1120 /*
1121 * This function is used to send a high-priority XON/XOFF character to
1122 * the device
1123 */
1124 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1126 volatile QUICC_BD *bdp;
1128 ser_info_t *info = (ser_info_t *)tty->driver_data;
1130 if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1131 return;
1133 bdp = info->tx_cur;
1134 while (bdp->status & BD_SC_READY);
1136 /* *((char *)__va(bdp->buf)) = ch; */
1137 *((char *)bdp->buf) = ch;
1138 bdp->length = 1;
1139 bdp->status |= BD_SC_READY;
1141 /* Get next BD.
1142 */
1143 if (bdp->status & BD_SC_WRAP)
1144 bdp = info->tx_bd_base;
1145 else
1146 bdp++;
1148 info->tx_cur = (QUICC_BD *)bdp;
1151 /*
1152 * ------------------------------------------------------------
1153 * rs_throttle()
1155 * This routine is called by the upper-layer tty layer to signal that
1156 * incoming characters should be throttled.
1157 * ------------------------------------------------------------
1158 */
1159 static void rs_360_throttle(struct tty_struct * tty)
1161 ser_info_t *info = (ser_info_t *)tty->driver_data;
1162 #ifdef SERIAL_DEBUG_THROTTLE
1163 char buf[64];
1165 printk("throttle %s: %d....\n", _tty_name(tty, buf),
1166 tty->ldisc.chars_in_buffer(tty));
1167 #endif
1169 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1170 return;
1172 if (I_IXOFF(tty))
1173 rs_360_send_xchar(tty, STOP_CHAR(tty));
1175 #ifdef modem_control
1176 if (tty->termios->c_cflag & CRTSCTS)
1177 info->MCR &= ~UART_MCR_RTS;
1179 local_irq_disable();
1180 serial_out(info, UART_MCR, info->MCR);
1181 local_irq_enable();
1182 #endif
1185 static void rs_360_unthrottle(struct tty_struct * tty)
1187 ser_info_t *info = (ser_info_t *)tty->driver_data;
1188 #ifdef SERIAL_DEBUG_THROTTLE
1189 char buf[64];
1191 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1192 tty->ldisc.chars_in_buffer(tty));
1193 #endif
1195 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1196 return;
1198 if (I_IXOFF(tty)) {
1199 if (info->x_char)
1200 info->x_char = 0;
1201 else
1202 rs_360_send_xchar(tty, START_CHAR(tty));
1204 #ifdef modem_control
1205 if (tty->termios->c_cflag & CRTSCTS)
1206 info->MCR |= UART_MCR_RTS;
1207 local_irq_disable();
1208 serial_out(info, UART_MCR, info->MCR);
1209 local_irq_enable();
1210 #endif
1213 /*
1214 * ------------------------------------------------------------
1215 * rs_ioctl() and friends
1216 * ------------------------------------------------------------
1217 */
1219 #ifdef maybe
1220 /*
1221 * get_lsr_info - get line status register info
1223 * Purpose: Let user call ioctl() to get info when the UART physically
1224 * is emptied. On bus types like RS485, the transmitter must
1225 * release the bus after transmitting. This must be done when
1226 * the transmit shift register is empty, not be done when the
1227 * transmit holding register is empty. This functionality
1228 * allows an RS485 driver to be written in user space.
1229 */
1230 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1232 unsigned char status;
1233 unsigned int result;
1235 local_irq_disable();
1236 status = serial_in(info, UART_LSR);
1237 local_irq_enable();
1238 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1239 return put_user(result,value);
1241 #endif
1243 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1245 ser_info_t *info = (ser_info_t *)tty->driver_data;
1246 unsigned int result = 0;
1247 #ifdef modem_control
1248 unsigned char control, status;
1250 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1251 return -ENODEV;
1253 if (tty->flags & (1 << TTY_IO_ERROR))
1254 return -EIO;
1256 control = info->MCR;
1257 local_irq_disable();
1258 status = serial_in(info, UART_MSR);
1259 local_irq_enable();
1260 result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1261 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1262 #ifdef TIOCM_OUT1
1263 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1264 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1265 #endif
1266 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
1267 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
1268 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
1269 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1270 #endif
1271 return result;
1274 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1275 unsigned int set, unsigned int clear)
1277 #ifdef modem_control
1278 ser_info_t *info = (ser_info_t *)tty->driver_data;
1279 unsigned int arg;
1281 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1282 return -ENODEV;
1284 if (tty->flags & (1 << TTY_IO_ERROR))
1285 return -EIO;
1287 if (set & TIOCM_RTS)
1288 info->mcr |= UART_MCR_RTS;
1289 if (set & TIOCM_DTR)
1290 info->mcr |= UART_MCR_DTR;
1291 if (clear & TIOCM_RTS)
1292 info->MCR &= ~UART_MCR_RTS;
1293 if (clear & TIOCM_DTR)
1294 info->MCR &= ~UART_MCR_DTR;
1296 #ifdef TIOCM_OUT1
1297 if (set & TIOCM_OUT1)
1298 info->MCR |= UART_MCR_OUT1;
1299 if (set & TIOCM_OUT2)
1300 info->MCR |= UART_MCR_OUT2;
1301 if (clear & TIOCM_OUT1)
1302 info->MCR &= ~UART_MCR_OUT1;
1303 if (clear & TIOCM_OUT2)
1304 info->MCR &= ~UART_MCR_OUT2;
1305 #endif
1307 local_irq_disable();
1308 serial_out(info, UART_MCR, info->MCR);
1309 local_irq_enable();
1310 #endif
1311 return 0;
1314 /* Sending a break is a two step process on the SMC/SCC. It is accomplished
1315 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1316 * command. We take advantage of the begin/end functions to make this
1317 * happen.
1318 */
1319 static ushort smc_chan_map[] = {
1320 CPM_CR_CH_SMC1,
1321 CPM_CR_CH_SMC2
1322 };
1324 static ushort scc_chan_map[] = {
1325 CPM_CR_CH_SCC1,
1326 CPM_CR_CH_SCC2,
1327 CPM_CR_CH_SCC3,
1328 CPM_CR_CH_SCC4
1329 };
1331 static void begin_break(ser_info_t *info)
1333 volatile QUICC *cp;
1334 ushort chan;
1335 int idx;
1337 cp = pquicc;
1339 idx = PORT_NUM(info->state->smc_scc_num);
1340 if (info->state->smc_scc_num & NUM_IS_SCC)
1341 chan = scc_chan_map[idx];
1342 else
1343 chan = smc_chan_map[idx];
1345 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1346 while (cp->cp_cr & CPM_CR_FLG);
1349 static void end_break(ser_info_t *info)
1351 volatile QUICC *cp;
1352 ushort chan;
1353 int idx;
1355 cp = pquicc;
1357 idx = PORT_NUM(info->state->smc_scc_num);
1358 if (info->state->smc_scc_num & NUM_IS_SCC)
1359 chan = scc_chan_map[idx];
1360 else
1361 chan = smc_chan_map[idx];
1363 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1364 while (cp->cp_cr & CPM_CR_FLG);
1367 /*
1368 * This routine sends a break character out the serial port.
1369 */
1370 static void send_break(ser_info_t *info, unsigned int duration)
1372 #ifdef SERIAL_DEBUG_SEND_BREAK
1373 printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1374 #endif
1375 begin_break(info);
1376 msleep_interruptible(duration);
1377 end_break(info);
1378 #ifdef SERIAL_DEBUG_SEND_BREAK
1379 printk("done jiffies=%lu\n", jiffies);
1380 #endif
1384 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1385 unsigned int cmd, unsigned long arg)
1387 int error;
1388 ser_info_t *info = (ser_info_t *)tty->driver_data;
1389 int retval;
1390 struct async_icount cnow;
1391 /* struct async_icount_24 cnow;*/ /* kernel counter temps */
1392 struct serial_icounter_struct *p_cuser; /* user space */
1394 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1395 return -ENODEV;
1397 if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1398 if (tty->flags & (1 << TTY_IO_ERROR))
1399 return -EIO;
1402 switch (cmd) {
1403 case TCSBRK: /* SVID version: non-zero arg --> no break */
1404 retval = tty_check_change(tty);
1405 if (retval)
1406 return retval;
1407 tty_wait_until_sent(tty, 0);
1408 if (signal_pending(current))
1409 return -EINTR;
1410 if (!arg) {
1411 send_break(info, 250); /* 1/4 second */
1412 if (signal_pending(current))
1413 return -EINTR;
1415 return 0;
1416 case TCSBRKP: /* support for POSIX tcsendbreak() */
1417 retval = tty_check_change(tty);
1418 if (retval)
1419 return retval;
1420 tty_wait_until_sent(tty, 0);
1421 if (signal_pending(current))
1422 return -EINTR;
1423 send_break(info, arg ? arg*100 : 250);
1424 if (signal_pending(current))
1425 return -EINTR;
1426 return 0;
1427 case TIOCSBRK:
1428 retval = tty_check_change(tty);
1429 if (retval)
1430 return retval;
1431 tty_wait_until_sent(tty, 0);
1432 begin_break(info);
1433 return 0;
1434 case TIOCCBRK:
1435 retval = tty_check_change(tty);
1436 if (retval)
1437 return retval;
1438 end_break(info);
1439 return 0;
1440 case TIOCGSOFTCAR:
1441 /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1442 put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1443 return 0;
1444 case TIOCSSOFTCAR:
1445 error = get_user(arg, (unsigned int *) arg);
1446 if (error)
1447 return error;
1448 tty->termios->c_cflag =
1449 ((tty->termios->c_cflag & ~CLOCAL) |
1450 (arg ? CLOCAL : 0));
1451 return 0;
1452 #ifdef maybe
1453 case TIOCSERGETLSR: /* Get line status register */
1454 return get_lsr_info(info, (unsigned int *) arg);
1455 #endif
1456 /*
1457 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1458 * - mask passed in arg for lines of interest
1459 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1460 * Caller should use TIOCGICOUNT to see which one it was
1461 */
1462 case TIOCMIWAIT:
1463 #ifdef modem_control
1464 local_irq_disable();
1465 /* note the counters on entry */
1466 cprev = info->state->icount;
1467 local_irq_enable();
1468 while (1) {
1469 interruptible_sleep_on(&info->delta_msr_wait);
1470 /* see if a signal did it */
1471 if (signal_pending(current))
1472 return -ERESTARTSYS;
1473 local_irq_disable();
1474 cnow = info->state->icount; /* atomic copy */
1475 local_irq_enable();
1476 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
1477 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1478 return -EIO; /* no change => error */
1479 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1480 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1481 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1482 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1483 return 0;
1485 cprev = cnow;
1487 /* NOTREACHED */
1488 #else
1489 return 0;
1490 #endif
1492 /*
1493 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1494 * Return: write counters to the user passed counter struct
1495 * NB: both 1->0 and 0->1 transitions are counted except for
1496 * RI where only 0->1 is counted.
1497 */
1498 case TIOCGICOUNT:
1499 local_irq_disable();
1500 cnow = info->state->icount;
1501 local_irq_enable();
1502 p_cuser = (struct serial_icounter_struct *) arg;
1503 /* error = put_user(cnow.cts, &p_cuser->cts); */
1504 /* if (error) return error; */
1505 /* error = put_user(cnow.dsr, &p_cuser->dsr); */
1506 /* if (error) return error; */
1507 /* error = put_user(cnow.rng, &p_cuser->rng); */
1508 /* if (error) return error; */
1509 /* error = put_user(cnow.dcd, &p_cuser->dcd); */
1510 /* if (error) return error; */
1512 put_user(cnow.cts, &p_cuser->cts);
1513 put_user(cnow.dsr, &p_cuser->dsr);
1514 put_user(cnow.rng, &p_cuser->rng);
1515 put_user(cnow.dcd, &p_cuser->dcd);
1516 return 0;
1518 default:
1519 return -ENOIOCTLCMD;
1521 return 0;
1524 /* FIX UP modem control here someday......
1525 */
1526 static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
1528 ser_info_t *info = (ser_info_t *)tty->driver_data;
1530 if ( (tty->termios->c_cflag == old_termios->c_cflag)
1531 && ( RELEVANT_IFLAG(tty->termios->c_iflag)
1532 == RELEVANT_IFLAG(old_termios->c_iflag)))
1533 return;
1535 change_speed(info);
1537 #ifdef modem_control
1538 /* Handle transition to B0 status */
1539 if ((old_termios->c_cflag & CBAUD) &&
1540 !(tty->termios->c_cflag & CBAUD)) {
1541 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1542 local_irq_disable();
1543 serial_out(info, UART_MCR, info->MCR);
1544 local_irq_enable();
1547 /* Handle transition away from B0 status */
1548 if (!(old_termios->c_cflag & CBAUD) &&
1549 (tty->termios->c_cflag & CBAUD)) {
1550 info->MCR |= UART_MCR_DTR;
1551 if (!tty->hw_stopped ||
1552 !(tty->termios->c_cflag & CRTSCTS)) {
1553 info->MCR |= UART_MCR_RTS;
1555 local_irq_disable();
1556 serial_out(info, UART_MCR, info->MCR);
1557 local_irq_enable();
1560 /* Handle turning off CRTSCTS */
1561 if ((old_termios->c_cflag & CRTSCTS) &&
1562 !(tty->termios->c_cflag & CRTSCTS)) {
1563 tty->hw_stopped = 0;
1564 rs_360_start(tty);
1566 #endif
1568 #if 0
1569 /*
1570 * No need to wake up processes in open wait, since they
1571 * sample the CLOCAL flag once, and don't recheck it.
1572 * XXX It's not clear whether the current behavior is correct
1573 * or not. Hence, this may change.....
1574 */
1575 if (!(old_termios->c_cflag & CLOCAL) &&
1576 (tty->termios->c_cflag & CLOCAL))
1577 wake_up_interruptible(&info->open_wait);
1578 #endif
1581 /*
1582 * ------------------------------------------------------------
1583 * rs_close()
1585 * This routine is called when the serial port gets closed. First, we
1586 * wait for the last remaining data to be sent. Then, we unlink its
1587 * async structure from the interrupt chain if necessary, and we free
1588 * that IRQ if nothing is left in the chain.
1589 * ------------------------------------------------------------
1590 */
1591 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1593 ser_info_t *info = (ser_info_t *)tty->driver_data;
1594 /* struct async_state *state; */
1595 struct serial_state *state;
1596 unsigned long flags;
1597 int idx;
1598 volatile struct smc_regs *smcp;
1599 volatile struct scc_regs *sccp;
1601 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1602 return;
1604 state = info->state;
1606 local_irq_save(flags);
1608 if (tty_hung_up_p(filp)) {
1609 DBG_CNT("before DEC-hung");
1610 local_irq_restore(flags);
1611 return;
1614 #ifdef SERIAL_DEBUG_OPEN
1615 printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1616 #endif
1617 if ((tty->count == 1) && (state->count != 1)) {
1618 /*
1619 * Uh, oh. tty->count is 1, which means that the tty
1620 * structure will be freed. state->count should always
1621 * be one in these conditions. If it's greater than
1622 * one, we've got real problems, since it means the
1623 * serial port won't be shutdown.
1624 */
1625 printk("rs_close: bad serial port count; tty->count is 1, "
1626 "state->count is %d\n", state->count);
1627 state->count = 1;
1629 if (--state->count < 0) {
1630 printk("rs_close: bad serial port count for ttys%d: %d\n",
1631 info->line, state->count);
1632 state->count = 0;
1634 if (state->count) {
1635 DBG_CNT("before DEC-2");
1636 local_irq_restore(flags);
1637 return;
1639 info->flags |= ASYNC_CLOSING;
1640 /*
1641 * Now we wait for the transmit buffer to clear; and we notify
1642 * the line discipline to only process XON/XOFF characters.
1643 */
1644 tty->closing = 1;
1645 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1646 tty_wait_until_sent(tty, info->closing_wait);
1647 /*
1648 * At this point we stop accepting input. To do this, we
1649 * disable the receive line status interrupts, and tell the
1650 * interrupt driver to stop checking the data ready bit in the
1651 * line status register.
1652 */
1653 info->read_status_mask &= ~BD_SC_EMPTY;
1654 if (info->flags & ASYNC_INITIALIZED) {
1656 idx = PORT_NUM(info->state->smc_scc_num);
1657 if (info->state->smc_scc_num & NUM_IS_SCC) {
1658 sccp = &pquicc->scc_regs[idx];
1659 sccp->scc_sccm &= ~UART_SCCM_RX;
1660 sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1661 } else {
1662 smcp = &pquicc->smc_regs[idx];
1663 smcp->smc_smcm &= ~SMCM_RX;
1664 smcp->smc_smcmr &= ~SMCMR_REN;
1666 /*
1667 * Before we drop DTR, make sure the UART transmitter
1668 * has completely drained; this is especially
1669 * important if there is a transmit FIFO!
1670 */
1671 rs_360_wait_until_sent(tty, info->timeout);
1673 shutdown(info);
1674 if (tty->driver->flush_buffer)
1675 tty->driver->flush_buffer(tty);
1676 tty_ldisc_flush(tty);
1677 tty->closing = 0;
1678 info->event = 0;
1679 info->tty = 0;
1680 if (info->blocked_open) {
1681 if (info->close_delay) {
1682 msleep_interruptible(jiffies_to_msecs(info->close_delay));
1684 wake_up_interruptible(&info->open_wait);
1686 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1687 wake_up_interruptible(&info->close_wait);
1688 local_irq_restore(flags);
1691 /*
1692 * rs_wait_until_sent() --- wait until the transmitter is empty
1693 */
1694 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1696 ser_info_t *info = (ser_info_t *)tty->driver_data;
1697 unsigned long orig_jiffies, char_time;
1698 /*int lsr;*/
1699 volatile QUICC_BD *bdp;
1701 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1702 return;
1704 #ifdef maybe
1705 if (info->state->type == PORT_UNKNOWN)
1706 return;
1707 #endif
1709 orig_jiffies = jiffies;
1710 /*
1711 * Set the check interval to be 1/5 of the estimated time to
1712 * send a single character, and make it at least 1. The check
1713 * interval should also be less than the timeout.
1715 * Note: we have to use pretty tight timings here to satisfy
1716 * the NIST-PCTS.
1717 */
1718 char_time = 1;
1719 if (timeout)
1720 char_time = min(char_time, (unsigned long)timeout);
1721 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1722 printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1723 printk("jiff=%lu...", jiffies);
1724 #endif
1726 /* We go through the loop at least once because we can't tell
1727 * exactly when the last character exits the shifter. There can
1728 * be at least two characters waiting to be sent after the buffers
1729 * are empty.
1730 */
1731 do {
1732 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1733 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1734 #endif
1735 /* current->counter = 0; make us low-priority */
1736 msleep_interruptible(jiffies_to_msecs(char_time));
1737 if (signal_pending(current))
1738 break;
1739 if (timeout && ((orig_jiffies + timeout) < jiffies))
1740 break;
1741 /* The 'tx_cur' is really the next buffer to send. We
1742 * have to back up to the previous BD and wait for it
1743 * to go. This isn't perfect, because all this indicates
1744 * is the buffer is available. There are still characters
1745 * in the CPM FIFO.
1746 */
1747 bdp = info->tx_cur;
1748 if (bdp == info->tx_bd_base)
1749 bdp += (TX_NUM_FIFO-1);
1750 else
1751 bdp--;
1752 } while (bdp->status & BD_SC_READY);
1753 current->state = TASK_RUNNING;
1754 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1755 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1756 #endif
1759 /*
1760 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1761 */
1762 static void rs_360_hangup(struct tty_struct *tty)
1764 ser_info_t *info = (ser_info_t *)tty->driver_data;
1765 struct serial_state *state = info->state;
1767 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1768 return;
1770 state = info->state;
1772 rs_360_flush_buffer(tty);
1773 shutdown(info);
1774 info->event = 0;
1775 state->count = 0;
1776 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1777 info->tty = 0;
1778 wake_up_interruptible(&info->open_wait);
1781 /*
1782 * ------------------------------------------------------------
1783 * rs_open() and friends
1784 * ------------------------------------------------------------
1785 */
1786 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1787 ser_info_t *info)
1789 #ifdef DO_THIS_LATER
1790 DECLARE_WAITQUEUE(wait, current);
1791 #endif
1792 struct serial_state *state = info->state;
1793 int retval;
1794 int do_clocal = 0;
1796 /*
1797 * If the device is in the middle of being closed, then block
1798 * until it's done, and then try again.
1799 */
1800 if (tty_hung_up_p(filp) ||
1801 (info->flags & ASYNC_CLOSING)) {
1802 if (info->flags & ASYNC_CLOSING)
1803 interruptible_sleep_on(&info->close_wait);
1804 #ifdef SERIAL_DO_RESTART
1805 if (info->flags & ASYNC_HUP_NOTIFY)
1806 return -EAGAIN;
1807 else
1808 return -ERESTARTSYS;
1809 #else
1810 return -EAGAIN;
1811 #endif
1814 /*
1815 * If non-blocking mode is set, or the port is not enabled,
1816 * then make the check up front and then exit.
1817 * If this is an SMC port, we don't have modem control to wait
1818 * for, so just get out here.
1819 */
1820 if ((filp->f_flags & O_NONBLOCK) ||
1821 (tty->flags & (1 << TTY_IO_ERROR)) ||
1822 !(info->state->smc_scc_num & NUM_IS_SCC)) {
1823 info->flags |= ASYNC_NORMAL_ACTIVE;
1824 return 0;
1827 if (tty->termios->c_cflag & CLOCAL)
1828 do_clocal = 1;
1830 /*
1831 * Block waiting for the carrier detect and the line to become
1832 * free (i.e., not in use by the callout). While we are in
1833 * this loop, state->count is dropped by one, so that
1834 * rs_close() knows when to free things. We restore it upon
1835 * exit, either normal or abnormal.
1836 */
1837 retval = 0;
1838 #ifdef DO_THIS_LATER
1839 add_wait_queue(&info->open_wait, &wait);
1840 #ifdef SERIAL_DEBUG_OPEN
1841 printk("block_til_ready before block: ttys%d, count = %d\n",
1842 state->line, state->count);
1843 #endif
1844 local_irq_disable();
1845 if (!tty_hung_up_p(filp))
1846 state->count--;
1847 local_irq_enable();
1848 info->blocked_open++;
1849 while (1) {
1850 local_irq_disable();
1851 if (tty->termios->c_cflag & CBAUD)
1852 serial_out(info, UART_MCR,
1853 serial_inp(info, UART_MCR) |
1854 (UART_MCR_DTR | UART_MCR_RTS));
1855 local_irq_enable();
1856 set_current_state(TASK_INTERRUPTIBLE);
1857 if (tty_hung_up_p(filp) ||
1858 !(info->flags & ASYNC_INITIALIZED)) {
1859 #ifdef SERIAL_DO_RESTART
1860 if (info->flags & ASYNC_HUP_NOTIFY)
1861 retval = -EAGAIN;
1862 else
1863 retval = -ERESTARTSYS;
1864 #else
1865 retval = -EAGAIN;
1866 #endif
1867 break;
1869 if (!(info->flags & ASYNC_CLOSING) &&
1870 (do_clocal || (serial_in(info, UART_MSR) &
1871 UART_MSR_DCD)))
1872 break;
1873 if (signal_pending(current)) {
1874 retval = -ERESTARTSYS;
1875 break;
1877 #ifdef SERIAL_DEBUG_OPEN
1878 printk("block_til_ready blocking: ttys%d, count = %d\n",
1879 info->line, state->count);
1880 #endif
1881 schedule();
1883 current->state = TASK_RUNNING;
1884 remove_wait_queue(&info->open_wait, &wait);
1885 if (!tty_hung_up_p(filp))
1886 state->count++;
1887 info->blocked_open--;
1888 #ifdef SERIAL_DEBUG_OPEN
1889 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1890 info->line, state->count);
1891 #endif
1892 #endif /* DO_THIS_LATER */
1893 if (retval)
1894 return retval;
1895 info->flags |= ASYNC_NORMAL_ACTIVE;
1896 return 0;
1899 static int get_async_struct(int line, ser_info_t **ret_info)
1901 struct serial_state *sstate;
1903 sstate = rs_table + line;
1904 if (sstate->info) {
1905 sstate->count++;
1906 *ret_info = (ser_info_t *)sstate->info;
1907 return 0;
1909 else {
1910 return -ENOMEM;
1914 /*
1915 * This routine is called whenever a serial port is opened. It
1916 * enables interrupts for a serial port, linking in its async structure into
1917 * the IRQ chain. It also performs the serial-specific
1918 * initialization for the tty structure.
1919 */
1920 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1922 ser_info_t *info;
1923 int retval, line;
1925 line = tty->index;
1926 if ((line < 0) || (line >= NR_PORTS))
1927 return -ENODEV;
1928 retval = get_async_struct(line, &info);
1929 if (retval)
1930 return retval;
1931 if (serial_paranoia_check(info, tty->name, "rs_open"))
1932 return -ENODEV;
1934 #ifdef SERIAL_DEBUG_OPEN
1935 printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1936 #endif
1937 tty->driver_data = info;
1938 info->tty = tty;
1940 /*
1941 * Start up serial port
1942 */
1943 retval = startup(info);
1944 if (retval)
1945 return retval;
1947 retval = block_til_ready(tty, filp, info);
1948 if (retval) {
1949 #ifdef SERIAL_DEBUG_OPEN
1950 printk("rs_open returning after block_til_ready with %d\n",
1951 retval);
1952 #endif
1953 return retval;
1956 #ifdef SERIAL_DEBUG_OPEN
1957 printk("rs_open %s successful...", tty->name);
1958 #endif
1959 return 0;
1962 /*
1963 * /proc fs routines....
1964 */
1966 static inline int line_info(char *buf, struct serial_state *state)
1968 #ifdef notdef
1969 struct async_struct *info = state->info, scr_info;
1970 char stat_buf[30], control, status;
1971 #endif
1972 int ret;
1974 ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
1975 state->line,
1976 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
1977 (unsigned int)(state->port), state->irq);
1979 if (!state->port || (state->type == PORT_UNKNOWN)) {
1980 ret += sprintf(buf+ret, "\n");
1981 return ret;
1984 #ifdef notdef
1985 /*
1986 * Figure out the current RS-232 lines
1987 */
1988 if (!info) {
1989 info = &scr_info; /* This is just for serial_{in,out} */
1991 info->magic = SERIAL_MAGIC;
1992 info->port = state->port;
1993 info->flags = state->flags;
1994 info->quot = 0;
1995 info->tty = 0;
1997 local_irq_disable();
1998 status = serial_in(info, UART_MSR);
1999 control = info ? info->MCR : serial_in(info, UART_MCR);
2000 local_irq_enable();
2002 stat_buf[0] = 0;
2003 stat_buf[1] = 0;
2004 if (control & UART_MCR_RTS)
2005 strcat(stat_buf, "|RTS");
2006 if (status & UART_MSR_CTS)
2007 strcat(stat_buf, "|CTS");
2008 if (control & UART_MCR_DTR)
2009 strcat(stat_buf, "|DTR");
2010 if (status & UART_MSR_DSR)
2011 strcat(stat_buf, "|DSR");
2012 if (status & UART_MSR_DCD)
2013 strcat(stat_buf, "|CD");
2014 if (status & UART_MSR_RI)
2015 strcat(stat_buf, "|RI");
2017 if (info->quot) {
2018 ret += sprintf(buf+ret, " baud:%d",
2019 state->baud_base / info->quot);
2022 ret += sprintf(buf+ret, " tx:%d rx:%d",
2023 state->icount.tx, state->icount.rx);
2025 if (state->icount.frame)
2026 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2028 if (state->icount.parity)
2029 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2031 if (state->icount.brk)
2032 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
2034 if (state->icount.overrun)
2035 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2037 /*
2038 * Last thing is the RS-232 status lines
2039 */
2040 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2041 #endif
2042 return ret;
2045 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2046 int *eof, void *data)
2048 int i, len = 0;
2049 off_t begin = 0;
2051 len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2052 for (i = 0; i < NR_PORTS && len < 4000; i++) {
2053 len += line_info(page + len, &rs_table[i]);
2054 if (len+begin > off+count)
2055 goto done;
2056 if (len+begin < off) {
2057 begin += len;
2058 len = 0;
2061 *eof = 1;
2062 done:
2063 if (off >= len+begin)
2064 return 0;
2065 *start = page + (begin-off);
2066 return ((count < begin+len-off) ? count : begin+len-off);
2069 /*
2070 * ---------------------------------------------------------------------
2071 * rs_init() and friends
2073 * rs_init() is called at boot-time to initialize the serial driver.
2074 * ---------------------------------------------------------------------
2075 */
2077 /*
2078 * This routine prints out the appropriate serial driver version
2079 * number, and identifies which options were configured into this
2080 * driver.
2081 */
2082 static _INLINE_ void show_serial_version(void)
2084 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2088 /*
2089 * The serial console driver used during boot. Note that these names
2090 * clash with those found in "serial.c", so we currently can't support
2091 * the 16xxx uarts and these at the same time. I will fix this to become
2092 * an indirect function call from tty_io.c (or something).
2093 */
2095 #ifdef CONFIG_SERIAL_CONSOLE
2097 /*
2098 * Print a string to the serial port trying not to disturb any possible
2099 * real use of the port...
2100 */
2101 static void my_console_write(int idx, const char *s,
2102 unsigned count)
2104 struct serial_state *ser;
2105 ser_info_t *info;
2106 unsigned i;
2107 QUICC_BD *bdp, *bdbase;
2108 volatile struct smc_uart_pram *up;
2109 volatile u_char *cp;
2111 ser = rs_table + idx;
2114 /* If the port has been initialized for general use, we have
2115 * to use the buffer descriptors allocated there. Otherwise,
2116 * we simply use the single buffer allocated.
2117 */
2118 if ((info = (ser_info_t *)ser->info) != NULL) {
2119 bdp = info->tx_cur;
2120 bdbase = info->tx_bd_base;
2122 else {
2123 /* Pointer to UART in parameter ram.
2124 */
2125 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2126 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2128 /* Get the address of the host memory buffer.
2129 */
2130 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2133 /*
2134 * We need to gracefully shut down the transmitter, disable
2135 * interrupts, then send our bytes out.
2136 */
2138 /*
2139 * Now, do each character. This is not as bad as it looks
2140 * since this is a holding FIFO and not a transmitting FIFO.
2141 * We could add the complexity of filling the entire transmit
2142 * buffer, but we would just wait longer between accesses......
2143 */
2144 for (i = 0; i < count; i++, s++) {
2145 /* Wait for transmitter fifo to empty.
2146 * Ready indicates output is ready, and xmt is doing
2147 * that, not that it is ready for us to send.
2148 */
2149 while (bdp->status & BD_SC_READY);
2151 /* Send the character out.
2152 */
2153 cp = bdp->buf;
2154 *cp = *s;
2156 bdp->length = 1;
2157 bdp->status |= BD_SC_READY;
2159 if (bdp->status & BD_SC_WRAP)
2160 bdp = bdbase;
2161 else
2162 bdp++;
2164 /* if a LF, also do CR... */
2165 if (*s == 10) {
2166 while (bdp->status & BD_SC_READY);
2167 /* cp = __va(bdp->buf); */
2168 cp = bdp->buf;
2169 *cp = 13;
2170 bdp->length = 1;
2171 bdp->status |= BD_SC_READY;
2173 if (bdp->status & BD_SC_WRAP) {
2174 bdp = bdbase;
2176 else {
2177 bdp++;
2182 /*
2183 * Finally, Wait for transmitter & holding register to empty
2184 * and restore the IER
2185 */
2186 while (bdp->status & BD_SC_READY);
2188 if (info)
2189 info->tx_cur = (QUICC_BD *)bdp;
2192 static void serial_console_write(struct console *c, const char *s,
2193 unsigned count)
2195 #ifdef CONFIG_KGDB
2196 /* Try to let stub handle output. Returns true if it did. */
2197 if (kgdb_output_string(s, count))
2198 return;
2199 #endif
2200 my_console_write(c->index, s, count);
2205 /*void console_print_68360(const char *p)
2207 const char *cp = p;
2208 int i;
2210 for (i=0;cp[i]!=0;i++);
2212 serial_console_write (p, i);
2214 //Comment this if you want to have a strict interrupt-driven output
2215 //rs_fair_output();
2217 return;
2218 }*/
2225 #ifdef CONFIG_XMON
2226 int
2227 xmon_360_write(const char *s, unsigned count)
2229 my_console_write(0, s, count);
2230 return(count);
2232 #endif
2234 #ifdef CONFIG_KGDB
2235 void
2236 putDebugChar(char ch)
2238 my_console_write(0, &ch, 1);
2240 #endif
2242 /*
2243 * Receive character from the serial port. This only works well
2244 * before the port is initialized for real use.
2245 */
2246 static int my_console_wait_key(int idx, int xmon, char *obuf)
2248 struct serial_state *ser;
2249 u_char c, *cp;
2250 ser_info_t *info;
2251 QUICC_BD *bdp;
2252 volatile struct smc_uart_pram *up;
2253 int i;
2255 ser = rs_table + idx;
2257 /* Get the address of the host memory buffer.
2258 * If the port has been initialized for general use, we must
2259 * use information from the port structure.
2260 */
2261 if ((info = (ser_info_t *)ser->info))
2262 bdp = info->rx_cur;
2263 else
2264 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2265 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2267 /* Pointer to UART in parameter ram.
2268 */
2269 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2270 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2272 /*
2273 * We need to gracefully shut down the receiver, disable
2274 * interrupts, then read the input.
2275 * XMON just wants a poll. If no character, return -1, else
2276 * return the character.
2277 */
2278 if (!xmon) {
2279 while (bdp->status & BD_SC_EMPTY);
2281 else {
2282 if (bdp->status & BD_SC_EMPTY)
2283 return -1;
2286 cp = (char *)bdp->buf;
2288 if (obuf) {
2289 i = c = bdp->length;
2290 while (i-- > 0)
2291 *obuf++ = *cp++;
2293 else {
2294 c = *cp;
2296 bdp->status |= BD_SC_EMPTY;
2298 if (info) {
2299 if (bdp->status & BD_SC_WRAP) {
2300 bdp = info->rx_bd_base;
2302 else {
2303 bdp++;
2305 info->rx_cur = (QUICC_BD *)bdp;
2308 return((int)c);
2311 static int serial_console_wait_key(struct console *co)
2313 return(my_console_wait_key(co->index, 0, NULL));
2316 #ifdef CONFIG_XMON
2317 int
2318 xmon_360_read_poll(void)
2320 return(my_console_wait_key(0, 1, NULL));
2323 int
2324 xmon_360_read_char(void)
2326 return(my_console_wait_key(0, 0, NULL));
2328 #endif
2330 #ifdef CONFIG_KGDB
2331 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2332 static int kgdb_chars;
2334 unsigned char
2335 getDebugChar(void)
2337 if (kgdb_chars <= 0) {
2338 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2339 kgdp = kgdb_buf;
2341 kgdb_chars--;
2343 return(*kgdp++);
2346 void kgdb_interruptible(int state)
2349 void kgdb_map_scc(void)
2351 struct serial_state *ser;
2352 uint mem_addr;
2353 volatile QUICC_BD *bdp;
2354 volatile smc_uart_t *up;
2356 cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2358 /* To avoid data cache CPM DMA coherency problems, allocate a
2359 * buffer in the CPM DPRAM. This will work until the CPM and
2360 * serial ports are initialized. At that time a memory buffer
2361 * will be allocated.
2362 * The port is already initialized from the boot procedure, all
2363 * we do here is give it a different buffer and make it a FIFO.
2364 */
2366 ser = rs_table;
2368 /* Right now, assume we are using SMCs.
2369 */
2370 up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2372 /* Allocate space for an input FIFO, plus a few bytes for output.
2373 * Allocate bytes to maintain word alignment.
2374 */
2375 mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2377 /* Set the physical address of the host memory buffers in
2378 * the buffer descriptors.
2379 */
2380 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2381 bdp->buf = mem_addr;
2383 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2384 bdp->buf = mem_addr+RX_BUF_SIZE;
2386 up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
2387 up->smc_maxidl = RX_BUF_SIZE;
2389 #endif
2391 static struct tty_struct *serial_console_device(struct console *c, int *index)
2393 *index = c->index;
2394 return serial_driver;
2398 struct console sercons = {
2399 .name = "ttyS",
2400 .write = serial_console_write,
2401 .device = serial_console_device,
2402 .wait_key = serial_console_wait_key,
2403 .setup = serial_console_setup,
2404 .flags = CON_PRINTBUFFER,
2405 .index = CONFIG_SERIAL_CONSOLE_PORT,
2406 };
2410 /*
2411 * Register console.
2412 */
2413 long console_360_init(long kmem_start, long kmem_end)
2415 register_console(&sercons);
2416 /*register_console (console_print_68360); - 2.0.38 only required a write
2417 function pointer. */
2418 return kmem_start;
2421 #endif
2423 /* Index in baud rate table of the default console baud rate.
2424 */
2425 static int baud_idx;
2427 static struct tty_operations rs_360_ops = {
2428 .owner = THIS_MODULE,
2429 .open = rs_360_open,
2430 .close = rs_360_close,
2431 .write = rs_360_write,
2432 .put_char = rs_360_put_char,
2433 .write_room = rs_360_write_room,
2434 .chars_in_buffer = rs_360_chars_in_buffer,
2435 .flush_buffer = rs_360_flush_buffer,
2436 .ioctl = rs_360_ioctl,
2437 .throttle = rs_360_throttle,
2438 .unthrottle = rs_360_unthrottle,
2439 /* .send_xchar = rs_360_send_xchar, */
2440 .set_termios = rs_360_set_termios,
2441 .stop = rs_360_stop,
2442 .start = rs_360_start,
2443 .hangup = rs_360_hangup,
2444 /* .wait_until_sent = rs_360_wait_until_sent, */
2445 /* .read_proc = rs_360_read_proc, */
2446 .tiocmget = rs_360_tiocmget,
2447 .tiocmset = rs_360_tiocmset,
2448 };
2450 static int __init rs_360_init(void)
2452 struct serial_state * state;
2453 ser_info_t *info;
2454 void *mem_addr;
2455 uint dp_addr, iobits;
2456 int i, j, idx;
2457 ushort chan;
2458 QUICC_BD *bdp;
2459 volatile QUICC *cp;
2460 volatile struct smc_regs *sp;
2461 volatile struct smc_uart_pram *up;
2462 volatile struct scc_regs *scp;
2463 volatile struct uart_pram *sup;
2464 /* volatile immap_t *immap; */
2466 serial_driver = alloc_tty_driver(NR_PORTS);
2467 if (!serial_driver)
2468 return -1;
2470 show_serial_version();
2472 serial_driver->name = "ttyS";
2473 serial_driver->major = TTY_MAJOR;
2474 serial_driver->minor_start = 64;
2475 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2476 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2477 serial_driver->init_termios = tty_std_termios;
2478 serial_driver->init_termios.c_cflag =
2479 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2480 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2481 tty_set_operations(serial_driver, &rs_360_ops);
2483 if (tty_register_driver(serial_driver))
2484 panic("Couldn't register serial driver\n");
2486 cp = pquicc; /* Get pointer to Communication Processor */
2487 /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
2490 /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2491 */
2492 /* The "standard" configuration through the 860.
2493 */
2494 /* immap->im_ioport.iop_papar |= 0x00fc; */
2495 /* immap->im_ioport.iop_padir &= ~0x00fc; */
2496 /* immap->im_ioport.iop_paodr &= ~0x00fc; */
2497 cp->pio_papar |= 0x00fc;
2498 cp->pio_padir &= ~0x00fc;
2499 /* cp->pio_paodr &= ~0x00fc; */
2502 /* Since we don't yet do modem control, connect the port C pins
2503 * as general purpose I/O. This will assert CTS and CD for the
2504 * SCC ports.
2505 */
2506 /* FIXME: see 360um p.7-365 and 860um p.34-12
2507 * I can't make sense of these bits - mleslie*/
2508 /* immap->im_ioport.iop_pcdir |= 0x03c6; */
2509 /* immap->im_ioport.iop_pcpar &= ~0x03c6; */
2511 /* cp->pio_pcdir |= 0x03c6; */
2512 /* cp->pio_pcpar &= ~0x03c6; */
2516 /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
2517 * BRG4 to SCC3.
2518 */
2519 cp->si_sicr &= ~0x00ffff00;
2520 cp->si_sicr |= 0x001b1200;
2522 #ifdef CONFIG_PP04
2523 /* Frequentis PP04 forced to RS-232 until we know better.
2524 * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2525 */
2526 immap->im_ioport.iop_pcdir |= 0x000c;
2527 immap->im_ioport.iop_pcpar &= ~0x000c;
2528 immap->im_ioport.iop_pcdat &= ~0x000c;
2530 /* This enables the TX driver.
2531 */
2532 cp->cp_pbpar &= ~0x6000;
2533 cp->cp_pbdat &= ~0x6000;
2534 #endif
2536 for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2537 state->magic = SSTATE_MAGIC;
2538 state->line = i;
2539 state->type = PORT_UNKNOWN;
2540 state->custom_divisor = 0;
2541 state->close_delay = 5*HZ/10;
2542 state->closing_wait = 30*HZ;
2543 state->icount.cts = state->icount.dsr =
2544 state->icount.rng = state->icount.dcd = 0;
2545 state->icount.rx = state->icount.tx = 0;
2546 state->icount.frame = state->icount.parity = 0;
2547 state->icount.overrun = state->icount.brk = 0;
2548 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2549 i, (unsigned int)(state->irq),
2550 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2552 #ifdef CONFIG_SERIAL_CONSOLE
2553 /* If we just printed the message on the console port, and
2554 * we are about to initialize it for general use, we have
2555 * to wait a couple of character times for the CR/NL to
2556 * make it out of the transmit buffer.
2557 */
2558 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2559 mdelay(8);
2562 /* idx = PORT_NUM(info->state->smc_scc_num); */
2563 /* if (info->state->smc_scc_num & NUM_IS_SCC) */
2564 /* chan = scc_chan_map[idx]; */
2565 /* else */
2566 /* chan = smc_chan_map[idx]; */
2568 /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2569 /* while (cp->cp_cr & CPM_CR_FLG); */
2571 #endif
2572 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2573 info = &quicc_ser_info[i];
2574 if (info) {
2575 memset (info, 0, sizeof(ser_info_t));
2576 info->magic = SERIAL_MAGIC;
2577 info->line = i;
2578 info->flags = state->flags;
2579 INIT_WORK(&info->tqueue, do_softint, info);
2580 INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2581 init_waitqueue_head(&info->open_wait);
2582 init_waitqueue_head(&info->close_wait);
2583 info->state = state;
2584 state->info = (struct async_struct *)info;
2586 /* We need to allocate a transmit and receive buffer
2587 * descriptors from dual port ram, and a character
2588 * buffer area from host mem.
2589 */
2590 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2592 /* Allocate space for FIFOs in the host memory.
2593 * (for now this is from a static array of buffers :(
2594 */
2595 /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2596 /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2597 mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2599 /* Set the physical address of the host memory
2600 * buffers in the buffer descriptors, and the
2601 * virtual address for us to work with.
2602 */
2603 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2604 info->rx_cur = info->rx_bd_base = bdp;
2606 /* initialize rx buffer descriptors */
2607 for (j=0; j<(RX_NUM_FIFO-1); j++) {
2608 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2609 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2610 mem_addr += RX_BUF_SIZE;
2611 bdp++;
2613 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2614 bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2617 idx = PORT_NUM(info->state->smc_scc_num);
2618 if (info->state->smc_scc_num & NUM_IS_SCC) {
2620 #if defined (CONFIG_UCQUICC) && 1
2621 /* set the transceiver mode to RS232 */
2622 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2623 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2624 *(uint *)_periph_base = sipex_mode_bits;
2625 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2626 #endif
2629 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2631 /* Allocate space for FIFOs in the host memory.
2632 */
2633 /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2634 /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2635 mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2637 /* Set the physical address of the host memory
2638 * buffers in the buffer descriptors, and the
2639 * virtual address for us to work with.
2640 */
2641 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2642 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2643 info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2645 /* initialize tx buffer descriptors */
2646 for (j=0; j<(TX_NUM_FIFO-1); j++) {
2647 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2648 bdp->status = BD_SC_INTRPT;
2649 mem_addr += TX_BUF_SIZE;
2650 bdp++;
2652 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2653 bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2655 if (info->state->smc_scc_num & NUM_IS_SCC) {
2656 scp = &pquicc->scc_regs[idx];
2657 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2658 sup->rbase = dp_addr;
2659 sup->tbase = dp_addr;
2661 /* Set up the uart parameters in the
2662 * parameter ram.
2663 */
2664 sup->rfcr = SMC_EB;
2665 sup->tfcr = SMC_EB;
2667 /* Set this to 1 for now, so we get single
2668 * character interrupts. Using idle charater
2669 * time requires some additional tuning.
2670 */
2671 sup->mrblr = 1;
2672 sup->max_idl = 0;
2673 sup->brkcr = 1;
2674 sup->parec = 0;
2675 sup->frmer = 0;
2676 sup->nosec = 0;
2677 sup->brkec = 0;
2678 sup->uaddr1 = 0;
2679 sup->uaddr2 = 0;
2680 sup->toseq = 0;
2682 int i;
2683 for (i=0;i<8;i++)
2684 sup->cc[i] = 0x8000;
2686 sup->rccm = 0xc0ff;
2688 /* Send the CPM an initialize command.
2689 */
2690 chan = scc_chan_map[idx];
2692 /* execute the INIT RX & TX PARAMS command for this channel. */
2693 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2694 while (cp->cp_cr & CPM_CR_FLG);
2696 /* Set UART mode, 8 bit, no parity, one stop.
2697 * Enable receive and transmit.
2698 */
2699 scp->scc_gsmr.w.high = 0;
2700 scp->scc_gsmr.w.low =
2701 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2703 /* Disable all interrupts and clear all pending
2704 * events.
2705 */
2706 scp->scc_sccm = 0;
2707 scp->scc_scce = 0xffff;
2708 scp->scc_dsr = 0x7e7e;
2709 scp->scc_psmr = 0x3000;
2711 /* If the port is the console, enable Rx and Tx.
2712 */
2713 #ifdef CONFIG_SERIAL_CONSOLE
2714 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2715 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2716 #endif
2718 else {
2719 /* Configure SMCs Tx/Rx instead of port B
2720 * parallel I/O.
2721 */
2722 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2723 up->rbase = dp_addr;
2725 iobits = 0xc0 << (idx * 4);
2726 cp->pip_pbpar |= iobits;
2727 cp->pip_pbdir &= ~iobits;
2728 cp->pip_pbodr &= ~iobits;
2731 /* Connect the baud rate generator to the
2732 * SMC based upon index in rs_table. Also
2733 * make sure it is connected to NMSI.
2734 */
2735 cp->si_simode &= ~(0xffff << (idx * 16));
2736 cp->si_simode |= (i << ((idx * 16) + 12));
2738 up->tbase = dp_addr;
2740 /* Set up the uart parameters in the
2741 * parameter ram.
2742 */
2743 up->rfcr = SMC_EB;
2744 up->tfcr = SMC_EB;
2746 /* Set this to 1 for now, so we get single
2747 * character interrupts. Using idle charater
2748 * time requires some additional tuning.
2749 */
2750 up->mrblr = 1;
2751 up->max_idl = 0;
2752 up->brkcr = 1;
2754 /* Send the CPM an initialize command.
2755 */
2756 chan = smc_chan_map[idx];
2758 cp->cp_cr = mk_cr_cmd(chan,
2759 CPM_CR_INIT_TRX) | CPM_CR_FLG;
2760 #ifdef CONFIG_SERIAL_CONSOLE
2761 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2762 printk("");
2763 #endif
2764 while (cp->cp_cr & CPM_CR_FLG);
2766 /* Set UART mode, 8 bit, no parity, one stop.
2767 * Enable receive and transmit.
2768 */
2769 sp = &cp->smc_regs[idx];
2770 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2772 /* Disable all interrupts and clear all pending
2773 * events.
2774 */
2775 sp->smc_smcm = 0;
2776 sp->smc_smce = 0xff;
2778 /* If the port is the console, enable Rx and Tx.
2779 */
2780 #ifdef CONFIG_SERIAL_CONSOLE
2781 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2782 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2783 #endif
2786 /* Install interrupt handler.
2787 */
2788 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
2789 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2790 request_irq(state->irq, rs_360_interrupt,
2791 IRQ_FLG_LOCK, "ttyS", (void *)info);
2793 /* Set up the baud rate generator.
2794 */
2795 m360_cpm_setbrg(i, baud_table[baud_idx]);
2800 return 0;
2802 module_init(rs_360_init);
2804 /* This must always be called before the rs_360_init() function, otherwise
2805 * it blows away the port control information.
2806 */
2807 //static int __init serial_console_setup( struct console *co, char *options)
2808 int serial_console_setup( struct console *co, char *options)
2810 struct serial_state *ser;
2811 uint mem_addr, dp_addr, bidx, idx, iobits;
2812 ushort chan;
2813 QUICC_BD *bdp;
2814 volatile QUICC *cp;
2815 volatile struct smc_regs *sp;
2816 volatile struct scc_regs *scp;
2817 volatile struct smc_uart_pram *up;
2818 volatile struct uart_pram *sup;
2820 /* mleslie TODO:
2821 * add something to the 68k bootloader to store a desired initial console baud rate */
2823 /* bd_t *bd; */ /* a board info struct used by EPPC-bug */
2824 /* bd = (bd_t *)__res; */
2826 for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2827 /* if (bd->bi_baudrate == baud_table[bidx]) */
2828 if (CONSOLE_BAUDRATE == baud_table[bidx])
2829 break;
2831 /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2832 baud_idx = bidx;
2834 ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2836 cp = pquicc; /* Get pointer to Communication Processor */
2838 idx = PORT_NUM(ser->smc_scc_num);
2839 if (ser->smc_scc_num & NUM_IS_SCC) {
2841 /* TODO: need to set up SCC pin assignment etc. here */
2844 else {
2845 iobits = 0xc0 << (idx * 4);
2846 cp->pip_pbpar |= iobits;
2847 cp->pip_pbdir &= ~iobits;
2848 cp->pip_pbodr &= ~iobits;
2850 /* Connect the baud rate generator to the
2851 * SMC based upon index in rs_table. Also
2852 * make sure it is connected to NMSI.
2853 */
2854 cp->si_simode &= ~(0xffff << (idx * 16));
2855 cp->si_simode |= (idx << ((idx * 16) + 12));
2858 /* When we get here, the CPM has been reset, so we need
2859 * to configure the port.
2860 * We need to allocate a transmit and receive buffer descriptor
2861 * from dual port ram, and a character buffer area from host mem.
2862 */
2864 /* Allocate space for two buffer descriptors in the DP ram.
2865 */
2866 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2868 /* Allocate space for two 2 byte FIFOs in the host memory.
2869 */
2870 /* mem_addr = m360_cpm_hostalloc(8); */
2871 mem_addr = (uint)console_fifos;
2874 /* Set the physical address of the host memory buffers in
2875 * the buffer descriptors.
2876 */
2877 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2878 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2879 bdp->buf = (char *)mem_addr;
2880 (bdp+1)->buf = (char *)(mem_addr+4);
2882 /* For the receive, set empty and wrap.
2883 * For transmit, set wrap.
2884 */
2885 bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2886 (bdp+1)->status = BD_SC_WRAP;
2888 /* Set up the uart parameters in the parameter ram.
2889 */
2890 if (ser->smc_scc_num & NUM_IS_SCC) {
2891 scp = &cp->scc_regs[idx];
2892 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2893 sup = &pquicc->pram[ser->port].scc.pscc.u;
2895 sup->rbase = dp_addr;
2896 sup->tbase = dp_addr + sizeof(QUICC_BD);
2898 /* Set up the uart parameters in the
2899 * parameter ram.
2900 */
2901 sup->rfcr = SMC_EB;
2902 sup->tfcr = SMC_EB;
2904 /* Set this to 1 for now, so we get single
2905 * character interrupts. Using idle charater
2906 * time requires some additional tuning.
2907 */
2908 sup->mrblr = 1;
2909 sup->max_idl = 0;
2910 sup->brkcr = 1;
2911 sup->parec = 0;
2912 sup->frmer = 0;
2913 sup->nosec = 0;
2914 sup->brkec = 0;
2915 sup->uaddr1 = 0;
2916 sup->uaddr2 = 0;
2917 sup->toseq = 0;
2919 int i;
2920 for (i=0;i<8;i++)
2921 sup->cc[i] = 0x8000;
2923 sup->rccm = 0xc0ff;
2925 /* Send the CPM an initialize command.
2926 */
2927 chan = scc_chan_map[idx];
2929 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2930 while (cp->cp_cr & CPM_CR_FLG);
2932 /* Set UART mode, 8 bit, no parity, one stop.
2933 * Enable receive and transmit.
2934 */
2935 scp->scc_gsmr.w.high = 0;
2936 scp->scc_gsmr.w.low =
2937 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2939 /* Disable all interrupts and clear all pending
2940 * events.
2941 */
2942 scp->scc_sccm = 0;
2943 scp->scc_scce = 0xffff;
2944 scp->scc_dsr = 0x7e7e;
2945 scp->scc_psmr = 0x3000;
2947 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2950 else {
2951 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2952 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2954 up->rbase = dp_addr; /* Base of receive buffer desc. */
2955 up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
2956 up->rfcr = SMC_EB;
2957 up->tfcr = SMC_EB;
2959 /* Set this to 1 for now, so we get single character interrupts.
2960 */
2961 up->mrblr = 1; /* receive buffer length */
2962 up->max_idl = 0; /* wait forever for next char */
2964 /* Send the CPM an initialize command.
2965 */
2966 chan = smc_chan_map[idx];
2967 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2968 while (cp->cp_cr & CPM_CR_FLG);
2970 /* Set UART mode, 8 bit, no parity, one stop.
2971 * Enable receive and transmit.
2972 */
2973 sp = &cp->smc_regs[idx];
2974 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2976 /* And finally, enable Rx and Tx.
2977 */
2978 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2981 /* Set up the baud rate generator.
2982 */
2983 /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
2984 m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
2986 return 0;
2989 /*
2990 * Local variables:
2991 * c-indent-level: 4
2992 * c-basic-offset: 4
2993 * tab-width: 4
2994 * End:
2995 */