ia64/linux-2.6.18-xen.hg

view drivers/net/sonic.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * sonic.c
3 *
4 * (C) 2005 Finn Thain
5 *
6 * Converted to DMA API, added zero-copy buffer handling, and
7 * (from the mac68k project) introduced dhd's support for 16-bit cards.
8 *
9 * (C) 1996,1998 by Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 *
11 * This driver is based on work from Andreas Busse, but most of
12 * the code is rewritten.
13 *
14 * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de)
15 *
16 * Core code included by system sonic drivers
17 *
18 * And... partially rewritten again by David Huggins-Daines in order
19 * to cope with screwed up Macintosh NICs that may or may not use
20 * 16-bit DMA.
21 *
22 * (C) 1999 David Huggins-Daines <dhd@debian.org>
23 *
24 */
26 /*
27 * Sources: Olivetti M700-10 Risc Personal Computer hardware handbook,
28 * National Semiconductors data sheet for the DP83932B Sonic Ethernet
29 * controller, and the files "8390.c" and "skeleton.c" in this directory.
30 *
31 * Additional sources: Nat Semi data sheet for the DP83932C and Nat Semi
32 * Application Note AN-746, the files "lance.c" and "ibmlana.c". See also
33 * the NetBSD file "sys/arch/mac68k/dev/if_sn.c".
34 */
38 /*
39 * Open/initialize the SONIC controller.
40 *
41 * This routine should set everything up anew at each open, even
42 * registers that "should" only need to be set once at boot, so that
43 * there is non-reboot way to recover if something goes wrong.
44 */
45 static int sonic_open(struct net_device *dev)
46 {
47 struct sonic_local *lp = netdev_priv(dev);
48 int i;
50 if (sonic_debug > 2)
51 printk("sonic_open: initializing sonic driver.\n");
53 /*
54 * We don't need to deal with auto-irq stuff since we
55 * hardwire the sonic interrupt.
56 */
57 /*
58 * XXX Horrible work around: We install sonic_interrupt as fast interrupt.
59 * This means that during execution of the handler interrupt are disabled
60 * covering another bug otherwise corrupting data. This doesn't mean
61 * this glue works ok under all situations.
62 *
63 * Note (dhd): this also appears to prevent lockups on the Macintrash
64 * when more than one Ethernet card is installed (knock on wood)
65 *
66 * Note (fthain): whether the above is still true is anyones guess. Certainly
67 * the buffer handling algorithms will not tolerate re-entrance without some
68 * mutual exclusion added. Anyway, the memcpy has now been eliminated from the
69 * rx code to make this a faster "fast interrupt".
70 */
71 if (request_irq(dev->irq, &sonic_interrupt, SONIC_IRQ_FLAG, "sonic", dev)) {
72 printk(KERN_ERR "\n%s: unable to get IRQ %d .\n", dev->name, dev->irq);
73 return -EAGAIN;
74 }
76 for (i = 0; i < SONIC_NUM_RRS; i++) {
77 struct sk_buff *skb = dev_alloc_skb(SONIC_RBSIZE + 2);
78 if (skb == NULL) {
79 while(i > 0) { /* free any that were allocated successfully */
80 i--;
81 dev_kfree_skb(lp->rx_skb[i]);
82 lp->rx_skb[i] = NULL;
83 }
84 printk(KERN_ERR "%s: couldn't allocate receive buffers\n",
85 dev->name);
86 return -ENOMEM;
87 }
88 skb->dev = dev;
89 /* align IP header unless DMA requires otherwise */
90 if (SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
91 skb_reserve(skb, 2);
92 lp->rx_skb[i] = skb;
93 }
95 for (i = 0; i < SONIC_NUM_RRS; i++) {
96 dma_addr_t laddr = dma_map_single(lp->device, skb_put(lp->rx_skb[i], SONIC_RBSIZE),
97 SONIC_RBSIZE, DMA_FROM_DEVICE);
98 if (!laddr) {
99 while(i > 0) { /* free any that were mapped successfully */
100 i--;
101 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
102 lp->rx_laddr[i] = (dma_addr_t)0;
103 }
104 for (i = 0; i < SONIC_NUM_RRS; i++) {
105 dev_kfree_skb(lp->rx_skb[i]);
106 lp->rx_skb[i] = NULL;
107 }
108 printk(KERN_ERR "%s: couldn't map rx DMA buffers\n",
109 dev->name);
110 return -ENOMEM;
111 }
112 lp->rx_laddr[i] = laddr;
113 }
115 /*
116 * Initialize the SONIC
117 */
118 sonic_init(dev);
120 netif_start_queue(dev);
122 if (sonic_debug > 2)
123 printk("sonic_open: Initialization done.\n");
125 return 0;
126 }
129 /*
130 * Close the SONIC device
131 */
132 static int sonic_close(struct net_device *dev)
133 {
134 struct sonic_local *lp = netdev_priv(dev);
135 int i;
137 if (sonic_debug > 2)
138 printk("sonic_close\n");
140 netif_stop_queue(dev);
142 /*
143 * stop the SONIC, disable interrupts
144 */
145 SONIC_WRITE(SONIC_IMR, 0);
146 SONIC_WRITE(SONIC_ISR, 0x7fff);
147 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
149 /* unmap and free skbs that haven't been transmitted */
150 for (i = 0; i < SONIC_NUM_TDS; i++) {
151 if(lp->tx_laddr[i]) {
152 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
153 lp->tx_laddr[i] = (dma_addr_t)0;
154 }
155 if(lp->tx_skb[i]) {
156 dev_kfree_skb(lp->tx_skb[i]);
157 lp->tx_skb[i] = NULL;
158 }
159 }
161 /* unmap and free the receive buffers */
162 for (i = 0; i < SONIC_NUM_RRS; i++) {
163 if(lp->rx_laddr[i]) {
164 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
165 lp->rx_laddr[i] = (dma_addr_t)0;
166 }
167 if(lp->rx_skb[i]) {
168 dev_kfree_skb(lp->rx_skb[i]);
169 lp->rx_skb[i] = NULL;
170 }
171 }
173 free_irq(dev->irq, dev); /* release the IRQ */
175 return 0;
176 }
178 static void sonic_tx_timeout(struct net_device *dev)
179 {
180 struct sonic_local *lp = netdev_priv(dev);
181 int i;
182 /* Stop the interrupts for this */
183 SONIC_WRITE(SONIC_IMR, 0);
184 /* We could resend the original skbs. Easier to re-initialise. */
185 for (i = 0; i < SONIC_NUM_TDS; i++) {
186 if(lp->tx_laddr[i]) {
187 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
188 lp->tx_laddr[i] = (dma_addr_t)0;
189 }
190 if(lp->tx_skb[i]) {
191 dev_kfree_skb(lp->tx_skb[i]);
192 lp->tx_skb[i] = NULL;
193 }
194 }
195 /* Try to restart the adaptor. */
196 sonic_init(dev);
197 lp->stats.tx_errors++;
198 dev->trans_start = jiffies;
199 netif_wake_queue(dev);
200 }
202 /*
203 * transmit packet
204 *
205 * Appends new TD during transmission thus avoiding any TX interrupts
206 * until we run out of TDs.
207 * This routine interacts closely with the ISR in that it may,
208 * set tx_skb[i]
209 * reset the status flags of the new TD
210 * set and reset EOL flags
211 * stop the tx queue
212 * The ISR interacts with this routine in various ways. It may,
213 * reset tx_skb[i]
214 * test the EOL and status flags of the TDs
215 * wake the tx queue
216 * Concurrently with all of this, the SONIC is potentially writing to
217 * the status flags of the TDs.
218 * Until some mutual exclusion is added, this code will not work with SMP. However,
219 * MIPS Jazz machines and m68k Macs were all uni-processor machines.
220 */
222 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev)
223 {
224 struct sonic_local *lp = netdev_priv(dev);
225 dma_addr_t laddr;
226 int length;
227 int entry = lp->next_tx;
229 if (sonic_debug > 2)
230 printk("sonic_send_packet: skb=%p, dev=%p\n", skb, dev);
232 length = skb->len;
233 if (length < ETH_ZLEN) {
234 if (skb_padto(skb, ETH_ZLEN))
235 return 0;
236 length = ETH_ZLEN;
237 }
239 /*
240 * Map the packet data into the logical DMA address space
241 */
243 laddr = dma_map_single(lp->device, skb->data, length, DMA_TO_DEVICE);
244 if (!laddr) {
245 printk(KERN_ERR "%s: failed to map tx DMA buffer.\n", dev->name);
246 dev_kfree_skb(skb);
247 return 1;
248 }
250 sonic_tda_put(dev, entry, SONIC_TD_STATUS, 0); /* clear status */
251 sonic_tda_put(dev, entry, SONIC_TD_FRAG_COUNT, 1); /* single fragment */
252 sonic_tda_put(dev, entry, SONIC_TD_PKTSIZE, length); /* length of packet */
253 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_L, laddr & 0xffff);
254 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_H, laddr >> 16);
255 sonic_tda_put(dev, entry, SONIC_TD_FRAG_SIZE, length);
256 sonic_tda_put(dev, entry, SONIC_TD_LINK,
257 sonic_tda_get(dev, entry, SONIC_TD_LINK) | SONIC_EOL);
259 /*
260 * Must set tx_skb[entry] only after clearing status, and
261 * before clearing EOL and before stopping queue
262 */
263 wmb();
264 lp->tx_len[entry] = length;
265 lp->tx_laddr[entry] = laddr;
266 lp->tx_skb[entry] = skb;
268 wmb();
269 sonic_tda_put(dev, lp->eol_tx, SONIC_TD_LINK,
270 sonic_tda_get(dev, lp->eol_tx, SONIC_TD_LINK) & ~SONIC_EOL);
271 lp->eol_tx = entry;
273 lp->next_tx = (entry + 1) & SONIC_TDS_MASK;
274 if (lp->tx_skb[lp->next_tx] != NULL) {
275 /* The ring is full, the ISR has yet to process the next TD. */
276 if (sonic_debug > 3)
277 printk("%s: stopping queue\n", dev->name);
278 netif_stop_queue(dev);
279 /* after this packet, wait for ISR to free up some TDAs */
280 } else netif_start_queue(dev);
282 if (sonic_debug > 2)
283 printk("sonic_send_packet: issuing Tx command\n");
285 SONIC_WRITE(SONIC_CMD, SONIC_CR_TXP);
287 dev->trans_start = jiffies;
289 return 0;
290 }
292 /*
293 * The typical workload of the driver:
294 * Handle the network interface interrupts.
295 */
296 static irqreturn_t sonic_interrupt(int irq, void *dev_id, struct pt_regs *regs)
297 {
298 struct net_device *dev = (struct net_device *) dev_id;
299 struct sonic_local *lp = netdev_priv(dev);
300 int status;
302 if (dev == NULL) {
303 printk(KERN_ERR "sonic_interrupt: irq %d for unknown device.\n", irq);
304 return IRQ_NONE;
305 }
307 if (!(status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT))
308 return IRQ_NONE;
310 do {
311 if (status & SONIC_INT_PKTRX) {
312 if (sonic_debug > 2)
313 printk("%s: packet rx\n", dev->name);
314 sonic_rx(dev); /* got packet(s) */
315 SONIC_WRITE(SONIC_ISR, SONIC_INT_PKTRX); /* clear the interrupt */
316 }
318 if (status & SONIC_INT_TXDN) {
319 int entry = lp->cur_tx;
320 int td_status;
321 int freed_some = 0;
323 /* At this point, cur_tx is the index of a TD that is one of:
324 * unallocated/freed (status set & tx_skb[entry] clear)
325 * allocated and sent (status set & tx_skb[entry] set )
326 * allocated and not yet sent (status clear & tx_skb[entry] set )
327 * still being allocated by sonic_send_packet (status clear & tx_skb[entry] clear)
328 */
330 if (sonic_debug > 2)
331 printk("%s: tx done\n", dev->name);
333 while (lp->tx_skb[entry] != NULL) {
334 if ((td_status = sonic_tda_get(dev, entry, SONIC_TD_STATUS)) == 0)
335 break;
337 if (td_status & 0x0001) {
338 lp->stats.tx_packets++;
339 lp->stats.tx_bytes += sonic_tda_get(dev, entry, SONIC_TD_PKTSIZE);
340 } else {
341 lp->stats.tx_errors++;
342 if (td_status & 0x0642)
343 lp->stats.tx_aborted_errors++;
344 if (td_status & 0x0180)
345 lp->stats.tx_carrier_errors++;
346 if (td_status & 0x0020)
347 lp->stats.tx_window_errors++;
348 if (td_status & 0x0004)
349 lp->stats.tx_fifo_errors++;
350 }
352 /* We must free the original skb */
353 dev_kfree_skb_irq(lp->tx_skb[entry]);
354 lp->tx_skb[entry] = NULL;
355 /* and unmap DMA buffer */
356 dma_unmap_single(lp->device, lp->tx_laddr[entry], lp->tx_len[entry], DMA_TO_DEVICE);
357 lp->tx_laddr[entry] = (dma_addr_t)0;
358 freed_some = 1;
360 if (sonic_tda_get(dev, entry, SONIC_TD_LINK) & SONIC_EOL) {
361 entry = (entry + 1) & SONIC_TDS_MASK;
362 break;
363 }
364 entry = (entry + 1) & SONIC_TDS_MASK;
365 }
367 if (freed_some || lp->tx_skb[entry] == NULL)
368 netif_wake_queue(dev); /* The ring is no longer full */
369 lp->cur_tx = entry;
370 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXDN); /* clear the interrupt */
371 }
373 /*
374 * check error conditions
375 */
376 if (status & SONIC_INT_RFO) {
377 if (sonic_debug > 1)
378 printk("%s: rx fifo overrun\n", dev->name);
379 lp->stats.rx_fifo_errors++;
380 SONIC_WRITE(SONIC_ISR, SONIC_INT_RFO); /* clear the interrupt */
381 }
382 if (status & SONIC_INT_RDE) {
383 if (sonic_debug > 1)
384 printk("%s: rx descriptors exhausted\n", dev->name);
385 lp->stats.rx_dropped++;
386 SONIC_WRITE(SONIC_ISR, SONIC_INT_RDE); /* clear the interrupt */
387 }
388 if (status & SONIC_INT_RBAE) {
389 if (sonic_debug > 1)
390 printk("%s: rx buffer area exceeded\n", dev->name);
391 lp->stats.rx_dropped++;
392 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBAE); /* clear the interrupt */
393 }
395 /* counter overruns; all counters are 16bit wide */
396 if (status & SONIC_INT_FAE) {
397 lp->stats.rx_frame_errors += 65536;
398 SONIC_WRITE(SONIC_ISR, SONIC_INT_FAE); /* clear the interrupt */
399 }
400 if (status & SONIC_INT_CRC) {
401 lp->stats.rx_crc_errors += 65536;
402 SONIC_WRITE(SONIC_ISR, SONIC_INT_CRC); /* clear the interrupt */
403 }
404 if (status & SONIC_INT_MP) {
405 lp->stats.rx_missed_errors += 65536;
406 SONIC_WRITE(SONIC_ISR, SONIC_INT_MP); /* clear the interrupt */
407 }
409 /* transmit error */
410 if (status & SONIC_INT_TXER) {
411 if ((SONIC_READ(SONIC_TCR) & SONIC_TCR_FU) && (sonic_debug > 2))
412 printk(KERN_ERR "%s: tx fifo underrun\n", dev->name);
413 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXER); /* clear the interrupt */
414 }
416 /* bus retry */
417 if (status & SONIC_INT_BR) {
418 printk(KERN_ERR "%s: Bus retry occurred! Device interrupt disabled.\n",
419 dev->name);
420 /* ... to help debug DMA problems causing endless interrupts. */
421 /* Bounce the eth interface to turn on the interrupt again. */
422 SONIC_WRITE(SONIC_IMR, 0);
423 SONIC_WRITE(SONIC_ISR, SONIC_INT_BR); /* clear the interrupt */
424 }
426 /* load CAM done */
427 if (status & SONIC_INT_LCD)
428 SONIC_WRITE(SONIC_ISR, SONIC_INT_LCD); /* clear the interrupt */
429 } while((status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT));
430 return IRQ_HANDLED;
431 }
433 /*
434 * We have a good packet(s), pass it/them up the network stack.
435 */
436 static void sonic_rx(struct net_device *dev)
437 {
438 struct sonic_local *lp = netdev_priv(dev);
439 int status;
440 int entry = lp->cur_rx;
442 while (sonic_rda_get(dev, entry, SONIC_RD_IN_USE) == 0) {
443 struct sk_buff *used_skb;
444 struct sk_buff *new_skb;
445 dma_addr_t new_laddr;
446 u16 bufadr_l;
447 u16 bufadr_h;
448 int pkt_len;
450 status = sonic_rda_get(dev, entry, SONIC_RD_STATUS);
451 if (status & SONIC_RCR_PRX) {
452 /* Malloc up new buffer. */
453 new_skb = dev_alloc_skb(SONIC_RBSIZE + 2);
454 if (new_skb == NULL) {
455 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name);
456 lp->stats.rx_dropped++;
457 break;
458 }
459 new_skb->dev = dev;
460 /* provide 16 byte IP header alignment unless DMA requires otherwise */
461 if(SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
462 skb_reserve(new_skb, 2);
464 new_laddr = dma_map_single(lp->device, skb_put(new_skb, SONIC_RBSIZE),
465 SONIC_RBSIZE, DMA_FROM_DEVICE);
466 if (!new_laddr) {
467 dev_kfree_skb(new_skb);
468 printk(KERN_ERR "%s: Failed to map rx buffer, dropping packet.\n", dev->name);
469 lp->stats.rx_dropped++;
470 break;
471 }
473 /* now we have a new skb to replace it, pass the used one up the stack */
474 dma_unmap_single(lp->device, lp->rx_laddr[entry], SONIC_RBSIZE, DMA_FROM_DEVICE);
475 used_skb = lp->rx_skb[entry];
476 pkt_len = sonic_rda_get(dev, entry, SONIC_RD_PKTLEN);
477 skb_trim(used_skb, pkt_len);
478 used_skb->protocol = eth_type_trans(used_skb, dev);
479 netif_rx(used_skb);
480 dev->last_rx = jiffies;
481 lp->stats.rx_packets++;
482 lp->stats.rx_bytes += pkt_len;
484 /* and insert the new skb */
485 lp->rx_laddr[entry] = new_laddr;
486 lp->rx_skb[entry] = new_skb;
488 bufadr_l = (unsigned long)new_laddr & 0xffff;
489 bufadr_h = (unsigned long)new_laddr >> 16;
490 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_L, bufadr_l);
491 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_H, bufadr_h);
492 } else {
493 /* This should only happen, if we enable accepting broken packets. */
494 lp->stats.rx_errors++;
495 if (status & SONIC_RCR_FAER)
496 lp->stats.rx_frame_errors++;
497 if (status & SONIC_RCR_CRCR)
498 lp->stats.rx_crc_errors++;
499 }
500 if (status & SONIC_RCR_LPKT) {
501 /*
502 * this was the last packet out of the current receive buffer
503 * give the buffer back to the SONIC
504 */
505 lp->cur_rwp += SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode);
506 if (lp->cur_rwp >= lp->rra_end) lp->cur_rwp = lp->rra_laddr & 0xffff;
507 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
508 if (SONIC_READ(SONIC_ISR) & SONIC_INT_RBE) {
509 if (sonic_debug > 2)
510 printk("%s: rx buffer exhausted\n", dev->name);
511 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBE); /* clear the flag */
512 }
513 } else
514 printk(KERN_ERR "%s: rx desc without RCR_LPKT. Shouldn't happen !?\n",
515 dev->name);
516 /*
517 * give back the descriptor
518 */
519 sonic_rda_put(dev, entry, SONIC_RD_LINK,
520 sonic_rda_get(dev, entry, SONIC_RD_LINK) | SONIC_EOL);
521 sonic_rda_put(dev, entry, SONIC_RD_IN_USE, 1);
522 sonic_rda_put(dev, lp->eol_rx, SONIC_RD_LINK,
523 sonic_rda_get(dev, lp->eol_rx, SONIC_RD_LINK) & ~SONIC_EOL);
524 lp->eol_rx = entry;
525 lp->cur_rx = entry = (entry + 1) & SONIC_RDS_MASK;
526 }
527 /*
528 * If any worth-while packets have been received, netif_rx()
529 * has done a mark_bh(NET_BH) for us and will work on them
530 * when we get to the bottom-half routine.
531 */
532 }
535 /*
536 * Get the current statistics.
537 * This may be called with the device open or closed.
538 */
539 static struct net_device_stats *sonic_get_stats(struct net_device *dev)
540 {
541 struct sonic_local *lp = netdev_priv(dev);
543 /* read the tally counter from the SONIC and reset them */
544 lp->stats.rx_crc_errors += SONIC_READ(SONIC_CRCT);
545 SONIC_WRITE(SONIC_CRCT, 0xffff);
546 lp->stats.rx_frame_errors += SONIC_READ(SONIC_FAET);
547 SONIC_WRITE(SONIC_FAET, 0xffff);
548 lp->stats.rx_missed_errors += SONIC_READ(SONIC_MPT);
549 SONIC_WRITE(SONIC_MPT, 0xffff);
551 return &lp->stats;
552 }
555 /*
556 * Set or clear the multicast filter for this adaptor.
557 */
558 static void sonic_multicast_list(struct net_device *dev)
559 {
560 struct sonic_local *lp = netdev_priv(dev);
561 unsigned int rcr;
562 struct dev_mc_list *dmi = dev->mc_list;
563 unsigned char *addr;
564 int i;
566 rcr = SONIC_READ(SONIC_RCR) & ~(SONIC_RCR_PRO | SONIC_RCR_AMC);
567 rcr |= SONIC_RCR_BRD; /* accept broadcast packets */
569 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
570 rcr |= SONIC_RCR_PRO;
571 } else {
572 if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 15)) {
573 rcr |= SONIC_RCR_AMC;
574 } else {
575 if (sonic_debug > 2)
576 printk("sonic_multicast_list: mc_count %d\n", dev->mc_count);
577 sonic_set_cam_enable(dev, 1); /* always enable our own address */
578 for (i = 1; i <= dev->mc_count; i++) {
579 addr = dmi->dmi_addr;
580 dmi = dmi->next;
581 sonic_cda_put(dev, i, SONIC_CD_CAP0, addr[1] << 8 | addr[0]);
582 sonic_cda_put(dev, i, SONIC_CD_CAP1, addr[3] << 8 | addr[2]);
583 sonic_cda_put(dev, i, SONIC_CD_CAP2, addr[5] << 8 | addr[4]);
584 sonic_set_cam_enable(dev, sonic_get_cam_enable(dev) | (1 << i));
585 }
586 SONIC_WRITE(SONIC_CDC, 16);
587 /* issue Load CAM command */
588 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
589 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
590 }
591 }
593 if (sonic_debug > 2)
594 printk("sonic_multicast_list: setting RCR=%x\n", rcr);
596 SONIC_WRITE(SONIC_RCR, rcr);
597 }
600 /*
601 * Initialize the SONIC ethernet controller.
602 */
603 static int sonic_init(struct net_device *dev)
604 {
605 unsigned int cmd;
606 struct sonic_local *lp = netdev_priv(dev);
607 int i;
609 /*
610 * put the Sonic into software-reset mode and
611 * disable all interrupts
612 */
613 SONIC_WRITE(SONIC_IMR, 0);
614 SONIC_WRITE(SONIC_ISR, 0x7fff);
615 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
617 /*
618 * clear software reset flag, disable receiver, clear and
619 * enable interrupts, then completely initialize the SONIC
620 */
621 SONIC_WRITE(SONIC_CMD, 0);
622 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXDIS);
624 /*
625 * initialize the receive resource area
626 */
627 if (sonic_debug > 2)
628 printk("sonic_init: initialize receive resource area\n");
630 for (i = 0; i < SONIC_NUM_RRS; i++) {
631 u16 bufadr_l = (unsigned long)lp->rx_laddr[i] & 0xffff;
632 u16 bufadr_h = (unsigned long)lp->rx_laddr[i] >> 16;
633 sonic_rra_put(dev, i, SONIC_RR_BUFADR_L, bufadr_l);
634 sonic_rra_put(dev, i, SONIC_RR_BUFADR_H, bufadr_h);
635 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_L, SONIC_RBSIZE >> 1);
636 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_H, 0);
637 }
639 /* initialize all RRA registers */
640 lp->rra_end = (lp->rra_laddr + SONIC_NUM_RRS * SIZEOF_SONIC_RR *
641 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
642 lp->cur_rwp = (lp->rra_laddr + (SONIC_NUM_RRS - 1) * SIZEOF_SONIC_RR *
643 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
645 SONIC_WRITE(SONIC_RSA, lp->rra_laddr & 0xffff);
646 SONIC_WRITE(SONIC_REA, lp->rra_end);
647 SONIC_WRITE(SONIC_RRP, lp->rra_laddr & 0xffff);
648 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
649 SONIC_WRITE(SONIC_URRA, lp->rra_laddr >> 16);
650 SONIC_WRITE(SONIC_EOBC, (SONIC_RBSIZE >> 1) - (lp->dma_bitmode ? 2 : 1));
652 /* load the resource pointers */
653 if (sonic_debug > 3)
654 printk("sonic_init: issuing RRRA command\n");
656 SONIC_WRITE(SONIC_CMD, SONIC_CR_RRRA);
657 i = 0;
658 while (i++ < 100) {
659 if (SONIC_READ(SONIC_CMD) & SONIC_CR_RRRA)
660 break;
661 }
663 if (sonic_debug > 2)
664 printk("sonic_init: status=%x i=%d\n", SONIC_READ(SONIC_CMD), i);
666 /*
667 * Initialize the receive descriptors so that they
668 * become a circular linked list, ie. let the last
669 * descriptor point to the first again.
670 */
671 if (sonic_debug > 2)
672 printk("sonic_init: initialize receive descriptors\n");
673 for (i=0; i<SONIC_NUM_RDS; i++) {
674 sonic_rda_put(dev, i, SONIC_RD_STATUS, 0);
675 sonic_rda_put(dev, i, SONIC_RD_PKTLEN, 0);
676 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_L, 0);
677 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_H, 0);
678 sonic_rda_put(dev, i, SONIC_RD_SEQNO, 0);
679 sonic_rda_put(dev, i, SONIC_RD_IN_USE, 1);
680 sonic_rda_put(dev, i, SONIC_RD_LINK,
681 lp->rda_laddr +
682 ((i+1) * SIZEOF_SONIC_RD * SONIC_BUS_SCALE(lp->dma_bitmode)));
683 }
684 /* fix last descriptor */
685 sonic_rda_put(dev, SONIC_NUM_RDS - 1, SONIC_RD_LINK,
686 (lp->rda_laddr & 0xffff) | SONIC_EOL);
687 lp->eol_rx = SONIC_NUM_RDS - 1;
688 lp->cur_rx = 0;
689 SONIC_WRITE(SONIC_URDA, lp->rda_laddr >> 16);
690 SONIC_WRITE(SONIC_CRDA, lp->rda_laddr & 0xffff);
692 /*
693 * initialize transmit descriptors
694 */
695 if (sonic_debug > 2)
696 printk("sonic_init: initialize transmit descriptors\n");
697 for (i = 0; i < SONIC_NUM_TDS; i++) {
698 sonic_tda_put(dev, i, SONIC_TD_STATUS, 0);
699 sonic_tda_put(dev, i, SONIC_TD_CONFIG, 0);
700 sonic_tda_put(dev, i, SONIC_TD_PKTSIZE, 0);
701 sonic_tda_put(dev, i, SONIC_TD_FRAG_COUNT, 0);
702 sonic_tda_put(dev, i, SONIC_TD_LINK,
703 (lp->tda_laddr & 0xffff) +
704 (i + 1) * SIZEOF_SONIC_TD * SONIC_BUS_SCALE(lp->dma_bitmode));
705 lp->tx_skb[i] = NULL;
706 }
707 /* fix last descriptor */
708 sonic_tda_put(dev, SONIC_NUM_TDS - 1, SONIC_TD_LINK,
709 (lp->tda_laddr & 0xffff));
711 SONIC_WRITE(SONIC_UTDA, lp->tda_laddr >> 16);
712 SONIC_WRITE(SONIC_CTDA, lp->tda_laddr & 0xffff);
713 lp->cur_tx = lp->next_tx = 0;
714 lp->eol_tx = SONIC_NUM_TDS - 1;
716 /*
717 * put our own address to CAM desc[0]
718 */
719 sonic_cda_put(dev, 0, SONIC_CD_CAP0, dev->dev_addr[1] << 8 | dev->dev_addr[0]);
720 sonic_cda_put(dev, 0, SONIC_CD_CAP1, dev->dev_addr[3] << 8 | dev->dev_addr[2]);
721 sonic_cda_put(dev, 0, SONIC_CD_CAP2, dev->dev_addr[5] << 8 | dev->dev_addr[4]);
722 sonic_set_cam_enable(dev, 1);
724 for (i = 0; i < 16; i++)
725 sonic_cda_put(dev, i, SONIC_CD_ENTRY_POINTER, i);
727 /*
728 * initialize CAM registers
729 */
730 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
731 SONIC_WRITE(SONIC_CDC, 16);
733 /*
734 * load the CAM
735 */
736 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
738 i = 0;
739 while (i++ < 100) {
740 if (SONIC_READ(SONIC_ISR) & SONIC_INT_LCD)
741 break;
742 }
743 if (sonic_debug > 2) {
744 printk("sonic_init: CMD=%x, ISR=%x\n, i=%d",
745 SONIC_READ(SONIC_CMD), SONIC_READ(SONIC_ISR), i);
746 }
748 /*
749 * enable receiver, disable loopback
750 * and enable all interrupts
751 */
752 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXEN | SONIC_CR_STP);
753 SONIC_WRITE(SONIC_RCR, SONIC_RCR_DEFAULT);
754 SONIC_WRITE(SONIC_TCR, SONIC_TCR_DEFAULT);
755 SONIC_WRITE(SONIC_ISR, 0x7fff);
756 SONIC_WRITE(SONIC_IMR, SONIC_IMR_DEFAULT);
758 cmd = SONIC_READ(SONIC_CMD);
759 if ((cmd & SONIC_CR_RXEN) == 0 || (cmd & SONIC_CR_STP) == 0)
760 printk(KERN_ERR "sonic_init: failed, status=%x\n", cmd);
762 if (sonic_debug > 2)
763 printk("sonic_init: new status=%x\n",
764 SONIC_READ(SONIC_CMD));
766 return 0;
767 }
769 MODULE_LICENSE("GPL");