ia64/linux-2.6.18-xen.hg

view drivers/net/smc91x.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
4 *
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
29 *
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
32 *
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
35 *
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
40 *
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
59 */
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
89 #include <asm/io.h>
91 #include "smc91x.h"
93 #ifdef CONFIG_ISA
94 /*
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
98 */
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
102 };
104 #ifndef SMC_IOADDR
105 # define SMC_IOADDR -1
106 #endif
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
111 #ifndef SMC_IRQ
112 # define SMC_IRQ -1
113 #endif
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
120 #ifndef SMC_NOWAIT
121 # define SMC_NOWAIT 0
122 #endif
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
127 /*
128 * Transmit timeout, default 5 seconds.
129 */
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
136 /*
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
140 */
141 #define CARDNAME "smc91x"
143 /*
144 * Use power-down feature of the chip
145 */
146 #define POWER_DOWN 1
148 /*
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
151 * in the system
152 */
153 #define MEMORY_WAIT_TIME 16
155 /*
156 * The maximum number of processing loops allowed for each call to the
157 * IRQ handler.
158 */
159 #define MAX_IRQ_LOOPS 8
161 /*
162 * This selects whether TX packets are sent one by one to the SMC91x internal
163 * memory and throttled until transmission completes. This may prevent
164 * RX overruns a litle by keeping much of the memory free for RX packets
165 * but to the expense of reduced TX throughput and increased IRQ overhead.
166 * Note this is not a cure for a too slow data bus or too high IRQ latency.
167 */
168 #define THROTTLE_TX_PKTS 0
170 /*
171 * The MII clock high/low times. 2x this number gives the MII clock period
172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
173 */
174 #define MII_DELAY 1
176 /* store this information for the driver.. */
177 struct smc_local {
178 /*
179 * If I have to wait until memory is available to send a
180 * packet, I will store the skbuff here, until I get the
181 * desired memory. Then, I'll send it out and free it.
182 */
183 struct sk_buff *pending_tx_skb;
184 struct tasklet_struct tx_task;
186 /*
187 * these are things that the kernel wants me to keep, so users
188 * can find out semi-useless statistics of how well the card is
189 * performing
190 */
191 struct net_device_stats stats;
193 /* version/revision of the SMC91x chip */
194 int version;
196 /* Contains the current active transmission mode */
197 int tcr_cur_mode;
199 /* Contains the current active receive mode */
200 int rcr_cur_mode;
202 /* Contains the current active receive/phy mode */
203 int rpc_cur_mode;
204 int ctl_rfduplx;
205 int ctl_rspeed;
207 u32 msg_enable;
208 u32 phy_type;
209 struct mii_if_info mii;
211 /* work queue */
212 struct work_struct phy_configure;
213 int work_pending;
215 spinlock_t lock;
217 #ifdef SMC_USE_PXA_DMA
218 /* DMA needs the physical address of the chip */
219 u_long physaddr;
220 #endif
221 void __iomem *base;
222 void __iomem *datacs;
223 };
225 #if SMC_DEBUG > 0
226 #define DBG(n, args...) \
227 do { \
228 if (SMC_DEBUG >= (n)) \
229 printk(args); \
230 } while (0)
232 #define PRINTK(args...) printk(args)
233 #else
234 #define DBG(n, args...) do { } while(0)
235 #define PRINTK(args...) printk(KERN_DEBUG args)
236 #endif
238 #if SMC_DEBUG > 3
239 static void PRINT_PKT(u_char *buf, int length)
240 {
241 int i;
242 int remainder;
243 int lines;
245 lines = length / 16;
246 remainder = length % 16;
248 for (i = 0; i < lines ; i ++) {
249 int cur;
250 for (cur = 0; cur < 8; cur++) {
251 u_char a, b;
252 a = *buf++;
253 b = *buf++;
254 printk("%02x%02x ", a, b);
255 }
256 printk("\n");
257 }
258 for (i = 0; i < remainder/2 ; i++) {
259 u_char a, b;
260 a = *buf++;
261 b = *buf++;
262 printk("%02x%02x ", a, b);
263 }
264 printk("\n");
265 }
266 #else
267 #define PRINT_PKT(x...) do { } while(0)
268 #endif
271 /* this enables an interrupt in the interrupt mask register */
272 #define SMC_ENABLE_INT(x) do { \
273 unsigned char mask; \
274 spin_lock_irq(&lp->lock); \
275 mask = SMC_GET_INT_MASK(); \
276 mask |= (x); \
277 SMC_SET_INT_MASK(mask); \
278 spin_unlock_irq(&lp->lock); \
279 } while (0)
281 /* this disables an interrupt from the interrupt mask register */
282 #define SMC_DISABLE_INT(x) do { \
283 unsigned char mask; \
284 spin_lock_irq(&lp->lock); \
285 mask = SMC_GET_INT_MASK(); \
286 mask &= ~(x); \
287 SMC_SET_INT_MASK(mask); \
288 spin_unlock_irq(&lp->lock); \
289 } while (0)
291 /*
292 * Wait while MMU is busy. This is usually in the order of a few nanosecs
293 * if at all, but let's avoid deadlocking the system if the hardware
294 * decides to go south.
295 */
296 #define SMC_WAIT_MMU_BUSY() do { \
297 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
298 unsigned long timeout = jiffies + 2; \
299 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
300 if (time_after(jiffies, timeout)) { \
301 printk("%s: timeout %s line %d\n", \
302 dev->name, __FILE__, __LINE__); \
303 break; \
304 } \
305 cpu_relax(); \
306 } \
307 } \
308 } while (0)
311 /*
312 * this does a soft reset on the device
313 */
314 static void smc_reset(struct net_device *dev)
315 {
316 struct smc_local *lp = netdev_priv(dev);
317 void __iomem *ioaddr = lp->base;
318 unsigned int ctl, cfg;
319 struct sk_buff *pending_skb;
321 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
323 /* Disable all interrupts, block TX tasklet */
324 spin_lock_irq(&lp->lock);
325 SMC_SELECT_BANK(2);
326 SMC_SET_INT_MASK(0);
327 pending_skb = lp->pending_tx_skb;
328 lp->pending_tx_skb = NULL;
329 spin_unlock_irq(&lp->lock);
331 /* free any pending tx skb */
332 if (pending_skb) {
333 dev_kfree_skb(pending_skb);
334 lp->stats.tx_errors++;
335 lp->stats.tx_aborted_errors++;
336 }
338 /*
339 * This resets the registers mostly to defaults, but doesn't
340 * affect EEPROM. That seems unnecessary
341 */
342 SMC_SELECT_BANK(0);
343 SMC_SET_RCR(RCR_SOFTRST);
345 /*
346 * Setup the Configuration Register
347 * This is necessary because the CONFIG_REG is not affected
348 * by a soft reset
349 */
350 SMC_SELECT_BANK(1);
352 cfg = CONFIG_DEFAULT;
354 /*
355 * Setup for fast accesses if requested. If the card/system
356 * can't handle it then there will be no recovery except for
357 * a hard reset or power cycle
358 */
359 if (nowait)
360 cfg |= CONFIG_NO_WAIT;
362 /*
363 * Release from possible power-down state
364 * Configuration register is not affected by Soft Reset
365 */
366 cfg |= CONFIG_EPH_POWER_EN;
368 SMC_SET_CONFIG(cfg);
370 /* this should pause enough for the chip to be happy */
371 /*
372 * elaborate? What does the chip _need_? --jgarzik
373 *
374 * This seems to be undocumented, but something the original
375 * driver(s) have always done. Suspect undocumented timing
376 * info/determined empirically. --rmk
377 */
378 udelay(1);
380 /* Disable transmit and receive functionality */
381 SMC_SELECT_BANK(0);
382 SMC_SET_RCR(RCR_CLEAR);
383 SMC_SET_TCR(TCR_CLEAR);
385 SMC_SELECT_BANK(1);
386 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
388 /*
389 * Set the control register to automatically release successfully
390 * transmitted packets, to make the best use out of our limited
391 * memory
392 */
393 if(!THROTTLE_TX_PKTS)
394 ctl |= CTL_AUTO_RELEASE;
395 else
396 ctl &= ~CTL_AUTO_RELEASE;
397 SMC_SET_CTL(ctl);
399 /* Reset the MMU */
400 SMC_SELECT_BANK(2);
401 SMC_SET_MMU_CMD(MC_RESET);
402 SMC_WAIT_MMU_BUSY();
403 }
405 /*
406 * Enable Interrupts, Receive, and Transmit
407 */
408 static void smc_enable(struct net_device *dev)
409 {
410 struct smc_local *lp = netdev_priv(dev);
411 void __iomem *ioaddr = lp->base;
412 int mask;
414 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
416 /* see the header file for options in TCR/RCR DEFAULT */
417 SMC_SELECT_BANK(0);
418 SMC_SET_TCR(lp->tcr_cur_mode);
419 SMC_SET_RCR(lp->rcr_cur_mode);
421 SMC_SELECT_BANK(1);
422 SMC_SET_MAC_ADDR(dev->dev_addr);
424 /* now, enable interrupts */
425 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
426 if (lp->version >= (CHIP_91100 << 4))
427 mask |= IM_MDINT;
428 SMC_SELECT_BANK(2);
429 SMC_SET_INT_MASK(mask);
431 /*
432 * From this point the register bank must _NOT_ be switched away
433 * to something else than bank 2 without proper locking against
434 * races with any tasklet or interrupt handlers until smc_shutdown()
435 * or smc_reset() is called.
436 */
437 }
439 /*
440 * this puts the device in an inactive state
441 */
442 static void smc_shutdown(struct net_device *dev)
443 {
444 struct smc_local *lp = netdev_priv(dev);
445 void __iomem *ioaddr = lp->base;
446 struct sk_buff *pending_skb;
448 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
450 /* no more interrupts for me */
451 spin_lock_irq(&lp->lock);
452 SMC_SELECT_BANK(2);
453 SMC_SET_INT_MASK(0);
454 pending_skb = lp->pending_tx_skb;
455 lp->pending_tx_skb = NULL;
456 spin_unlock_irq(&lp->lock);
457 if (pending_skb)
458 dev_kfree_skb(pending_skb);
460 /* and tell the card to stay away from that nasty outside world */
461 SMC_SELECT_BANK(0);
462 SMC_SET_RCR(RCR_CLEAR);
463 SMC_SET_TCR(TCR_CLEAR);
465 #ifdef POWER_DOWN
466 /* finally, shut the chip down */
467 SMC_SELECT_BANK(1);
468 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
469 #endif
470 }
472 /*
473 * This is the procedure to handle the receipt of a packet.
474 */
475 static inline void smc_rcv(struct net_device *dev)
476 {
477 struct smc_local *lp = netdev_priv(dev);
478 void __iomem *ioaddr = lp->base;
479 unsigned int packet_number, status, packet_len;
481 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
483 packet_number = SMC_GET_RXFIFO();
484 if (unlikely(packet_number & RXFIFO_REMPTY)) {
485 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
486 return;
487 }
489 /* read from start of packet */
490 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
492 /* First two words are status and packet length */
493 SMC_GET_PKT_HDR(status, packet_len);
494 packet_len &= 0x07ff; /* mask off top bits */
495 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
496 dev->name, packet_number, status,
497 packet_len, packet_len);
499 back:
500 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
501 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
502 /* accept VLAN packets */
503 status &= ~RS_TOOLONG;
504 goto back;
505 }
506 if (packet_len < 6) {
507 /* bloody hardware */
508 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
509 dev->name, packet_len, status);
510 status |= RS_TOOSHORT;
511 }
512 SMC_WAIT_MMU_BUSY();
513 SMC_SET_MMU_CMD(MC_RELEASE);
514 lp->stats.rx_errors++;
515 if (status & RS_ALGNERR)
516 lp->stats.rx_frame_errors++;
517 if (status & (RS_TOOSHORT | RS_TOOLONG))
518 lp->stats.rx_length_errors++;
519 if (status & RS_BADCRC)
520 lp->stats.rx_crc_errors++;
521 } else {
522 struct sk_buff *skb;
523 unsigned char *data;
524 unsigned int data_len;
526 /* set multicast stats */
527 if (status & RS_MULTICAST)
528 lp->stats.multicast++;
530 /*
531 * Actual payload is packet_len - 6 (or 5 if odd byte).
532 * We want skb_reserve(2) and the final ctrl word
533 * (2 bytes, possibly containing the payload odd byte).
534 * Furthermore, we add 2 bytes to allow rounding up to
535 * multiple of 4 bytes on 32 bit buses.
536 * Hence packet_len - 6 + 2 + 2 + 2.
537 */
538 skb = dev_alloc_skb(packet_len);
539 if (unlikely(skb == NULL)) {
540 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
541 dev->name);
542 SMC_WAIT_MMU_BUSY();
543 SMC_SET_MMU_CMD(MC_RELEASE);
544 lp->stats.rx_dropped++;
545 return;
546 }
548 /* Align IP header to 32 bits */
549 skb_reserve(skb, 2);
551 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
552 if (lp->version == 0x90)
553 status |= RS_ODDFRAME;
555 /*
556 * If odd length: packet_len - 5,
557 * otherwise packet_len - 6.
558 * With the trailing ctrl byte it's packet_len - 4.
559 */
560 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
561 data = skb_put(skb, data_len);
562 SMC_PULL_DATA(data, packet_len - 4);
564 SMC_WAIT_MMU_BUSY();
565 SMC_SET_MMU_CMD(MC_RELEASE);
567 PRINT_PKT(data, packet_len - 4);
569 dev->last_rx = jiffies;
570 skb->dev = dev;
571 skb->protocol = eth_type_trans(skb, dev);
572 netif_rx(skb);
573 lp->stats.rx_packets++;
574 lp->stats.rx_bytes += data_len;
575 }
576 }
578 #ifdef CONFIG_SMP
579 /*
580 * On SMP we have the following problem:
581 *
582 * A = smc_hardware_send_pkt()
583 * B = smc_hard_start_xmit()
584 * C = smc_interrupt()
585 *
586 * A and B can never be executed simultaneously. However, at least on UP,
587 * it is possible (and even desirable) for C to interrupt execution of
588 * A or B in order to have better RX reliability and avoid overruns.
589 * C, just like A and B, must have exclusive access to the chip and
590 * each of them must lock against any other concurrent access.
591 * Unfortunately this is not possible to have C suspend execution of A or
592 * B taking place on another CPU. On UP this is no an issue since A and B
593 * are run from softirq context and C from hard IRQ context, and there is
594 * no other CPU where concurrent access can happen.
595 * If ever there is a way to force at least B and C to always be executed
596 * on the same CPU then we could use read/write locks to protect against
597 * any other concurrent access and C would always interrupt B. But life
598 * isn't that easy in a SMP world...
599 */
600 #define smc_special_trylock(lock) \
601 ({ \
602 int __ret; \
603 local_irq_disable(); \
604 __ret = spin_trylock(lock); \
605 if (!__ret) \
606 local_irq_enable(); \
607 __ret; \
608 })
609 #define smc_special_lock(lock) spin_lock_irq(lock)
610 #define smc_special_unlock(lock) spin_unlock_irq(lock)
611 #else
612 #define smc_special_trylock(lock) (1)
613 #define smc_special_lock(lock) do { } while (0)
614 #define smc_special_unlock(lock) do { } while (0)
615 #endif
617 /*
618 * This is called to actually send a packet to the chip.
619 */
620 static void smc_hardware_send_pkt(unsigned long data)
621 {
622 struct net_device *dev = (struct net_device *)data;
623 struct smc_local *lp = netdev_priv(dev);
624 void __iomem *ioaddr = lp->base;
625 struct sk_buff *skb;
626 unsigned int packet_no, len;
627 unsigned char *buf;
629 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
631 if (!smc_special_trylock(&lp->lock)) {
632 netif_stop_queue(dev);
633 tasklet_schedule(&lp->tx_task);
634 return;
635 }
637 skb = lp->pending_tx_skb;
638 if (unlikely(!skb)) {
639 smc_special_unlock(&lp->lock);
640 return;
641 }
642 lp->pending_tx_skb = NULL;
644 packet_no = SMC_GET_AR();
645 if (unlikely(packet_no & AR_FAILED)) {
646 printk("%s: Memory allocation failed.\n", dev->name);
647 lp->stats.tx_errors++;
648 lp->stats.tx_fifo_errors++;
649 smc_special_unlock(&lp->lock);
650 goto done;
651 }
653 /* point to the beginning of the packet */
654 SMC_SET_PN(packet_no);
655 SMC_SET_PTR(PTR_AUTOINC);
657 buf = skb->data;
658 len = skb->len;
659 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
660 dev->name, packet_no, len, len, buf);
661 PRINT_PKT(buf, len);
663 /*
664 * Send the packet length (+6 for status words, length, and ctl.
665 * The card will pad to 64 bytes with zeroes if packet is too small.
666 */
667 SMC_PUT_PKT_HDR(0, len + 6);
669 /* send the actual data */
670 SMC_PUSH_DATA(buf, len & ~1);
672 /* Send final ctl word with the last byte if there is one */
673 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
675 /*
676 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
677 * have the effect of having at most one packet queued for TX
678 * in the chip's memory at all time.
679 *
680 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
681 * when memory allocation (MC_ALLOC) does not succeed right away.
682 */
683 if (THROTTLE_TX_PKTS)
684 netif_stop_queue(dev);
686 /* queue the packet for TX */
687 SMC_SET_MMU_CMD(MC_ENQUEUE);
688 smc_special_unlock(&lp->lock);
690 dev->trans_start = jiffies;
691 lp->stats.tx_packets++;
692 lp->stats.tx_bytes += len;
694 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
696 done: if (!THROTTLE_TX_PKTS)
697 netif_wake_queue(dev);
699 dev_kfree_skb(skb);
700 }
702 /*
703 * Since I am not sure if I will have enough room in the chip's ram
704 * to store the packet, I call this routine which either sends it
705 * now, or set the card to generates an interrupt when ready
706 * for the packet.
707 */
708 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
709 {
710 struct smc_local *lp = netdev_priv(dev);
711 void __iomem *ioaddr = lp->base;
712 unsigned int numPages, poll_count, status;
714 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
716 BUG_ON(lp->pending_tx_skb != NULL);
718 /*
719 * The MMU wants the number of pages to be the number of 256 bytes
720 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
721 *
722 * The 91C111 ignores the size bits, but earlier models don't.
723 *
724 * Pkt size for allocating is data length +6 (for additional status
725 * words, length and ctl)
726 *
727 * If odd size then last byte is included in ctl word.
728 */
729 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
730 if (unlikely(numPages > 7)) {
731 printk("%s: Far too big packet error.\n", dev->name);
732 lp->stats.tx_errors++;
733 lp->stats.tx_dropped++;
734 dev_kfree_skb(skb);
735 return 0;
736 }
738 smc_special_lock(&lp->lock);
740 /* now, try to allocate the memory */
741 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
743 /*
744 * Poll the chip for a short amount of time in case the
745 * allocation succeeds quickly.
746 */
747 poll_count = MEMORY_WAIT_TIME;
748 do {
749 status = SMC_GET_INT();
750 if (status & IM_ALLOC_INT) {
751 SMC_ACK_INT(IM_ALLOC_INT);
752 break;
753 }
754 } while (--poll_count);
756 smc_special_unlock(&lp->lock);
758 lp->pending_tx_skb = skb;
759 if (!poll_count) {
760 /* oh well, wait until the chip finds memory later */
761 netif_stop_queue(dev);
762 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
763 SMC_ENABLE_INT(IM_ALLOC_INT);
764 } else {
765 /*
766 * Allocation succeeded: push packet to the chip's own memory
767 * immediately.
768 */
769 smc_hardware_send_pkt((unsigned long)dev);
770 }
772 return 0;
773 }
775 /*
776 * This handles a TX interrupt, which is only called when:
777 * - a TX error occurred, or
778 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
779 */
780 static void smc_tx(struct net_device *dev)
781 {
782 struct smc_local *lp = netdev_priv(dev);
783 void __iomem *ioaddr = lp->base;
784 unsigned int saved_packet, packet_no, tx_status, pkt_len;
786 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
788 /* If the TX FIFO is empty then nothing to do */
789 packet_no = SMC_GET_TXFIFO();
790 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
791 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
792 return;
793 }
795 /* select packet to read from */
796 saved_packet = SMC_GET_PN();
797 SMC_SET_PN(packet_no);
799 /* read the first word (status word) from this packet */
800 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
801 SMC_GET_PKT_HDR(tx_status, pkt_len);
802 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
803 dev->name, tx_status, packet_no);
805 if (!(tx_status & ES_TX_SUC))
806 lp->stats.tx_errors++;
808 if (tx_status & ES_LOSTCARR)
809 lp->stats.tx_carrier_errors++;
811 if (tx_status & (ES_LATCOL | ES_16COL)) {
812 PRINTK("%s: %s occurred on last xmit\n", dev->name,
813 (tx_status & ES_LATCOL) ?
814 "late collision" : "too many collisions");
815 lp->stats.tx_window_errors++;
816 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
817 printk(KERN_INFO "%s: unexpectedly large number of "
818 "bad collisions. Please check duplex "
819 "setting.\n", dev->name);
820 }
821 }
823 /* kill the packet */
824 SMC_WAIT_MMU_BUSY();
825 SMC_SET_MMU_CMD(MC_FREEPKT);
827 /* Don't restore Packet Number Reg until busy bit is cleared */
828 SMC_WAIT_MMU_BUSY();
829 SMC_SET_PN(saved_packet);
831 /* re-enable transmit */
832 SMC_SELECT_BANK(0);
833 SMC_SET_TCR(lp->tcr_cur_mode);
834 SMC_SELECT_BANK(2);
835 }
838 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
840 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
841 {
842 struct smc_local *lp = netdev_priv(dev);
843 void __iomem *ioaddr = lp->base;
844 unsigned int mii_reg, mask;
846 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
847 mii_reg |= MII_MDOE;
849 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
850 if (val & mask)
851 mii_reg |= MII_MDO;
852 else
853 mii_reg &= ~MII_MDO;
855 SMC_SET_MII(mii_reg);
856 udelay(MII_DELAY);
857 SMC_SET_MII(mii_reg | MII_MCLK);
858 udelay(MII_DELAY);
859 }
860 }
862 static unsigned int smc_mii_in(struct net_device *dev, int bits)
863 {
864 struct smc_local *lp = netdev_priv(dev);
865 void __iomem *ioaddr = lp->base;
866 unsigned int mii_reg, mask, val;
868 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
869 SMC_SET_MII(mii_reg);
871 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
872 if (SMC_GET_MII() & MII_MDI)
873 val |= mask;
875 SMC_SET_MII(mii_reg);
876 udelay(MII_DELAY);
877 SMC_SET_MII(mii_reg | MII_MCLK);
878 udelay(MII_DELAY);
879 }
881 return val;
882 }
884 /*
885 * Reads a register from the MII Management serial interface
886 */
887 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
888 {
889 struct smc_local *lp = netdev_priv(dev);
890 void __iomem *ioaddr = lp->base;
891 unsigned int phydata;
893 SMC_SELECT_BANK(3);
895 /* Idle - 32 ones */
896 smc_mii_out(dev, 0xffffffff, 32);
898 /* Start code (01) + read (10) + phyaddr + phyreg */
899 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
901 /* Turnaround (2bits) + phydata */
902 phydata = smc_mii_in(dev, 18);
904 /* Return to idle state */
905 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
907 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
908 __FUNCTION__, phyaddr, phyreg, phydata);
910 SMC_SELECT_BANK(2);
911 return phydata;
912 }
914 /*
915 * Writes a register to the MII Management serial interface
916 */
917 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
918 int phydata)
919 {
920 struct smc_local *lp = netdev_priv(dev);
921 void __iomem *ioaddr = lp->base;
923 SMC_SELECT_BANK(3);
925 /* Idle - 32 ones */
926 smc_mii_out(dev, 0xffffffff, 32);
928 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
929 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
931 /* Return to idle state */
932 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
934 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
935 __FUNCTION__, phyaddr, phyreg, phydata);
937 SMC_SELECT_BANK(2);
938 }
940 /*
941 * Finds and reports the PHY address
942 */
943 static void smc_phy_detect(struct net_device *dev)
944 {
945 struct smc_local *lp = netdev_priv(dev);
946 int phyaddr;
948 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
950 lp->phy_type = 0;
952 /*
953 * Scan all 32 PHY addresses if necessary, starting at
954 * PHY#1 to PHY#31, and then PHY#0 last.
955 */
956 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
957 unsigned int id1, id2;
959 /* Read the PHY identifiers */
960 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
961 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
963 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
964 dev->name, id1, id2);
966 /* Make sure it is a valid identifier */
967 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
968 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
969 /* Save the PHY's address */
970 lp->mii.phy_id = phyaddr & 31;
971 lp->phy_type = id1 << 16 | id2;
972 break;
973 }
974 }
975 }
977 /*
978 * Sets the PHY to a configuration as determined by the user
979 */
980 static int smc_phy_fixed(struct net_device *dev)
981 {
982 struct smc_local *lp = netdev_priv(dev);
983 void __iomem *ioaddr = lp->base;
984 int phyaddr = lp->mii.phy_id;
985 int bmcr, cfg1;
987 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
989 /* Enter Link Disable state */
990 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
991 cfg1 |= PHY_CFG1_LNKDIS;
992 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
994 /*
995 * Set our fixed capabilities
996 * Disable auto-negotiation
997 */
998 bmcr = 0;
1000 if (lp->ctl_rfduplx)
1001 bmcr |= BMCR_FULLDPLX;
1003 if (lp->ctl_rspeed == 100)
1004 bmcr |= BMCR_SPEED100;
1006 /* Write our capabilities to the phy control register */
1007 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1009 /* Re-Configure the Receive/Phy Control register */
1010 SMC_SELECT_BANK(0);
1011 SMC_SET_RPC(lp->rpc_cur_mode);
1012 SMC_SELECT_BANK(2);
1014 return 1;
1017 /*
1018 * smc_phy_reset - reset the phy
1019 * @dev: net device
1020 * @phy: phy address
1022 * Issue a software reset for the specified PHY and
1023 * wait up to 100ms for the reset to complete. We should
1024 * not access the PHY for 50ms after issuing the reset.
1026 * The time to wait appears to be dependent on the PHY.
1028 * Must be called with lp->lock locked.
1029 */
1030 static int smc_phy_reset(struct net_device *dev, int phy)
1032 struct smc_local *lp = netdev_priv(dev);
1033 unsigned int bmcr;
1034 int timeout;
1036 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1038 for (timeout = 2; timeout; timeout--) {
1039 spin_unlock_irq(&lp->lock);
1040 msleep(50);
1041 spin_lock_irq(&lp->lock);
1043 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1044 if (!(bmcr & BMCR_RESET))
1045 break;
1048 return bmcr & BMCR_RESET;
1051 /*
1052 * smc_phy_powerdown - powerdown phy
1053 * @dev: net device
1055 * Power down the specified PHY
1056 */
1057 static void smc_phy_powerdown(struct net_device *dev)
1059 struct smc_local *lp = netdev_priv(dev);
1060 unsigned int bmcr;
1061 int phy = lp->mii.phy_id;
1063 if (lp->phy_type == 0)
1064 return;
1066 /* We need to ensure that no calls to smc_phy_configure are
1067 pending.
1069 flush_scheduled_work() cannot be called because we are
1070 running with the netlink semaphore held (from
1071 devinet_ioctl()) and the pending work queue contains
1072 linkwatch_event() (scheduled by netif_carrier_off()
1073 above). linkwatch_event() also wants the netlink semaphore.
1074 */
1075 while(lp->work_pending)
1076 yield();
1078 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1079 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1082 /*
1083 * smc_phy_check_media - check the media status and adjust TCR
1084 * @dev: net device
1085 * @init: set true for initialisation
1087 * Select duplex mode depending on negotiation state. This
1088 * also updates our carrier state.
1089 */
1090 static void smc_phy_check_media(struct net_device *dev, int init)
1092 struct smc_local *lp = netdev_priv(dev);
1093 void __iomem *ioaddr = lp->base;
1095 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1096 /* duplex state has changed */
1097 if (lp->mii.full_duplex) {
1098 lp->tcr_cur_mode |= TCR_SWFDUP;
1099 } else {
1100 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1103 SMC_SELECT_BANK(0);
1104 SMC_SET_TCR(lp->tcr_cur_mode);
1108 /*
1109 * Configures the specified PHY through the MII management interface
1110 * using Autonegotiation.
1111 * Calls smc_phy_fixed() if the user has requested a certain config.
1112 * If RPC ANEG bit is set, the media selection is dependent purely on
1113 * the selection by the MII (either in the MII BMCR reg or the result
1114 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1115 * is controlled by the RPC SPEED and RPC DPLX bits.
1116 */
1117 static void smc_phy_configure(void *data)
1119 struct net_device *dev = data;
1120 struct smc_local *lp = netdev_priv(dev);
1121 void __iomem *ioaddr = lp->base;
1122 int phyaddr = lp->mii.phy_id;
1123 int my_phy_caps; /* My PHY capabilities */
1124 int my_ad_caps; /* My Advertised capabilities */
1125 int status;
1127 DBG(3, "%s:smc_program_phy()\n", dev->name);
1129 spin_lock_irq(&lp->lock);
1131 /*
1132 * We should not be called if phy_type is zero.
1133 */
1134 if (lp->phy_type == 0)
1135 goto smc_phy_configure_exit;
1137 if (smc_phy_reset(dev, phyaddr)) {
1138 printk("%s: PHY reset timed out\n", dev->name);
1139 goto smc_phy_configure_exit;
1142 /*
1143 * Enable PHY Interrupts (for register 18)
1144 * Interrupts listed here are disabled
1145 */
1146 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1147 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1148 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1149 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1151 /* Configure the Receive/Phy Control register */
1152 SMC_SELECT_BANK(0);
1153 SMC_SET_RPC(lp->rpc_cur_mode);
1155 /* If the user requested no auto neg, then go set his request */
1156 if (lp->mii.force_media) {
1157 smc_phy_fixed(dev);
1158 goto smc_phy_configure_exit;
1161 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1162 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1164 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1165 printk(KERN_INFO "Auto negotiation NOT supported\n");
1166 smc_phy_fixed(dev);
1167 goto smc_phy_configure_exit;
1170 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1172 if (my_phy_caps & BMSR_100BASE4)
1173 my_ad_caps |= ADVERTISE_100BASE4;
1174 if (my_phy_caps & BMSR_100FULL)
1175 my_ad_caps |= ADVERTISE_100FULL;
1176 if (my_phy_caps & BMSR_100HALF)
1177 my_ad_caps |= ADVERTISE_100HALF;
1178 if (my_phy_caps & BMSR_10FULL)
1179 my_ad_caps |= ADVERTISE_10FULL;
1180 if (my_phy_caps & BMSR_10HALF)
1181 my_ad_caps |= ADVERTISE_10HALF;
1183 /* Disable capabilities not selected by our user */
1184 if (lp->ctl_rspeed != 100)
1185 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1187 if (!lp->ctl_rfduplx)
1188 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1190 /* Update our Auto-Neg Advertisement Register */
1191 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1192 lp->mii.advertising = my_ad_caps;
1194 /*
1195 * Read the register back. Without this, it appears that when
1196 * auto-negotiation is restarted, sometimes it isn't ready and
1197 * the link does not come up.
1198 */
1199 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1201 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1202 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1204 /* Restart auto-negotiation process in order to advertise my caps */
1205 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1207 smc_phy_check_media(dev, 1);
1209 smc_phy_configure_exit:
1210 SMC_SELECT_BANK(2);
1211 spin_unlock_irq(&lp->lock);
1212 lp->work_pending = 0;
1215 /*
1216 * smc_phy_interrupt
1218 * Purpose: Handle interrupts relating to PHY register 18. This is
1219 * called from the "hard" interrupt handler under our private spinlock.
1220 */
1221 static void smc_phy_interrupt(struct net_device *dev)
1223 struct smc_local *lp = netdev_priv(dev);
1224 int phyaddr = lp->mii.phy_id;
1225 int phy18;
1227 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1229 if (lp->phy_type == 0)
1230 return;
1232 for(;;) {
1233 smc_phy_check_media(dev, 0);
1235 /* Read PHY Register 18, Status Output */
1236 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1237 if ((phy18 & PHY_INT_INT) == 0)
1238 break;
1242 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1244 static void smc_10bt_check_media(struct net_device *dev, int init)
1246 struct smc_local *lp = netdev_priv(dev);
1247 void __iomem *ioaddr = lp->base;
1248 unsigned int old_carrier, new_carrier;
1250 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1252 SMC_SELECT_BANK(0);
1253 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1254 SMC_SELECT_BANK(2);
1256 if (init || (old_carrier != new_carrier)) {
1257 if (!new_carrier) {
1258 netif_carrier_off(dev);
1259 } else {
1260 netif_carrier_on(dev);
1262 if (netif_msg_link(lp))
1263 printk(KERN_INFO "%s: link %s\n", dev->name,
1264 new_carrier ? "up" : "down");
1268 static void smc_eph_interrupt(struct net_device *dev)
1270 struct smc_local *lp = netdev_priv(dev);
1271 void __iomem *ioaddr = lp->base;
1272 unsigned int ctl;
1274 smc_10bt_check_media(dev, 0);
1276 SMC_SELECT_BANK(1);
1277 ctl = SMC_GET_CTL();
1278 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1279 SMC_SET_CTL(ctl);
1280 SMC_SELECT_BANK(2);
1283 /*
1284 * This is the main routine of the driver, to handle the device when
1285 * it needs some attention.
1286 */
1287 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1289 struct net_device *dev = dev_id;
1290 struct smc_local *lp = netdev_priv(dev);
1291 void __iomem *ioaddr = lp->base;
1292 int status, mask, timeout, card_stats;
1293 int saved_pointer;
1295 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1297 spin_lock(&lp->lock);
1299 /* A preamble may be used when there is a potential race
1300 * between the interruptible transmit functions and this
1301 * ISR. */
1302 SMC_INTERRUPT_PREAMBLE;
1304 saved_pointer = SMC_GET_PTR();
1305 mask = SMC_GET_INT_MASK();
1306 SMC_SET_INT_MASK(0);
1308 /* set a timeout value, so I don't stay here forever */
1309 timeout = MAX_IRQ_LOOPS;
1311 do {
1312 status = SMC_GET_INT();
1314 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1315 dev->name, status, mask,
1316 ({ int meminfo; SMC_SELECT_BANK(0);
1317 meminfo = SMC_GET_MIR();
1318 SMC_SELECT_BANK(2); meminfo; }),
1319 SMC_GET_FIFO());
1321 status &= mask;
1322 if (!status)
1323 break;
1325 if (status & IM_TX_INT) {
1326 /* do this before RX as it will free memory quickly */
1327 DBG(3, "%s: TX int\n", dev->name);
1328 smc_tx(dev);
1329 SMC_ACK_INT(IM_TX_INT);
1330 if (THROTTLE_TX_PKTS)
1331 netif_wake_queue(dev);
1332 } else if (status & IM_RCV_INT) {
1333 DBG(3, "%s: RX irq\n", dev->name);
1334 smc_rcv(dev);
1335 } else if (status & IM_ALLOC_INT) {
1336 DBG(3, "%s: Allocation irq\n", dev->name);
1337 tasklet_hi_schedule(&lp->tx_task);
1338 mask &= ~IM_ALLOC_INT;
1339 } else if (status & IM_TX_EMPTY_INT) {
1340 DBG(3, "%s: TX empty\n", dev->name);
1341 mask &= ~IM_TX_EMPTY_INT;
1343 /* update stats */
1344 SMC_SELECT_BANK(0);
1345 card_stats = SMC_GET_COUNTER();
1346 SMC_SELECT_BANK(2);
1348 /* single collisions */
1349 lp->stats.collisions += card_stats & 0xF;
1350 card_stats >>= 4;
1352 /* multiple collisions */
1353 lp->stats.collisions += card_stats & 0xF;
1354 } else if (status & IM_RX_OVRN_INT) {
1355 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1356 ({ int eph_st; SMC_SELECT_BANK(0);
1357 eph_st = SMC_GET_EPH_STATUS();
1358 SMC_SELECT_BANK(2); eph_st; }) );
1359 SMC_ACK_INT(IM_RX_OVRN_INT);
1360 lp->stats.rx_errors++;
1361 lp->stats.rx_fifo_errors++;
1362 } else if (status & IM_EPH_INT) {
1363 smc_eph_interrupt(dev);
1364 } else if (status & IM_MDINT) {
1365 SMC_ACK_INT(IM_MDINT);
1366 smc_phy_interrupt(dev);
1367 } else if (status & IM_ERCV_INT) {
1368 SMC_ACK_INT(IM_ERCV_INT);
1369 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1371 } while (--timeout);
1373 /* restore register states */
1374 SMC_SET_PTR(saved_pointer);
1375 SMC_SET_INT_MASK(mask);
1376 spin_unlock(&lp->lock);
1378 if (timeout == MAX_IRQ_LOOPS)
1379 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1380 dev->name, mask);
1381 DBG(3, "%s: Interrupt done (%d loops)\n",
1382 dev->name, MAX_IRQ_LOOPS - timeout);
1384 /*
1385 * We return IRQ_HANDLED unconditionally here even if there was
1386 * nothing to do. There is a possibility that a packet might
1387 * get enqueued into the chip right after TX_EMPTY_INT is raised
1388 * but just before the CPU acknowledges the IRQ.
1389 * Better take an unneeded IRQ in some occasions than complexifying
1390 * the code for all cases.
1391 */
1392 return IRQ_HANDLED;
1395 #ifdef CONFIG_NET_POLL_CONTROLLER
1396 /*
1397 * Polling receive - used by netconsole and other diagnostic tools
1398 * to allow network i/o with interrupts disabled.
1399 */
1400 static void smc_poll_controller(struct net_device *dev)
1402 disable_irq(dev->irq);
1403 smc_interrupt(dev->irq, dev, NULL);
1404 enable_irq(dev->irq);
1406 #endif
1408 /* Our watchdog timed out. Called by the networking layer */
1409 static void smc_timeout(struct net_device *dev)
1411 struct smc_local *lp = netdev_priv(dev);
1412 void __iomem *ioaddr = lp->base;
1413 int status, mask, eph_st, meminfo, fifo;
1415 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1417 spin_lock_irq(&lp->lock);
1418 status = SMC_GET_INT();
1419 mask = SMC_GET_INT_MASK();
1420 fifo = SMC_GET_FIFO();
1421 SMC_SELECT_BANK(0);
1422 eph_st = SMC_GET_EPH_STATUS();
1423 meminfo = SMC_GET_MIR();
1424 SMC_SELECT_BANK(2);
1425 spin_unlock_irq(&lp->lock);
1426 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1427 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1428 dev->name, status, mask, meminfo, fifo, eph_st );
1430 smc_reset(dev);
1431 smc_enable(dev);
1433 /*
1434 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1435 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1436 * which calls schedule(). Hence we use a work queue.
1437 */
1438 if (lp->phy_type != 0) {
1439 if (schedule_work(&lp->phy_configure)) {
1440 lp->work_pending = 1;
1444 /* We can accept TX packets again */
1445 dev->trans_start = jiffies;
1446 netif_wake_queue(dev);
1449 /*
1450 * This routine will, depending on the values passed to it,
1451 * either make it accept multicast packets, go into
1452 * promiscuous mode (for TCPDUMP and cousins) or accept
1453 * a select set of multicast packets
1454 */
1455 static void smc_set_multicast_list(struct net_device *dev)
1457 struct smc_local *lp = netdev_priv(dev);
1458 void __iomem *ioaddr = lp->base;
1459 unsigned char multicast_table[8];
1460 int update_multicast = 0;
1462 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1464 if (dev->flags & IFF_PROMISC) {
1465 DBG(2, "%s: RCR_PRMS\n", dev->name);
1466 lp->rcr_cur_mode |= RCR_PRMS;
1469 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1470 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1471 when promiscuous mode is turned on.
1472 */
1474 /*
1475 * Here, I am setting this to accept all multicast packets.
1476 * I don't need to zero the multicast table, because the flag is
1477 * checked before the table is
1478 */
1479 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1480 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1481 lp->rcr_cur_mode |= RCR_ALMUL;
1484 /*
1485 * This sets the internal hardware table to filter out unwanted
1486 * multicast packets before they take up memory.
1488 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1489 * address are the offset into the table. If that bit is 1, then the
1490 * multicast packet is accepted. Otherwise, it's dropped silently.
1492 * To use the 6 bits as an offset into the table, the high 3 bits are
1493 * the number of the 8 bit register, while the low 3 bits are the bit
1494 * within that register.
1495 */
1496 else if (dev->mc_count) {
1497 int i;
1498 struct dev_mc_list *cur_addr;
1500 /* table for flipping the order of 3 bits */
1501 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1503 /* start with a table of all zeros: reject all */
1504 memset(multicast_table, 0, sizeof(multicast_table));
1506 cur_addr = dev->mc_list;
1507 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1508 int position;
1510 /* do we have a pointer here? */
1511 if (!cur_addr)
1512 break;
1513 /* make sure this is a multicast address -
1514 shouldn't this be a given if we have it here ? */
1515 if (!(*cur_addr->dmi_addr & 1))
1516 continue;
1518 /* only use the low order bits */
1519 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1521 /* do some messy swapping to put the bit in the right spot */
1522 multicast_table[invert3[position&7]] |=
1523 (1<<invert3[(position>>3)&7]);
1526 /* be sure I get rid of flags I might have set */
1527 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1529 /* now, the table can be loaded into the chipset */
1530 update_multicast = 1;
1531 } else {
1532 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1533 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1535 /*
1536 * since I'm disabling all multicast entirely, I need to
1537 * clear the multicast list
1538 */
1539 memset(multicast_table, 0, sizeof(multicast_table));
1540 update_multicast = 1;
1543 spin_lock_irq(&lp->lock);
1544 SMC_SELECT_BANK(0);
1545 SMC_SET_RCR(lp->rcr_cur_mode);
1546 if (update_multicast) {
1547 SMC_SELECT_BANK(3);
1548 SMC_SET_MCAST(multicast_table);
1550 SMC_SELECT_BANK(2);
1551 spin_unlock_irq(&lp->lock);
1555 /*
1556 * Open and Initialize the board
1558 * Set up everything, reset the card, etc..
1559 */
1560 static int
1561 smc_open(struct net_device *dev)
1563 struct smc_local *lp = netdev_priv(dev);
1565 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1567 /*
1568 * Check that the address is valid. If its not, refuse
1569 * to bring the device up. The user must specify an
1570 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1571 */
1572 if (!is_valid_ether_addr(dev->dev_addr)) {
1573 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1574 return -EINVAL;
1577 /* Setup the default Register Modes */
1578 lp->tcr_cur_mode = TCR_DEFAULT;
1579 lp->rcr_cur_mode = RCR_DEFAULT;
1580 lp->rpc_cur_mode = RPC_DEFAULT;
1582 /*
1583 * If we are not using a MII interface, we need to
1584 * monitor our own carrier signal to detect faults.
1585 */
1586 if (lp->phy_type == 0)
1587 lp->tcr_cur_mode |= TCR_MON_CSN;
1589 /* reset the hardware */
1590 smc_reset(dev);
1591 smc_enable(dev);
1593 /* Configure the PHY, initialize the link state */
1594 if (lp->phy_type != 0)
1595 smc_phy_configure(dev);
1596 else {
1597 spin_lock_irq(&lp->lock);
1598 smc_10bt_check_media(dev, 1);
1599 spin_unlock_irq(&lp->lock);
1602 netif_start_queue(dev);
1603 return 0;
1606 /*
1607 * smc_close
1609 * this makes the board clean up everything that it can
1610 * and not talk to the outside world. Caused by
1611 * an 'ifconfig ethX down'
1612 */
1613 static int smc_close(struct net_device *dev)
1615 struct smc_local *lp = netdev_priv(dev);
1617 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1619 netif_stop_queue(dev);
1620 netif_carrier_off(dev);
1622 /* clear everything */
1623 smc_shutdown(dev);
1624 tasklet_kill(&lp->tx_task);
1625 smc_phy_powerdown(dev);
1626 return 0;
1629 /*
1630 * Get the current statistics.
1631 * This may be called with the card open or closed.
1632 */
1633 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1635 struct smc_local *lp = netdev_priv(dev);
1637 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1639 return &lp->stats;
1642 /*
1643 * Ethtool support
1644 */
1645 static int
1646 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1648 struct smc_local *lp = netdev_priv(dev);
1649 int ret;
1651 cmd->maxtxpkt = 1;
1652 cmd->maxrxpkt = 1;
1654 if (lp->phy_type != 0) {
1655 spin_lock_irq(&lp->lock);
1656 ret = mii_ethtool_gset(&lp->mii, cmd);
1657 spin_unlock_irq(&lp->lock);
1658 } else {
1659 cmd->supported = SUPPORTED_10baseT_Half |
1660 SUPPORTED_10baseT_Full |
1661 SUPPORTED_TP | SUPPORTED_AUI;
1663 if (lp->ctl_rspeed == 10)
1664 cmd->speed = SPEED_10;
1665 else if (lp->ctl_rspeed == 100)
1666 cmd->speed = SPEED_100;
1668 cmd->autoneg = AUTONEG_DISABLE;
1669 cmd->transceiver = XCVR_INTERNAL;
1670 cmd->port = 0;
1671 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1673 ret = 0;
1676 return ret;
1679 static int
1680 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1682 struct smc_local *lp = netdev_priv(dev);
1683 int ret;
1685 if (lp->phy_type != 0) {
1686 spin_lock_irq(&lp->lock);
1687 ret = mii_ethtool_sset(&lp->mii, cmd);
1688 spin_unlock_irq(&lp->lock);
1689 } else {
1690 if (cmd->autoneg != AUTONEG_DISABLE ||
1691 cmd->speed != SPEED_10 ||
1692 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1693 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1694 return -EINVAL;
1696 // lp->port = cmd->port;
1697 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1699 // if (netif_running(dev))
1700 // smc_set_port(dev);
1702 ret = 0;
1705 return ret;
1708 static void
1709 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1711 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1712 strncpy(info->version, version, sizeof(info->version));
1713 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1716 static int smc_ethtool_nwayreset(struct net_device *dev)
1718 struct smc_local *lp = netdev_priv(dev);
1719 int ret = -EINVAL;
1721 if (lp->phy_type != 0) {
1722 spin_lock_irq(&lp->lock);
1723 ret = mii_nway_restart(&lp->mii);
1724 spin_unlock_irq(&lp->lock);
1727 return ret;
1730 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1732 struct smc_local *lp = netdev_priv(dev);
1733 return lp->msg_enable;
1736 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1738 struct smc_local *lp = netdev_priv(dev);
1739 lp->msg_enable = level;
1742 static struct ethtool_ops smc_ethtool_ops = {
1743 .get_settings = smc_ethtool_getsettings,
1744 .set_settings = smc_ethtool_setsettings,
1745 .get_drvinfo = smc_ethtool_getdrvinfo,
1747 .get_msglevel = smc_ethtool_getmsglevel,
1748 .set_msglevel = smc_ethtool_setmsglevel,
1749 .nway_reset = smc_ethtool_nwayreset,
1750 .get_link = ethtool_op_get_link,
1751 // .get_eeprom = smc_ethtool_geteeprom,
1752 // .set_eeprom = smc_ethtool_seteeprom,
1753 };
1755 /*
1756 * smc_findirq
1758 * This routine has a simple purpose -- make the SMC chip generate an
1759 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1760 */
1761 /*
1762 * does this still work?
1764 * I just deleted auto_irq.c, since it was never built...
1765 * --jgarzik
1766 */
1767 static int __init smc_findirq(void __iomem *ioaddr)
1769 int timeout = 20;
1770 unsigned long cookie;
1772 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1774 cookie = probe_irq_on();
1776 /*
1777 * What I try to do here is trigger an ALLOC_INT. This is done
1778 * by allocating a small chunk of memory, which will give an interrupt
1779 * when done.
1780 */
1781 /* enable ALLOCation interrupts ONLY */
1782 SMC_SELECT_BANK(2);
1783 SMC_SET_INT_MASK(IM_ALLOC_INT);
1785 /*
1786 * Allocate 512 bytes of memory. Note that the chip was just
1787 * reset so all the memory is available
1788 */
1789 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1791 /*
1792 * Wait until positive that the interrupt has been generated
1793 */
1794 do {
1795 int int_status;
1796 udelay(10);
1797 int_status = SMC_GET_INT();
1798 if (int_status & IM_ALLOC_INT)
1799 break; /* got the interrupt */
1800 } while (--timeout);
1802 /*
1803 * there is really nothing that I can do here if timeout fails,
1804 * as autoirq_report will return a 0 anyway, which is what I
1805 * want in this case. Plus, the clean up is needed in both
1806 * cases.
1807 */
1809 /* and disable all interrupts again */
1810 SMC_SET_INT_MASK(0);
1812 /* and return what I found */
1813 return probe_irq_off(cookie);
1816 /*
1817 * Function: smc_probe(unsigned long ioaddr)
1819 * Purpose:
1820 * Tests to see if a given ioaddr points to an SMC91x chip.
1821 * Returns a 0 on success
1823 * Algorithm:
1824 * (1) see if the high byte of BANK_SELECT is 0x33
1825 * (2) compare the ioaddr with the base register's address
1826 * (3) see if I recognize the chip ID in the appropriate register
1828 * Here I do typical initialization tasks.
1830 * o Initialize the structure if needed
1831 * o print out my vanity message if not done so already
1832 * o print out what type of hardware is detected
1833 * o print out the ethernet address
1834 * o find the IRQ
1835 * o set up my private data
1836 * o configure the dev structure with my subroutines
1837 * o actually GRAB the irq.
1838 * o GRAB the region
1839 */
1840 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1842 struct smc_local *lp = netdev_priv(dev);
1843 static int version_printed = 0;
1844 int i, retval;
1845 unsigned int val, revision_register;
1846 const char *version_string;
1848 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1850 /* First, see if the high byte is 0x33 */
1851 val = SMC_CURRENT_BANK();
1852 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1853 if ((val & 0xFF00) != 0x3300) {
1854 if ((val & 0xFF) == 0x33) {
1855 printk(KERN_WARNING
1856 "%s: Detected possible byte-swapped interface"
1857 " at IOADDR %p\n", CARDNAME, ioaddr);
1859 retval = -ENODEV;
1860 goto err_out;
1863 /*
1864 * The above MIGHT indicate a device, but I need to write to
1865 * further test this.
1866 */
1867 SMC_SELECT_BANK(0);
1868 val = SMC_CURRENT_BANK();
1869 if ((val & 0xFF00) != 0x3300) {
1870 retval = -ENODEV;
1871 goto err_out;
1874 /*
1875 * well, we've already written once, so hopefully another
1876 * time won't hurt. This time, I need to switch the bank
1877 * register to bank 1, so I can access the base address
1878 * register
1879 */
1880 SMC_SELECT_BANK(1);
1881 val = SMC_GET_BASE();
1882 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1883 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1884 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1885 CARDNAME, ioaddr, val);
1888 /*
1889 * check if the revision register is something that I
1890 * recognize. These might need to be added to later,
1891 * as future revisions could be added.
1892 */
1893 SMC_SELECT_BANK(3);
1894 revision_register = SMC_GET_REV();
1895 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1896 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1897 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1898 /* I don't recognize this chip, so... */
1899 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1900 ", Contact author.\n", CARDNAME,
1901 ioaddr, revision_register);
1903 retval = -ENODEV;
1904 goto err_out;
1907 /* At this point I'll assume that the chip is an SMC91x. */
1908 if (version_printed++ == 0)
1909 printk("%s", version);
1911 /* fill in some of the fields */
1912 dev->base_addr = (unsigned long)ioaddr;
1913 lp->base = ioaddr;
1914 lp->version = revision_register & 0xff;
1915 spin_lock_init(&lp->lock);
1917 /* Get the MAC address */
1918 SMC_SELECT_BANK(1);
1919 SMC_GET_MAC_ADDR(dev->dev_addr);
1921 /* now, reset the chip, and put it into a known state */
1922 smc_reset(dev);
1924 /*
1925 * If dev->irq is 0, then the device has to be banged on to see
1926 * what the IRQ is.
1928 * This banging doesn't always detect the IRQ, for unknown reasons.
1929 * a workaround is to reset the chip and try again.
1931 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1932 * be what is requested on the command line. I don't do that, mostly
1933 * because the card that I have uses a non-standard method of accessing
1934 * the IRQs, and because this _should_ work in most configurations.
1936 * Specifying an IRQ is done with the assumption that the user knows
1937 * what (s)he is doing. No checking is done!!!!
1938 */
1939 if (dev->irq < 1) {
1940 int trials;
1942 trials = 3;
1943 while (trials--) {
1944 dev->irq = smc_findirq(ioaddr);
1945 if (dev->irq)
1946 break;
1947 /* kick the card and try again */
1948 smc_reset(dev);
1951 if (dev->irq == 0) {
1952 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1953 dev->name);
1954 retval = -ENODEV;
1955 goto err_out;
1957 dev->irq = irq_canonicalize(dev->irq);
1959 /* Fill in the fields of the device structure with ethernet values. */
1960 ether_setup(dev);
1962 dev->open = smc_open;
1963 dev->stop = smc_close;
1964 dev->hard_start_xmit = smc_hard_start_xmit;
1965 dev->tx_timeout = smc_timeout;
1966 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1967 dev->get_stats = smc_query_statistics;
1968 dev->set_multicast_list = smc_set_multicast_list;
1969 dev->ethtool_ops = &smc_ethtool_ops;
1970 #ifdef CONFIG_NET_POLL_CONTROLLER
1971 dev->poll_controller = smc_poll_controller;
1972 #endif
1974 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1975 INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
1976 lp->mii.phy_id_mask = 0x1f;
1977 lp->mii.reg_num_mask = 0x1f;
1978 lp->mii.force_media = 0;
1979 lp->mii.full_duplex = 0;
1980 lp->mii.dev = dev;
1981 lp->mii.mdio_read = smc_phy_read;
1982 lp->mii.mdio_write = smc_phy_write;
1984 /*
1985 * Locate the phy, if any.
1986 */
1987 if (lp->version >= (CHIP_91100 << 4))
1988 smc_phy_detect(dev);
1990 /* then shut everything down to save power */
1991 smc_shutdown(dev);
1992 smc_phy_powerdown(dev);
1994 /* Set default parameters */
1995 lp->msg_enable = NETIF_MSG_LINK;
1996 lp->ctl_rfduplx = 0;
1997 lp->ctl_rspeed = 10;
1999 if (lp->version >= (CHIP_91100 << 4)) {
2000 lp->ctl_rfduplx = 1;
2001 lp->ctl_rspeed = 100;
2004 /* Grab the IRQ */
2005 retval = request_irq(dev->irq, &smc_interrupt, SMC_IRQ_FLAGS, dev->name, dev);
2006 if (retval)
2007 goto err_out;
2009 #ifdef SMC_USE_PXA_DMA
2011 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2012 smc_pxa_dma_irq, NULL);
2013 if (dma >= 0)
2014 dev->dma = dma;
2016 #endif
2018 retval = register_netdev(dev);
2019 if (retval == 0) {
2020 /* now, print out the card info, in a short format.. */
2021 printk("%s: %s (rev %d) at %p IRQ %d",
2022 dev->name, version_string, revision_register & 0x0f,
2023 lp->base, dev->irq);
2025 if (dev->dma != (unsigned char)-1)
2026 printk(" DMA %d", dev->dma);
2028 printk("%s%s\n", nowait ? " [nowait]" : "",
2029 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2031 if (!is_valid_ether_addr(dev->dev_addr)) {
2032 printk("%s: Invalid ethernet MAC address. Please "
2033 "set using ifconfig\n", dev->name);
2034 } else {
2035 /* Print the Ethernet address */
2036 printk("%s: Ethernet addr: ", dev->name);
2037 for (i = 0; i < 5; i++)
2038 printk("%2.2x:", dev->dev_addr[i]);
2039 printk("%2.2x\n", dev->dev_addr[5]);
2042 if (lp->phy_type == 0) {
2043 PRINTK("%s: No PHY found\n", dev->name);
2044 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2045 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2046 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2047 PRINTK("%s: PHY LAN83C180\n", dev->name);
2051 err_out:
2052 #ifdef SMC_USE_PXA_DMA
2053 if (retval && dev->dma != (unsigned char)-1)
2054 pxa_free_dma(dev->dma);
2055 #endif
2056 return retval;
2059 static int smc_enable_device(struct platform_device *pdev)
2061 unsigned long flags;
2062 unsigned char ecor, ecsr;
2063 void __iomem *addr;
2064 struct resource * res;
2066 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2067 if (!res)
2068 return 0;
2070 /*
2071 * Map the attribute space. This is overkill, but clean.
2072 */
2073 addr = ioremap(res->start, ATTRIB_SIZE);
2074 if (!addr)
2075 return -ENOMEM;
2077 /*
2078 * Reset the device. We must disable IRQs around this
2079 * since a reset causes the IRQ line become active.
2080 */
2081 local_irq_save(flags);
2082 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2083 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2084 readb(addr + (ECOR << SMC_IO_SHIFT));
2086 /*
2087 * Wait 100us for the chip to reset.
2088 */
2089 udelay(100);
2091 /*
2092 * The device will ignore all writes to the enable bit while
2093 * reset is asserted, even if the reset bit is cleared in the
2094 * same write. Must clear reset first, then enable the device.
2095 */
2096 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2097 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2099 /*
2100 * Set the appropriate byte/word mode.
2101 */
2102 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2103 if (!SMC_CAN_USE_16BIT)
2104 ecsr |= ECSR_IOIS8;
2105 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2106 local_irq_restore(flags);
2108 iounmap(addr);
2110 /*
2111 * Wait for the chip to wake up. We could poll the control
2112 * register in the main register space, but that isn't mapped
2113 * yet. We know this is going to take 750us.
2114 */
2115 msleep(1);
2117 return 0;
2120 static int smc_request_attrib(struct platform_device *pdev)
2122 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2124 if (!res)
2125 return 0;
2127 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2128 return -EBUSY;
2130 return 0;
2133 static void smc_release_attrib(struct platform_device *pdev)
2135 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2137 if (res)
2138 release_mem_region(res->start, ATTRIB_SIZE);
2141 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2143 if (SMC_CAN_USE_DATACS) {
2144 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2145 struct smc_local *lp = netdev_priv(ndev);
2147 if (!res)
2148 return;
2150 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2151 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2152 return;
2155 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2159 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2161 if (SMC_CAN_USE_DATACS) {
2162 struct smc_local *lp = netdev_priv(ndev);
2163 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2165 if (lp->datacs)
2166 iounmap(lp->datacs);
2168 lp->datacs = NULL;
2170 if (res)
2171 release_mem_region(res->start, SMC_DATA_EXTENT);
2175 /*
2176 * smc_init(void)
2177 * Input parameters:
2178 * dev->base_addr == 0, try to find all possible locations
2179 * dev->base_addr > 0x1ff, this is the address to check
2180 * dev->base_addr == <anything else>, return failure code
2182 * Output:
2183 * 0 --> there is a device
2184 * anything else, error
2185 */
2186 static int smc_drv_probe(struct platform_device *pdev)
2188 struct net_device *ndev;
2189 struct resource *res;
2190 unsigned int __iomem *addr;
2191 int ret;
2193 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2194 if (!res)
2195 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2196 if (!res) {
2197 ret = -ENODEV;
2198 goto out;
2202 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2203 ret = -EBUSY;
2204 goto out;
2207 ndev = alloc_etherdev(sizeof(struct smc_local));
2208 if (!ndev) {
2209 printk("%s: could not allocate device.\n", CARDNAME);
2210 ret = -ENOMEM;
2211 goto out_release_io;
2213 SET_MODULE_OWNER(ndev);
2214 SET_NETDEV_DEV(ndev, &pdev->dev);
2216 ndev->dma = (unsigned char)-1;
2217 ndev->irq = platform_get_irq(pdev, 0);
2218 if (ndev->irq < 0) {
2219 ret = -ENODEV;
2220 goto out_free_netdev;
2223 ret = smc_request_attrib(pdev);
2224 if (ret)
2225 goto out_free_netdev;
2226 #if defined(CONFIG_SA1100_ASSABET)
2227 NCR_0 |= NCR_ENET_OSC_EN;
2228 #endif
2229 ret = smc_enable_device(pdev);
2230 if (ret)
2231 goto out_release_attrib;
2233 addr = ioremap(res->start, SMC_IO_EXTENT);
2234 if (!addr) {
2235 ret = -ENOMEM;
2236 goto out_release_attrib;
2239 platform_set_drvdata(pdev, ndev);
2240 ret = smc_probe(ndev, addr);
2241 if (ret != 0)
2242 goto out_iounmap;
2243 #ifdef SMC_USE_PXA_DMA
2244 else {
2245 struct smc_local *lp = netdev_priv(ndev);
2246 lp->physaddr = res->start;
2248 #endif
2250 smc_request_datacs(pdev, ndev);
2252 return 0;
2254 out_iounmap:
2255 platform_set_drvdata(pdev, NULL);
2256 iounmap(addr);
2257 out_release_attrib:
2258 smc_release_attrib(pdev);
2259 out_free_netdev:
2260 free_netdev(ndev);
2261 out_release_io:
2262 release_mem_region(res->start, SMC_IO_EXTENT);
2263 out:
2264 printk("%s: not found (%d).\n", CARDNAME, ret);
2266 return ret;
2269 static int smc_drv_remove(struct platform_device *pdev)
2271 struct net_device *ndev = platform_get_drvdata(pdev);
2272 struct smc_local *lp = netdev_priv(ndev);
2273 struct resource *res;
2275 platform_set_drvdata(pdev, NULL);
2277 unregister_netdev(ndev);
2279 free_irq(ndev->irq, ndev);
2281 #ifdef SMC_USE_PXA_DMA
2282 if (ndev->dma != (unsigned char)-1)
2283 pxa_free_dma(ndev->dma);
2284 #endif
2285 iounmap(lp->base);
2287 smc_release_datacs(pdev,ndev);
2288 smc_release_attrib(pdev);
2290 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2291 if (!res)
2292 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2293 release_mem_region(res->start, SMC_IO_EXTENT);
2295 free_netdev(ndev);
2297 return 0;
2300 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2302 struct net_device *ndev = platform_get_drvdata(dev);
2304 if (ndev) {
2305 if (netif_running(ndev)) {
2306 netif_device_detach(ndev);
2307 smc_shutdown(ndev);
2308 smc_phy_powerdown(ndev);
2311 return 0;
2314 static int smc_drv_resume(struct platform_device *dev)
2316 struct net_device *ndev = platform_get_drvdata(dev);
2318 if (ndev) {
2319 struct smc_local *lp = netdev_priv(ndev);
2320 smc_enable_device(dev);
2321 if (netif_running(ndev)) {
2322 smc_reset(ndev);
2323 smc_enable(ndev);
2324 if (lp->phy_type != 0)
2325 smc_phy_configure(ndev);
2326 netif_device_attach(ndev);
2329 return 0;
2332 static struct platform_driver smc_driver = {
2333 .probe = smc_drv_probe,
2334 .remove = smc_drv_remove,
2335 .suspend = smc_drv_suspend,
2336 .resume = smc_drv_resume,
2337 .driver = {
2338 .name = CARDNAME,
2339 },
2340 };
2342 static int __init smc_init(void)
2344 #ifdef MODULE
2345 #ifdef CONFIG_ISA
2346 if (io == -1)
2347 printk(KERN_WARNING
2348 "%s: You shouldn't use auto-probing with insmod!\n",
2349 CARDNAME);
2350 #endif
2351 #endif
2353 return platform_driver_register(&smc_driver);
2356 static void __exit smc_cleanup(void)
2358 platform_driver_unregister(&smc_driver);
2361 module_init(smc_init);
2362 module_exit(smc_cleanup);