ia64/linux-2.6.18-xen.hg

view drivers/net/acenic.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
4 *
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
6 *
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
9 *
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * Additional credits:
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
44 * endian systems.
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
49 * driver init path.
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
51 */
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/version.h>
56 #include <linux/types.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/pci.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/kernel.h>
62 #include <linux/netdevice.h>
63 #include <linux/etherdevice.h>
64 #include <linux/skbuff.h>
65 #include <linux/init.h>
66 #include <linux/delay.h>
67 #include <linux/mm.h>
68 #include <linux/highmem.h>
69 #include <linux/sockios.h>
71 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
72 #include <linux/if_vlan.h>
73 #endif
75 #ifdef SIOCETHTOOL
76 #include <linux/ethtool.h>
77 #endif
79 #include <net/sock.h>
80 #include <net/ip.h>
82 #include <asm/system.h>
83 #include <asm/io.h>
84 #include <asm/irq.h>
85 #include <asm/byteorder.h>
86 #include <asm/uaccess.h>
89 #define DRV_NAME "acenic"
91 #undef INDEX_DEBUG
93 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
94 #define ACE_IS_TIGON_I(ap) 0
95 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
96 #else
97 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
98 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
99 #endif
101 #ifndef PCI_VENDOR_ID_ALTEON
102 #define PCI_VENDOR_ID_ALTEON 0x12ae
103 #endif
104 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
105 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
106 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
107 #endif
108 #ifndef PCI_DEVICE_ID_3COM_3C985
109 #define PCI_DEVICE_ID_3COM_3C985 0x0001
110 #endif
111 #ifndef PCI_VENDOR_ID_NETGEAR
112 #define PCI_VENDOR_ID_NETGEAR 0x1385
113 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
114 #endif
115 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
116 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
117 #endif
120 /*
121 * Farallon used the DEC vendor ID by mistake and they seem not
122 * to care - stinky!
123 */
124 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
125 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
126 #endif
127 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
128 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
129 #endif
130 #ifndef PCI_VENDOR_ID_SGI
131 #define PCI_VENDOR_ID_SGI 0x10a9
132 #endif
133 #ifndef PCI_DEVICE_ID_SGI_ACENIC
134 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
135 #endif
137 static struct pci_device_id acenic_pci_tbl[] = {
138 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
141 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
143 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
144 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
145 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
146 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
147 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
148 /*
149 * Farallon used the DEC vendor ID on their cards incorrectly,
150 * then later Alteon's ID.
151 */
152 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
153 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
154 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
155 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
156 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
157 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
158 { }
159 };
160 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
162 #ifndef SET_NETDEV_DEV
163 #define SET_NETDEV_DEV(net, pdev) do{} while(0)
164 #endif
166 #if LINUX_VERSION_CODE >= 0x2051c
167 #define ace_sync_irq(irq) synchronize_irq(irq)
168 #else
169 #define ace_sync_irq(irq) synchronize_irq()
170 #endif
172 #ifndef offset_in_page
173 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
174 #endif
176 #define ACE_MAX_MOD_PARMS 8
177 #define BOARD_IDX_STATIC 0
178 #define BOARD_IDX_OVERFLOW -1
180 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
181 defined(NETIF_F_HW_VLAN_RX)
182 #define ACENIC_DO_VLAN 1
183 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
184 #else
185 #define ACENIC_DO_VLAN 0
186 #define ACE_RCB_VLAN_FLAG 0
187 #endif
189 #include "acenic.h"
191 /*
192 * These must be defined before the firmware is included.
193 */
194 #define MAX_TEXT_LEN 96*1024
195 #define MAX_RODATA_LEN 8*1024
196 #define MAX_DATA_LEN 2*1024
198 #include "acenic_firmware.h"
200 #ifndef tigon2FwReleaseLocal
201 #define tigon2FwReleaseLocal 0
202 #endif
204 /*
205 * This driver currently supports Tigon I and Tigon II based cards
206 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
207 * GA620. The driver should also work on the SGI, DEC and Farallon
208 * versions of the card, however I have not been able to test that
209 * myself.
210 *
211 * This card is really neat, it supports receive hardware checksumming
212 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
213 * firmware. Also the programming interface is quite neat, except for
214 * the parts dealing with the i2c eeprom on the card ;-)
215 *
216 * Using jumbo frames:
217 *
218 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
219 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
220 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
221 * interface number and <MTU> being the MTU value.
222 *
223 * Module parameters:
224 *
225 * When compiled as a loadable module, the driver allows for a number
226 * of module parameters to be specified. The driver supports the
227 * following module parameters:
228 *
229 * trace=<val> - Firmware trace level. This requires special traced
230 * firmware to replace the firmware supplied with
231 * the driver - for debugging purposes only.
232 *
233 * link=<val> - Link state. Normally you want to use the default link
234 * parameters set by the driver. This can be used to
235 * override these in case your switch doesn't negotiate
236 * the link properly. Valid values are:
237 * 0x0001 - Force half duplex link.
238 * 0x0002 - Do not negotiate line speed with the other end.
239 * 0x0010 - 10Mbit/sec link.
240 * 0x0020 - 100Mbit/sec link.
241 * 0x0040 - 1000Mbit/sec link.
242 * 0x0100 - Do not negotiate flow control.
243 * 0x0200 - Enable RX flow control Y
244 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
245 * Default value is 0x0270, ie. enable link+flow
246 * control negotiation. Negotiating the highest
247 * possible link speed with RX flow control enabled.
248 *
249 * When disabling link speed negotiation, only one link
250 * speed is allowed to be specified!
251 *
252 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
253 * to wait for more packets to arive before
254 * interrupting the host, from the time the first
255 * packet arrives.
256 *
257 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
258 * to wait for more packets to arive in the transmit ring,
259 * before interrupting the host, after transmitting the
260 * first packet in the ring.
261 *
262 * max_tx_desc=<val> - maximum number of transmit descriptors
263 * (packets) transmitted before interrupting the host.
264 *
265 * max_rx_desc=<val> - maximum number of receive descriptors
266 * (packets) received before interrupting the host.
267 *
268 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
269 * increments of the NIC's on board memory to be used for
270 * transmit and receive buffers. For the 1MB NIC app. 800KB
271 * is available, on the 1/2MB NIC app. 300KB is available.
272 * 68KB will always be available as a minimum for both
273 * directions. The default value is a 50/50 split.
274 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
275 * operations, default (1) is to always disable this as
276 * that is what Alteon does on NT. I have not been able
277 * to measure any real performance differences with
278 * this on my systems. Set <val>=0 if you want to
279 * enable these operations.
280 *
281 * If you use more than one NIC, specify the parameters for the
282 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
283 * run tracing on NIC #2 but not on NIC #1 and #3.
284 *
285 * TODO:
286 *
287 * - Proper multicast support.
288 * - NIC dump support.
289 * - More tuning parameters.
290 *
291 * The mini ring is not used under Linux and I am not sure it makes sense
292 * to actually use it.
293 *
294 * New interrupt handler strategy:
295 *
296 * The old interrupt handler worked using the traditional method of
297 * replacing an skbuff with a new one when a packet arrives. However
298 * the rx rings do not need to contain a static number of buffer
299 * descriptors, thus it makes sense to move the memory allocation out
300 * of the main interrupt handler and do it in a bottom half handler
301 * and only allocate new buffers when the number of buffers in the
302 * ring is below a certain threshold. In order to avoid starving the
303 * NIC under heavy load it is however necessary to force allocation
304 * when hitting a minimum threshold. The strategy for alloction is as
305 * follows:
306 *
307 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
308 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
309 * the buffers in the interrupt handler
310 * RX_RING_THRES - maximum number of buffers in the rx ring
311 * RX_MINI_THRES - maximum number of buffers in the mini ring
312 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
313 *
314 * One advantagous side effect of this allocation approach is that the
315 * entire rx processing can be done without holding any spin lock
316 * since the rx rings and registers are totally independent of the tx
317 * ring and its registers. This of course includes the kmalloc's of
318 * new skb's. Thus start_xmit can run in parallel with rx processing
319 * and the memory allocation on SMP systems.
320 *
321 * Note that running the skb reallocation in a bottom half opens up
322 * another can of races which needs to be handled properly. In
323 * particular it can happen that the interrupt handler tries to run
324 * the reallocation while the bottom half is either running on another
325 * CPU or was interrupted on the same CPU. To get around this the
326 * driver uses bitops to prevent the reallocation routines from being
327 * reentered.
328 *
329 * TX handling can also be done without holding any spin lock, wheee
330 * this is fun! since tx_ret_csm is only written to by the interrupt
331 * handler. The case to be aware of is when shutting down the device
332 * and cleaning up where it is necessary to make sure that
333 * start_xmit() is not running while this is happening. Well DaveM
334 * informs me that this case is already protected against ... bye bye
335 * Mr. Spin Lock, it was nice to know you.
336 *
337 * TX interrupts are now partly disabled so the NIC will only generate
338 * TX interrupts for the number of coal ticks, not for the number of
339 * TX packets in the queue. This should reduce the number of TX only,
340 * ie. when no RX processing is done, interrupts seen.
341 */
343 /*
344 * Threshold values for RX buffer allocation - the low water marks for
345 * when to start refilling the rings are set to 75% of the ring
346 * sizes. It seems to make sense to refill the rings entirely from the
347 * intrrupt handler once it gets below the panic threshold, that way
348 * we don't risk that the refilling is moved to another CPU when the
349 * one running the interrupt handler just got the slab code hot in its
350 * cache.
351 */
352 #define RX_RING_SIZE 72
353 #define RX_MINI_SIZE 64
354 #define RX_JUMBO_SIZE 48
356 #define RX_PANIC_STD_THRES 16
357 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
358 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
359 #define RX_PANIC_MINI_THRES 12
360 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
361 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
362 #define RX_PANIC_JUMBO_THRES 6
363 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
364 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
367 /*
368 * Size of the mini ring entries, basically these just should be big
369 * enough to take TCP ACKs
370 */
371 #define ACE_MINI_SIZE 100
373 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
374 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
375 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
377 /*
378 * There seems to be a magic difference in the effect between 995 and 996
379 * but little difference between 900 and 995 ... no idea why.
380 *
381 * There is now a default set of tuning parameters which is set, depending
382 * on whether or not the user enables Jumbo frames. It's assumed that if
383 * Jumbo frames are enabled, the user wants optimal tuning for that case.
384 */
385 #define DEF_TX_COAL 400 /* 996 */
386 #define DEF_TX_MAX_DESC 60 /* was 40 */
387 #define DEF_RX_COAL 120 /* 1000 */
388 #define DEF_RX_MAX_DESC 25
389 #define DEF_TX_RATIO 21 /* 24 */
391 #define DEF_JUMBO_TX_COAL 20
392 #define DEF_JUMBO_TX_MAX_DESC 60
393 #define DEF_JUMBO_RX_COAL 30
394 #define DEF_JUMBO_RX_MAX_DESC 6
395 #define DEF_JUMBO_TX_RATIO 21
397 #if tigon2FwReleaseLocal < 20001118
398 /*
399 * Standard firmware and early modifications duplicate
400 * IRQ load without this flag (coal timer is never reset).
401 * Note that with this flag tx_coal should be less than
402 * time to xmit full tx ring.
403 * 400usec is not so bad for tx ring size of 128.
404 */
405 #define TX_COAL_INTS_ONLY 1 /* worth it */
406 #else
407 /*
408 * With modified firmware, this is not necessary, but still useful.
409 */
410 #define TX_COAL_INTS_ONLY 1
411 #endif
413 #define DEF_TRACE 0
414 #define DEF_STAT (2 * TICKS_PER_SEC)
417 static int link[ACE_MAX_MOD_PARMS];
418 static int trace[ACE_MAX_MOD_PARMS];
419 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
420 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
421 static int max_tx_desc[ACE_MAX_MOD_PARMS];
422 static int max_rx_desc[ACE_MAX_MOD_PARMS];
423 static int tx_ratio[ACE_MAX_MOD_PARMS];
424 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
426 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
427 MODULE_LICENSE("GPL");
428 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
430 module_param_array(link, int, NULL, 0);
431 module_param_array(trace, int, NULL, 0);
432 module_param_array(tx_coal_tick, int, NULL, 0);
433 module_param_array(max_tx_desc, int, NULL, 0);
434 module_param_array(rx_coal_tick, int, NULL, 0);
435 module_param_array(max_rx_desc, int, NULL, 0);
436 module_param_array(tx_ratio, int, NULL, 0);
437 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
438 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
439 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
440 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
441 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
442 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
443 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
446 static char version[] __devinitdata =
447 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
448 " http://home.cern.ch/~jes/gige/acenic.html\n";
450 static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
451 static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
452 static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
454 static struct ethtool_ops ace_ethtool_ops = {
455 .get_settings = ace_get_settings,
456 .set_settings = ace_set_settings,
457 .get_drvinfo = ace_get_drvinfo,
458 };
460 static void ace_watchdog(struct net_device *dev);
462 static int __devinit acenic_probe_one(struct pci_dev *pdev,
463 const struct pci_device_id *id)
464 {
465 struct net_device *dev;
466 struct ace_private *ap;
467 static int boards_found;
469 dev = alloc_etherdev(sizeof(struct ace_private));
470 if (dev == NULL) {
471 printk(KERN_ERR "acenic: Unable to allocate "
472 "net_device structure!\n");
473 return -ENOMEM;
474 }
476 SET_MODULE_OWNER(dev);
477 SET_NETDEV_DEV(dev, &pdev->dev);
479 ap = dev->priv;
480 ap->pdev = pdev;
481 ap->name = pci_name(pdev);
483 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
484 #if ACENIC_DO_VLAN
485 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
486 dev->vlan_rx_register = ace_vlan_rx_register;
487 dev->vlan_rx_kill_vid = ace_vlan_rx_kill_vid;
488 #endif
489 if (1) {
490 dev->tx_timeout = &ace_watchdog;
491 dev->watchdog_timeo = 5*HZ;
492 }
494 dev->open = &ace_open;
495 dev->stop = &ace_close;
496 dev->hard_start_xmit = &ace_start_xmit;
497 dev->get_stats = &ace_get_stats;
498 dev->set_multicast_list = &ace_set_multicast_list;
499 SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
500 dev->set_mac_address = &ace_set_mac_addr;
501 dev->change_mtu = &ace_change_mtu;
503 /* we only display this string ONCE */
504 if (!boards_found)
505 printk(version);
507 if (pci_enable_device(pdev))
508 goto fail_free_netdev;
510 /*
511 * Enable master mode before we start playing with the
512 * pci_command word since pci_set_master() will modify
513 * it.
514 */
515 pci_set_master(pdev);
517 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
519 /* OpenFirmware on Mac's does not set this - DOH.. */
520 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
521 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
522 "access - was not enabled by BIOS/Firmware\n",
523 ap->name);
524 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
525 pci_write_config_word(ap->pdev, PCI_COMMAND,
526 ap->pci_command);
527 wmb();
528 }
530 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
531 if (ap->pci_latency <= 0x40) {
532 ap->pci_latency = 0x40;
533 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
534 }
536 /*
537 * Remap the regs into kernel space - this is abuse of
538 * dev->base_addr since it was means for I/O port
539 * addresses but who gives a damn.
540 */
541 dev->base_addr = pci_resource_start(pdev, 0);
542 ap->regs = ioremap(dev->base_addr, 0x4000);
543 if (!ap->regs) {
544 printk(KERN_ERR "%s: Unable to map I/O register, "
545 "AceNIC %i will be disabled.\n",
546 ap->name, boards_found);
547 goto fail_free_netdev;
548 }
550 switch(pdev->vendor) {
551 case PCI_VENDOR_ID_ALTEON:
552 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
553 printk(KERN_INFO "%s: Farallon PN9100-T ",
554 ap->name);
555 } else {
556 printk(KERN_INFO "%s: Alteon AceNIC ",
557 ap->name);
558 }
559 break;
560 case PCI_VENDOR_ID_3COM:
561 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
562 break;
563 case PCI_VENDOR_ID_NETGEAR:
564 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
565 break;
566 case PCI_VENDOR_ID_DEC:
567 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
568 printk(KERN_INFO "%s: Farallon PN9000-SX ",
569 ap->name);
570 break;
571 }
572 case PCI_VENDOR_ID_SGI:
573 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
574 break;
575 default:
576 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
577 break;
578 }
580 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
581 printk("irq %d\n", pdev->irq);
583 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
584 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
585 printk(KERN_ERR "%s: Driver compiled without Tigon I"
586 " support - NIC disabled\n", dev->name);
587 goto fail_uninit;
588 }
589 #endif
591 if (ace_allocate_descriptors(dev))
592 goto fail_free_netdev;
594 #ifdef MODULE
595 if (boards_found >= ACE_MAX_MOD_PARMS)
596 ap->board_idx = BOARD_IDX_OVERFLOW;
597 else
598 ap->board_idx = boards_found;
599 #else
600 ap->board_idx = BOARD_IDX_STATIC;
601 #endif
603 if (ace_init(dev))
604 goto fail_free_netdev;
606 if (register_netdev(dev)) {
607 printk(KERN_ERR "acenic: device registration failed\n");
608 goto fail_uninit;
609 }
610 ap->name = dev->name;
612 if (ap->pci_using_dac)
613 dev->features |= NETIF_F_HIGHDMA;
615 pci_set_drvdata(pdev, dev);
617 boards_found++;
618 return 0;
620 fail_uninit:
621 ace_init_cleanup(dev);
622 fail_free_netdev:
623 free_netdev(dev);
624 return -ENODEV;
625 }
627 static void __devexit acenic_remove_one(struct pci_dev *pdev)
628 {
629 struct net_device *dev = pci_get_drvdata(pdev);
630 struct ace_private *ap = netdev_priv(dev);
631 struct ace_regs __iomem *regs = ap->regs;
632 short i;
634 unregister_netdev(dev);
636 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
637 if (ap->version >= 2)
638 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
640 /*
641 * This clears any pending interrupts
642 */
643 writel(1, &regs->Mb0Lo);
644 readl(&regs->CpuCtrl); /* flush */
646 /*
647 * Make sure no other CPUs are processing interrupts
648 * on the card before the buffers are being released.
649 * Otherwise one might experience some `interesting'
650 * effects.
651 *
652 * Then release the RX buffers - jumbo buffers were
653 * already released in ace_close().
654 */
655 ace_sync_irq(dev->irq);
657 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
658 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
660 if (skb) {
661 struct ring_info *ringp;
662 dma_addr_t mapping;
664 ringp = &ap->skb->rx_std_skbuff[i];
665 mapping = pci_unmap_addr(ringp, mapping);
666 pci_unmap_page(ap->pdev, mapping,
667 ACE_STD_BUFSIZE,
668 PCI_DMA_FROMDEVICE);
670 ap->rx_std_ring[i].size = 0;
671 ap->skb->rx_std_skbuff[i].skb = NULL;
672 dev_kfree_skb(skb);
673 }
674 }
676 if (ap->version >= 2) {
677 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
678 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
680 if (skb) {
681 struct ring_info *ringp;
682 dma_addr_t mapping;
684 ringp = &ap->skb->rx_mini_skbuff[i];
685 mapping = pci_unmap_addr(ringp,mapping);
686 pci_unmap_page(ap->pdev, mapping,
687 ACE_MINI_BUFSIZE,
688 PCI_DMA_FROMDEVICE);
690 ap->rx_mini_ring[i].size = 0;
691 ap->skb->rx_mini_skbuff[i].skb = NULL;
692 dev_kfree_skb(skb);
693 }
694 }
695 }
697 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
698 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
699 if (skb) {
700 struct ring_info *ringp;
701 dma_addr_t mapping;
703 ringp = &ap->skb->rx_jumbo_skbuff[i];
704 mapping = pci_unmap_addr(ringp, mapping);
705 pci_unmap_page(ap->pdev, mapping,
706 ACE_JUMBO_BUFSIZE,
707 PCI_DMA_FROMDEVICE);
709 ap->rx_jumbo_ring[i].size = 0;
710 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
711 dev_kfree_skb(skb);
712 }
713 }
715 ace_init_cleanup(dev);
716 free_netdev(dev);
717 }
719 static struct pci_driver acenic_pci_driver = {
720 .name = "acenic",
721 .id_table = acenic_pci_tbl,
722 .probe = acenic_probe_one,
723 .remove = __devexit_p(acenic_remove_one),
724 };
726 static int __init acenic_init(void)
727 {
728 return pci_module_init(&acenic_pci_driver);
729 }
731 static void __exit acenic_exit(void)
732 {
733 pci_unregister_driver(&acenic_pci_driver);
734 }
736 module_init(acenic_init);
737 module_exit(acenic_exit);
739 static void ace_free_descriptors(struct net_device *dev)
740 {
741 struct ace_private *ap = netdev_priv(dev);
742 int size;
744 if (ap->rx_std_ring != NULL) {
745 size = (sizeof(struct rx_desc) *
746 (RX_STD_RING_ENTRIES +
747 RX_JUMBO_RING_ENTRIES +
748 RX_MINI_RING_ENTRIES +
749 RX_RETURN_RING_ENTRIES));
750 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
751 ap->rx_ring_base_dma);
752 ap->rx_std_ring = NULL;
753 ap->rx_jumbo_ring = NULL;
754 ap->rx_mini_ring = NULL;
755 ap->rx_return_ring = NULL;
756 }
757 if (ap->evt_ring != NULL) {
758 size = (sizeof(struct event) * EVT_RING_ENTRIES);
759 pci_free_consistent(ap->pdev, size, ap->evt_ring,
760 ap->evt_ring_dma);
761 ap->evt_ring = NULL;
762 }
763 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
764 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
765 pci_free_consistent(ap->pdev, size, ap->tx_ring,
766 ap->tx_ring_dma);
767 }
768 ap->tx_ring = NULL;
770 if (ap->evt_prd != NULL) {
771 pci_free_consistent(ap->pdev, sizeof(u32),
772 (void *)ap->evt_prd, ap->evt_prd_dma);
773 ap->evt_prd = NULL;
774 }
775 if (ap->rx_ret_prd != NULL) {
776 pci_free_consistent(ap->pdev, sizeof(u32),
777 (void *)ap->rx_ret_prd,
778 ap->rx_ret_prd_dma);
779 ap->rx_ret_prd = NULL;
780 }
781 if (ap->tx_csm != NULL) {
782 pci_free_consistent(ap->pdev, sizeof(u32),
783 (void *)ap->tx_csm, ap->tx_csm_dma);
784 ap->tx_csm = NULL;
785 }
786 }
789 static int ace_allocate_descriptors(struct net_device *dev)
790 {
791 struct ace_private *ap = netdev_priv(dev);
792 int size;
794 size = (sizeof(struct rx_desc) *
795 (RX_STD_RING_ENTRIES +
796 RX_JUMBO_RING_ENTRIES +
797 RX_MINI_RING_ENTRIES +
798 RX_RETURN_RING_ENTRIES));
800 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
801 &ap->rx_ring_base_dma);
802 if (ap->rx_std_ring == NULL)
803 goto fail;
805 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
806 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
807 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
809 size = (sizeof(struct event) * EVT_RING_ENTRIES);
811 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
813 if (ap->evt_ring == NULL)
814 goto fail;
816 /*
817 * Only allocate a host TX ring for the Tigon II, the Tigon I
818 * has to use PCI registers for this ;-(
819 */
820 if (!ACE_IS_TIGON_I(ap)) {
821 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
823 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
824 &ap->tx_ring_dma);
826 if (ap->tx_ring == NULL)
827 goto fail;
828 }
830 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
831 &ap->evt_prd_dma);
832 if (ap->evt_prd == NULL)
833 goto fail;
835 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
836 &ap->rx_ret_prd_dma);
837 if (ap->rx_ret_prd == NULL)
838 goto fail;
840 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
841 &ap->tx_csm_dma);
842 if (ap->tx_csm == NULL)
843 goto fail;
845 return 0;
847 fail:
848 /* Clean up. */
849 ace_init_cleanup(dev);
850 return 1;
851 }
854 /*
855 * Generic cleanup handling data allocated during init. Used when the
856 * module is unloaded or if an error occurs during initialization
857 */
858 static void ace_init_cleanup(struct net_device *dev)
859 {
860 struct ace_private *ap;
862 ap = netdev_priv(dev);
864 ace_free_descriptors(dev);
866 if (ap->info)
867 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
868 ap->info, ap->info_dma);
869 kfree(ap->skb);
870 kfree(ap->trace_buf);
872 if (dev->irq)
873 free_irq(dev->irq, dev);
875 iounmap(ap->regs);
876 }
879 /*
880 * Commands are considered to be slow.
881 */
882 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
883 {
884 u32 idx;
886 idx = readl(&regs->CmdPrd);
888 writel(*(u32 *)(cmd), &regs->CmdRng[idx]);
889 idx = (idx + 1) % CMD_RING_ENTRIES;
891 writel(idx, &regs->CmdPrd);
892 }
895 static int __devinit ace_init(struct net_device *dev)
896 {
897 struct ace_private *ap;
898 struct ace_regs __iomem *regs;
899 struct ace_info *info = NULL;
900 struct pci_dev *pdev;
901 unsigned long myjif;
902 u64 tmp_ptr;
903 u32 tig_ver, mac1, mac2, tmp, pci_state;
904 int board_idx, ecode = 0;
905 short i;
906 unsigned char cache_size;
908 ap = netdev_priv(dev);
909 regs = ap->regs;
911 board_idx = ap->board_idx;
913 /*
914 * aman@sgi.com - its useful to do a NIC reset here to
915 * address the `Firmware not running' problem subsequent
916 * to any crashes involving the NIC
917 */
918 writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl);
919 readl(&regs->HostCtrl); /* PCI write posting */
920 udelay(5);
922 /*
923 * Don't access any other registers before this point!
924 */
925 #ifdef __BIG_ENDIAN
926 /*
927 * This will most likely need BYTE_SWAP once we switch
928 * to using __raw_writel()
929 */
930 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
931 &regs->HostCtrl);
932 #else
933 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
934 &regs->HostCtrl);
935 #endif
936 readl(&regs->HostCtrl); /* PCI write posting */
938 /*
939 * Stop the NIC CPU and clear pending interrupts
940 */
941 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
942 readl(&regs->CpuCtrl); /* PCI write posting */
943 writel(0, &regs->Mb0Lo);
945 tig_ver = readl(&regs->HostCtrl) >> 28;
947 switch(tig_ver){
948 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
949 case 4:
950 case 5:
951 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
952 tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
953 tigonFwReleaseFix);
954 writel(0, &regs->LocalCtrl);
955 ap->version = 1;
956 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
957 break;
958 #endif
959 case 6:
960 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
961 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
962 tigon2FwReleaseFix);
963 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
964 readl(&regs->CpuBCtrl); /* PCI write posting */
965 /*
966 * The SRAM bank size does _not_ indicate the amount
967 * of memory on the card, it controls the _bank_ size!
968 * Ie. a 1MB AceNIC will have two banks of 512KB.
969 */
970 writel(SRAM_BANK_512K, &regs->LocalCtrl);
971 writel(SYNC_SRAM_TIMING, &regs->MiscCfg);
972 ap->version = 2;
973 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
974 break;
975 default:
976 printk(KERN_WARNING " Unsupported Tigon version detected "
977 "(%i)\n", tig_ver);
978 ecode = -ENODEV;
979 goto init_error;
980 }
982 /*
983 * ModeStat _must_ be set after the SRAM settings as this change
984 * seems to corrupt the ModeStat and possible other registers.
985 * The SRAM settings survive resets and setting it to the same
986 * value a second time works as well. This is what caused the
987 * `Firmware not running' problem on the Tigon II.
988 */
989 #ifdef __BIG_ENDIAN
990 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
991 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
992 #else
993 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
994 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
995 #endif
996 readl(&regs->ModeStat); /* PCI write posting */
998 mac1 = 0;
999 for(i = 0; i < 4; i++) {
1000 int tmp;
1002 mac1 = mac1 << 8;
1003 tmp = read_eeprom_byte(dev, 0x8c+i);
1004 if (tmp < 0) {
1005 ecode = -EIO;
1006 goto init_error;
1007 } else
1008 mac1 |= (tmp & 0xff);
1010 mac2 = 0;
1011 for(i = 4; i < 8; i++) {
1012 int tmp;
1014 mac2 = mac2 << 8;
1015 tmp = read_eeprom_byte(dev, 0x8c+i);
1016 if (tmp < 0) {
1017 ecode = -EIO;
1018 goto init_error;
1019 } else
1020 mac2 |= (tmp & 0xff);
1023 writel(mac1, &regs->MacAddrHi);
1024 writel(mac2, &regs->MacAddrLo);
1026 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1027 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1028 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1030 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1031 dev->dev_addr[1] = mac1 & 0xff;
1032 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1033 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1034 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1035 dev->dev_addr[5] = mac2 & 0xff;
1037 /*
1038 * Looks like this is necessary to deal with on all architectures,
1039 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1040 * Ie. having two NICs in the machine, one will have the cache
1041 * line set at boot time, the other will not.
1042 */
1043 pdev = ap->pdev;
1044 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1045 cache_size <<= 2;
1046 if (cache_size != SMP_CACHE_BYTES) {
1047 printk(KERN_INFO " PCI cache line size set incorrectly "
1048 "(%i bytes) by BIOS/FW, ", cache_size);
1049 if (cache_size > SMP_CACHE_BYTES)
1050 printk("expecting %i\n", SMP_CACHE_BYTES);
1051 else {
1052 printk("correcting to %i\n", SMP_CACHE_BYTES);
1053 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1054 SMP_CACHE_BYTES >> 2);
1058 pci_state = readl(&regs->PciState);
1059 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1060 "latency: %i clks\n",
1061 (pci_state & PCI_32BIT) ? 32 : 64,
1062 (pci_state & PCI_66MHZ) ? 66 : 33,
1063 ap->pci_latency);
1065 /*
1066 * Set the max DMA transfer size. Seems that for most systems
1067 * the performance is better when no MAX parameter is
1068 * set. However for systems enabling PCI write and invalidate,
1069 * DMA writes must be set to the L1 cache line size to get
1070 * optimal performance.
1072 * The default is now to turn the PCI write and invalidate off
1073 * - that is what Alteon does for NT.
1074 */
1075 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1076 if (ap->version >= 2) {
1077 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1078 /*
1079 * Tuning parameters only supported for 8 cards
1080 */
1081 if (board_idx == BOARD_IDX_OVERFLOW ||
1082 dis_pci_mem_inval[board_idx]) {
1083 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1084 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1085 pci_write_config_word(pdev, PCI_COMMAND,
1086 ap->pci_command);
1087 printk(KERN_INFO " Disabling PCI memory "
1088 "write and invalidate\n");
1090 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1091 printk(KERN_INFO " PCI memory write & invalidate "
1092 "enabled by BIOS, enabling counter measures\n");
1094 switch(SMP_CACHE_BYTES) {
1095 case 16:
1096 tmp |= DMA_WRITE_MAX_16;
1097 break;
1098 case 32:
1099 tmp |= DMA_WRITE_MAX_32;
1100 break;
1101 case 64:
1102 tmp |= DMA_WRITE_MAX_64;
1103 break;
1104 case 128:
1105 tmp |= DMA_WRITE_MAX_128;
1106 break;
1107 default:
1108 printk(KERN_INFO " Cache line size %i not "
1109 "supported, PCI write and invalidate "
1110 "disabled\n", SMP_CACHE_BYTES);
1111 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1112 pci_write_config_word(pdev, PCI_COMMAND,
1113 ap->pci_command);
1118 #ifdef __sparc__
1119 /*
1120 * On this platform, we know what the best dma settings
1121 * are. We use 64-byte maximum bursts, because if we
1122 * burst larger than the cache line size (or even cross
1123 * a 64byte boundary in a single burst) the UltraSparc
1124 * PCI controller will disconnect at 64-byte multiples.
1126 * Read-multiple will be properly enabled above, and when
1127 * set will give the PCI controller proper hints about
1128 * prefetching.
1129 */
1130 tmp &= ~DMA_READ_WRITE_MASK;
1131 tmp |= DMA_READ_MAX_64;
1132 tmp |= DMA_WRITE_MAX_64;
1133 #endif
1134 #ifdef __alpha__
1135 tmp &= ~DMA_READ_WRITE_MASK;
1136 tmp |= DMA_READ_MAX_128;
1137 /*
1138 * All the docs say MUST NOT. Well, I did.
1139 * Nothing terrible happens, if we load wrong size.
1140 * Bit w&i still works better!
1141 */
1142 tmp |= DMA_WRITE_MAX_128;
1143 #endif
1144 writel(tmp, &regs->PciState);
1146 #if 0
1147 /*
1148 * The Host PCI bus controller driver has to set FBB.
1149 * If all devices on that PCI bus support FBB, then the controller
1150 * can enable FBB support in the Host PCI Bus controller (or on
1151 * the PCI-PCI bridge if that applies).
1152 * -ggg
1153 */
1154 /*
1155 * I have received reports from people having problems when this
1156 * bit is enabled.
1157 */
1158 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1159 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1160 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1161 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1163 #endif
1165 /*
1166 * Configure DMA attributes.
1167 */
1168 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1169 ap->pci_using_dac = 1;
1170 } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1171 ap->pci_using_dac = 0;
1172 } else {
1173 ecode = -ENODEV;
1174 goto init_error;
1177 /*
1178 * Initialize the generic info block and the command+event rings
1179 * and the control blocks for the transmit and receive rings
1180 * as they need to be setup once and for all.
1181 */
1182 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1183 &ap->info_dma))) {
1184 ecode = -EAGAIN;
1185 goto init_error;
1187 ap->info = info;
1189 /*
1190 * Get the memory for the skb rings.
1191 */
1192 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1193 ecode = -EAGAIN;
1194 goto init_error;
1197 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
1198 DRV_NAME, dev);
1199 if (ecode) {
1200 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1201 DRV_NAME, pdev->irq);
1202 goto init_error;
1203 } else
1204 dev->irq = pdev->irq;
1206 #ifdef INDEX_DEBUG
1207 spin_lock_init(&ap->debug_lock);
1208 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1209 ap->last_std_rx = 0;
1210 ap->last_mini_rx = 0;
1211 #endif
1213 memset(ap->info, 0, sizeof(struct ace_info));
1214 memset(ap->skb, 0, sizeof(struct ace_skb));
1216 ace_load_firmware(dev);
1217 ap->fw_running = 0;
1219 tmp_ptr = ap->info_dma;
1220 writel(tmp_ptr >> 32, &regs->InfoPtrHi);
1221 writel(tmp_ptr & 0xffffffff, &regs->InfoPtrLo);
1223 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1225 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1226 info->evt_ctrl.flags = 0;
1228 *(ap->evt_prd) = 0;
1229 wmb();
1230 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1231 writel(0, &regs->EvtCsm);
1233 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1234 info->cmd_ctrl.flags = 0;
1235 info->cmd_ctrl.max_len = 0;
1237 for (i = 0; i < CMD_RING_ENTRIES; i++)
1238 writel(0, &regs->CmdRng[i]);
1240 writel(0, &regs->CmdPrd);
1241 writel(0, &regs->CmdCsm);
1243 tmp_ptr = ap->info_dma;
1244 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1245 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1247 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1248 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1249 info->rx_std_ctrl.flags =
1250 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1252 memset(ap->rx_std_ring, 0,
1253 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1255 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1256 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1258 ap->rx_std_skbprd = 0;
1259 atomic_set(&ap->cur_rx_bufs, 0);
1261 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1262 (ap->rx_ring_base_dma +
1263 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1264 info->rx_jumbo_ctrl.max_len = 0;
1265 info->rx_jumbo_ctrl.flags =
1266 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1268 memset(ap->rx_jumbo_ring, 0,
1269 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1271 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1272 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1274 ap->rx_jumbo_skbprd = 0;
1275 atomic_set(&ap->cur_jumbo_bufs, 0);
1277 memset(ap->rx_mini_ring, 0,
1278 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1280 if (ap->version >= 2) {
1281 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1282 (ap->rx_ring_base_dma +
1283 (sizeof(struct rx_desc) *
1284 (RX_STD_RING_ENTRIES +
1285 RX_JUMBO_RING_ENTRIES))));
1286 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1287 info->rx_mini_ctrl.flags =
1288 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1290 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1291 ap->rx_mini_ring[i].flags =
1292 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1293 } else {
1294 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1295 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1296 info->rx_mini_ctrl.max_len = 0;
1299 ap->rx_mini_skbprd = 0;
1300 atomic_set(&ap->cur_mini_bufs, 0);
1302 set_aceaddr(&info->rx_return_ctrl.rngptr,
1303 (ap->rx_ring_base_dma +
1304 (sizeof(struct rx_desc) *
1305 (RX_STD_RING_ENTRIES +
1306 RX_JUMBO_RING_ENTRIES +
1307 RX_MINI_RING_ENTRIES))));
1308 info->rx_return_ctrl.flags = 0;
1309 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1311 memset(ap->rx_return_ring, 0,
1312 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1314 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1315 *(ap->rx_ret_prd) = 0;
1317 writel(TX_RING_BASE, &regs->WinBase);
1319 if (ACE_IS_TIGON_I(ap)) {
1320 ap->tx_ring = (struct tx_desc *) regs->Window;
1321 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1322 * sizeof(struct tx_desc)) / sizeof(u32); i++)
1323 writel(0, (void __iomem *)ap->tx_ring + i * 4);
1325 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1326 } else {
1327 memset(ap->tx_ring, 0,
1328 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1330 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1333 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1334 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1336 /*
1337 * The Tigon I does not like having the TX ring in host memory ;-(
1338 */
1339 if (!ACE_IS_TIGON_I(ap))
1340 tmp |= RCB_FLG_TX_HOST_RING;
1341 #if TX_COAL_INTS_ONLY
1342 tmp |= RCB_FLG_COAL_INT_ONLY;
1343 #endif
1344 info->tx_ctrl.flags = tmp;
1346 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1348 /*
1349 * Potential item for tuning parameter
1350 */
1351 #if 0 /* NO */
1352 writel(DMA_THRESH_16W, &regs->DmaReadCfg);
1353 writel(DMA_THRESH_16W, &regs->DmaWriteCfg);
1354 #else
1355 writel(DMA_THRESH_8W, &regs->DmaReadCfg);
1356 writel(DMA_THRESH_8W, &regs->DmaWriteCfg);
1357 #endif
1359 writel(0, &regs->MaskInt);
1360 writel(1, &regs->IfIdx);
1361 #if 0
1362 /*
1363 * McKinley boxes do not like us fiddling with AssistState
1364 * this early
1365 */
1366 writel(1, &regs->AssistState);
1367 #endif
1369 writel(DEF_STAT, &regs->TuneStatTicks);
1370 writel(DEF_TRACE, &regs->TuneTrace);
1372 ace_set_rxtx_parms(dev, 0);
1374 if (board_idx == BOARD_IDX_OVERFLOW) {
1375 printk(KERN_WARNING "%s: more than %i NICs detected, "
1376 "ignoring module parameters!\n",
1377 ap->name, ACE_MAX_MOD_PARMS);
1378 } else if (board_idx >= 0) {
1379 if (tx_coal_tick[board_idx])
1380 writel(tx_coal_tick[board_idx],
1381 &regs->TuneTxCoalTicks);
1382 if (max_tx_desc[board_idx])
1383 writel(max_tx_desc[board_idx], &regs->TuneMaxTxDesc);
1385 if (rx_coal_tick[board_idx])
1386 writel(rx_coal_tick[board_idx],
1387 &regs->TuneRxCoalTicks);
1388 if (max_rx_desc[board_idx])
1389 writel(max_rx_desc[board_idx], &regs->TuneMaxRxDesc);
1391 if (trace[board_idx])
1392 writel(trace[board_idx], &regs->TuneTrace);
1394 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1395 writel(tx_ratio[board_idx], &regs->TxBufRat);
1398 /*
1399 * Default link parameters
1400 */
1401 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1402 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1403 if(ap->version >= 2)
1404 tmp |= LNK_TX_FLOW_CTL_Y;
1406 /*
1407 * Override link default parameters
1408 */
1409 if ((board_idx >= 0) && link[board_idx]) {
1410 int option = link[board_idx];
1412 tmp = LNK_ENABLE;
1414 if (option & 0x01) {
1415 printk(KERN_INFO "%s: Setting half duplex link\n",
1416 ap->name);
1417 tmp &= ~LNK_FULL_DUPLEX;
1419 if (option & 0x02)
1420 tmp &= ~LNK_NEGOTIATE;
1421 if (option & 0x10)
1422 tmp |= LNK_10MB;
1423 if (option & 0x20)
1424 tmp |= LNK_100MB;
1425 if (option & 0x40)
1426 tmp |= LNK_1000MB;
1427 if ((option & 0x70) == 0) {
1428 printk(KERN_WARNING "%s: No media speed specified, "
1429 "forcing auto negotiation\n", ap->name);
1430 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1431 LNK_100MB | LNK_10MB;
1433 if ((option & 0x100) == 0)
1434 tmp |= LNK_NEG_FCTL;
1435 else
1436 printk(KERN_INFO "%s: Disabling flow control "
1437 "negotiation\n", ap->name);
1438 if (option & 0x200)
1439 tmp |= LNK_RX_FLOW_CTL_Y;
1440 if ((option & 0x400) && (ap->version >= 2)) {
1441 printk(KERN_INFO "%s: Enabling TX flow control\n",
1442 ap->name);
1443 tmp |= LNK_TX_FLOW_CTL_Y;
1447 ap->link = tmp;
1448 writel(tmp, &regs->TuneLink);
1449 if (ap->version >= 2)
1450 writel(tmp, &regs->TuneFastLink);
1452 if (ACE_IS_TIGON_I(ap))
1453 writel(tigonFwStartAddr, &regs->Pc);
1454 if (ap->version == 2)
1455 writel(tigon2FwStartAddr, &regs->Pc);
1457 writel(0, &regs->Mb0Lo);
1459 /*
1460 * Set tx_csm before we start receiving interrupts, otherwise
1461 * the interrupt handler might think it is supposed to process
1462 * tx ints before we are up and running, which may cause a null
1463 * pointer access in the int handler.
1464 */
1465 ap->cur_rx = 0;
1466 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1468 wmb();
1469 ace_set_txprd(regs, ap, 0);
1470 writel(0, &regs->RxRetCsm);
1472 /*
1473 * Zero the stats before starting the interface
1474 */
1475 memset(&ap->stats, 0, sizeof(ap->stats));
1477 /*
1478 * Enable DMA engine now.
1479 * If we do this sooner, Mckinley box pukes.
1480 * I assume it's because Tigon II DMA engine wants to check
1481 * *something* even before the CPU is started.
1482 */
1483 writel(1, &regs->AssistState); /* enable DMA */
1485 /*
1486 * Start the NIC CPU
1487 */
1488 writel(readl(&regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), &regs->CpuCtrl);
1489 readl(&regs->CpuCtrl);
1491 /*
1492 * Wait for the firmware to spin up - max 3 seconds.
1493 */
1494 myjif = jiffies + 3 * HZ;
1495 while (time_before(jiffies, myjif) && !ap->fw_running)
1496 cpu_relax();
1498 if (!ap->fw_running) {
1499 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1501 ace_dump_trace(ap);
1502 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
1503 readl(&regs->CpuCtrl);
1505 /* aman@sgi.com - account for badly behaving firmware/NIC:
1506 * - have observed that the NIC may continue to generate
1507 * interrupts for some reason; attempt to stop it - halt
1508 * second CPU for Tigon II cards, and also clear Mb0
1509 * - if we're a module, we'll fail to load if this was
1510 * the only GbE card in the system => if the kernel does
1511 * see an interrupt from the NIC, code to handle it is
1512 * gone and OOps! - so free_irq also
1513 */
1514 if (ap->version >= 2)
1515 writel(readl(&regs->CpuBCtrl) | CPU_HALT,
1516 &regs->CpuBCtrl);
1517 writel(0, &regs->Mb0Lo);
1518 readl(&regs->Mb0Lo);
1520 ecode = -EBUSY;
1521 goto init_error;
1524 /*
1525 * We load the ring here as there seem to be no way to tell the
1526 * firmware to wipe the ring without re-initializing it.
1527 */
1528 if (!test_and_set_bit(0, &ap->std_refill_busy))
1529 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1530 else
1531 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1532 ap->name);
1533 if (ap->version >= 2) {
1534 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1535 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1536 else
1537 printk(KERN_ERR "%s: Someone is busy refilling "
1538 "the RX mini ring\n", ap->name);
1540 return 0;
1542 init_error:
1543 ace_init_cleanup(dev);
1544 return ecode;
1548 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1550 struct ace_private *ap = netdev_priv(dev);
1551 struct ace_regs __iomem *regs = ap->regs;
1552 int board_idx = ap->board_idx;
1554 if (board_idx >= 0) {
1555 if (!jumbo) {
1556 if (!tx_coal_tick[board_idx])
1557 writel(DEF_TX_COAL, &regs->TuneTxCoalTicks);
1558 if (!max_tx_desc[board_idx])
1559 writel(DEF_TX_MAX_DESC, &regs->TuneMaxTxDesc);
1560 if (!rx_coal_tick[board_idx])
1561 writel(DEF_RX_COAL, &regs->TuneRxCoalTicks);
1562 if (!max_rx_desc[board_idx])
1563 writel(DEF_RX_MAX_DESC, &regs->TuneMaxRxDesc);
1564 if (!tx_ratio[board_idx])
1565 writel(DEF_TX_RATIO, &regs->TxBufRat);
1566 } else {
1567 if (!tx_coal_tick[board_idx])
1568 writel(DEF_JUMBO_TX_COAL,
1569 &regs->TuneTxCoalTicks);
1570 if (!max_tx_desc[board_idx])
1571 writel(DEF_JUMBO_TX_MAX_DESC,
1572 &regs->TuneMaxTxDesc);
1573 if (!rx_coal_tick[board_idx])
1574 writel(DEF_JUMBO_RX_COAL,
1575 &regs->TuneRxCoalTicks);
1576 if (!max_rx_desc[board_idx])
1577 writel(DEF_JUMBO_RX_MAX_DESC,
1578 &regs->TuneMaxRxDesc);
1579 if (!tx_ratio[board_idx])
1580 writel(DEF_JUMBO_TX_RATIO, &regs->TxBufRat);
1586 static void ace_watchdog(struct net_device *data)
1588 struct net_device *dev = data;
1589 struct ace_private *ap = netdev_priv(dev);
1590 struct ace_regs __iomem *regs = ap->regs;
1592 /*
1593 * We haven't received a stats update event for more than 2.5
1594 * seconds and there is data in the transmit queue, thus we
1595 * asume the card is stuck.
1596 */
1597 if (*ap->tx_csm != ap->tx_ret_csm) {
1598 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1599 dev->name, (unsigned int)readl(&regs->HostCtrl));
1600 /* This can happen due to ieee flow control. */
1601 } else {
1602 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1603 dev->name);
1604 #if 0
1605 netif_wake_queue(dev);
1606 #endif
1611 static void ace_tasklet(unsigned long dev)
1613 struct ace_private *ap = netdev_priv((struct net_device *)dev);
1614 int cur_size;
1616 cur_size = atomic_read(&ap->cur_rx_bufs);
1617 if ((cur_size < RX_LOW_STD_THRES) &&
1618 !test_and_set_bit(0, &ap->std_refill_busy)) {
1619 #ifdef DEBUG
1620 printk("refilling buffers (current %i)\n", cur_size);
1621 #endif
1622 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1625 if (ap->version >= 2) {
1626 cur_size = atomic_read(&ap->cur_mini_bufs);
1627 if ((cur_size < RX_LOW_MINI_THRES) &&
1628 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1629 #ifdef DEBUG
1630 printk("refilling mini buffers (current %i)\n",
1631 cur_size);
1632 #endif
1633 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1637 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1638 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1639 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1640 #ifdef DEBUG
1641 printk("refilling jumbo buffers (current %i)\n", cur_size);
1642 #endif
1643 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1645 ap->tasklet_pending = 0;
1649 /*
1650 * Copy the contents of the NIC's trace buffer to kernel memory.
1651 */
1652 static void ace_dump_trace(struct ace_private *ap)
1654 #if 0
1655 if (!ap->trace_buf)
1656 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1657 return;
1658 #endif
1662 /*
1663 * Load the standard rx ring.
1665 * Loading rings is safe without holding the spin lock since this is
1666 * done only before the device is enabled, thus no interrupts are
1667 * generated and by the interrupt handler/tasklet handler.
1668 */
1669 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1671 struct ace_regs __iomem *regs = ap->regs;
1672 short i, idx;
1675 prefetchw(&ap->cur_rx_bufs);
1677 idx = ap->rx_std_skbprd;
1679 for (i = 0; i < nr_bufs; i++) {
1680 struct sk_buff *skb;
1681 struct rx_desc *rd;
1682 dma_addr_t mapping;
1684 skb = alloc_skb(ACE_STD_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1685 if (!skb)
1686 break;
1688 skb_reserve(skb, NET_IP_ALIGN);
1689 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1690 offset_in_page(skb->data),
1691 ACE_STD_BUFSIZE,
1692 PCI_DMA_FROMDEVICE);
1693 ap->skb->rx_std_skbuff[idx].skb = skb;
1694 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1695 mapping, mapping);
1697 rd = &ap->rx_std_ring[idx];
1698 set_aceaddr(&rd->addr, mapping);
1699 rd->size = ACE_STD_BUFSIZE;
1700 rd->idx = idx;
1701 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1704 if (!i)
1705 goto error_out;
1707 atomic_add(i, &ap->cur_rx_bufs);
1708 ap->rx_std_skbprd = idx;
1710 if (ACE_IS_TIGON_I(ap)) {
1711 struct cmd cmd;
1712 cmd.evt = C_SET_RX_PRD_IDX;
1713 cmd.code = 0;
1714 cmd.idx = ap->rx_std_skbprd;
1715 ace_issue_cmd(regs, &cmd);
1716 } else {
1717 writel(idx, &regs->RxStdPrd);
1718 wmb();
1721 out:
1722 clear_bit(0, &ap->std_refill_busy);
1723 return;
1725 error_out:
1726 printk(KERN_INFO "Out of memory when allocating "
1727 "standard receive buffers\n");
1728 goto out;
1732 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1734 struct ace_regs __iomem *regs = ap->regs;
1735 short i, idx;
1737 prefetchw(&ap->cur_mini_bufs);
1739 idx = ap->rx_mini_skbprd;
1740 for (i = 0; i < nr_bufs; i++) {
1741 struct sk_buff *skb;
1742 struct rx_desc *rd;
1743 dma_addr_t mapping;
1745 skb = alloc_skb(ACE_MINI_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1746 if (!skb)
1747 break;
1749 skb_reserve(skb, NET_IP_ALIGN);
1750 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1751 offset_in_page(skb->data),
1752 ACE_MINI_BUFSIZE,
1753 PCI_DMA_FROMDEVICE);
1754 ap->skb->rx_mini_skbuff[idx].skb = skb;
1755 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1756 mapping, mapping);
1758 rd = &ap->rx_mini_ring[idx];
1759 set_aceaddr(&rd->addr, mapping);
1760 rd->size = ACE_MINI_BUFSIZE;
1761 rd->idx = idx;
1762 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1765 if (!i)
1766 goto error_out;
1768 atomic_add(i, &ap->cur_mini_bufs);
1770 ap->rx_mini_skbprd = idx;
1772 writel(idx, &regs->RxMiniPrd);
1773 wmb();
1775 out:
1776 clear_bit(0, &ap->mini_refill_busy);
1777 return;
1778 error_out:
1779 printk(KERN_INFO "Out of memory when allocating "
1780 "mini receive buffers\n");
1781 goto out;
1785 /*
1786 * Load the jumbo rx ring, this may happen at any time if the MTU
1787 * is changed to a value > 1500.
1788 */
1789 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1791 struct ace_regs __iomem *regs = ap->regs;
1792 short i, idx;
1794 idx = ap->rx_jumbo_skbprd;
1796 for (i = 0; i < nr_bufs; i++) {
1797 struct sk_buff *skb;
1798 struct rx_desc *rd;
1799 dma_addr_t mapping;
1801 skb = alloc_skb(ACE_JUMBO_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1802 if (!skb)
1803 break;
1805 skb_reserve(skb, NET_IP_ALIGN);
1806 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1807 offset_in_page(skb->data),
1808 ACE_JUMBO_BUFSIZE,
1809 PCI_DMA_FROMDEVICE);
1810 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1811 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1812 mapping, mapping);
1814 rd = &ap->rx_jumbo_ring[idx];
1815 set_aceaddr(&rd->addr, mapping);
1816 rd->size = ACE_JUMBO_BUFSIZE;
1817 rd->idx = idx;
1818 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1821 if (!i)
1822 goto error_out;
1824 atomic_add(i, &ap->cur_jumbo_bufs);
1825 ap->rx_jumbo_skbprd = idx;
1827 if (ACE_IS_TIGON_I(ap)) {
1828 struct cmd cmd;
1829 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1830 cmd.code = 0;
1831 cmd.idx = ap->rx_jumbo_skbprd;
1832 ace_issue_cmd(regs, &cmd);
1833 } else {
1834 writel(idx, &regs->RxJumboPrd);
1835 wmb();
1838 out:
1839 clear_bit(0, &ap->jumbo_refill_busy);
1840 return;
1841 error_out:
1842 if (net_ratelimit())
1843 printk(KERN_INFO "Out of memory when allocating "
1844 "jumbo receive buffers\n");
1845 goto out;
1849 /*
1850 * All events are considered to be slow (RX/TX ints do not generate
1851 * events) and are handled here, outside the main interrupt handler,
1852 * to reduce the size of the handler.
1853 */
1854 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1856 struct ace_private *ap;
1858 ap = netdev_priv(dev);
1860 while (evtcsm != evtprd) {
1861 switch (ap->evt_ring[evtcsm].evt) {
1862 case E_FW_RUNNING:
1863 printk(KERN_INFO "%s: Firmware up and running\n",
1864 ap->name);
1865 ap->fw_running = 1;
1866 wmb();
1867 break;
1868 case E_STATS_UPDATED:
1869 break;
1870 case E_LNK_STATE:
1872 u16 code = ap->evt_ring[evtcsm].code;
1873 switch (code) {
1874 case E_C_LINK_UP:
1876 u32 state = readl(&ap->regs->GigLnkState);
1877 printk(KERN_WARNING "%s: Optical link UP "
1878 "(%s Duplex, Flow Control: %s%s)\n",
1879 ap->name,
1880 state & LNK_FULL_DUPLEX ? "Full":"Half",
1881 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1882 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1883 break;
1885 case E_C_LINK_DOWN:
1886 printk(KERN_WARNING "%s: Optical link DOWN\n",
1887 ap->name);
1888 break;
1889 case E_C_LINK_10_100:
1890 printk(KERN_WARNING "%s: 10/100BaseT link "
1891 "UP\n", ap->name);
1892 break;
1893 default:
1894 printk(KERN_ERR "%s: Unknown optical link "
1895 "state %02x\n", ap->name, code);
1897 break;
1899 case E_ERROR:
1900 switch(ap->evt_ring[evtcsm].code) {
1901 case E_C_ERR_INVAL_CMD:
1902 printk(KERN_ERR "%s: invalid command error\n",
1903 ap->name);
1904 break;
1905 case E_C_ERR_UNIMP_CMD:
1906 printk(KERN_ERR "%s: unimplemented command "
1907 "error\n", ap->name);
1908 break;
1909 case E_C_ERR_BAD_CFG:
1910 printk(KERN_ERR "%s: bad config error\n",
1911 ap->name);
1912 break;
1913 default:
1914 printk(KERN_ERR "%s: unknown error %02x\n",
1915 ap->name, ap->evt_ring[evtcsm].code);
1917 break;
1918 case E_RESET_JUMBO_RNG:
1920 int i;
1921 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1922 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1923 ap->rx_jumbo_ring[i].size = 0;
1924 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1925 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1926 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1930 if (ACE_IS_TIGON_I(ap)) {
1931 struct cmd cmd;
1932 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1933 cmd.code = 0;
1934 cmd.idx = 0;
1935 ace_issue_cmd(ap->regs, &cmd);
1936 } else {
1937 writel(0, &((ap->regs)->RxJumboPrd));
1938 wmb();
1941 ap->jumbo = 0;
1942 ap->rx_jumbo_skbprd = 0;
1943 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1944 ap->name);
1945 clear_bit(0, &ap->jumbo_refill_busy);
1946 break;
1948 default:
1949 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1950 ap->name, ap->evt_ring[evtcsm].evt);
1952 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1955 return evtcsm;
1959 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1961 struct ace_private *ap = netdev_priv(dev);
1962 u32 idx;
1963 int mini_count = 0, std_count = 0;
1965 idx = rxretcsm;
1967 prefetchw(&ap->cur_rx_bufs);
1968 prefetchw(&ap->cur_mini_bufs);
1970 while (idx != rxretprd) {
1971 struct ring_info *rip;
1972 struct sk_buff *skb;
1973 struct rx_desc *rxdesc, *retdesc;
1974 u32 skbidx;
1975 int bd_flags, desc_type, mapsize;
1976 u16 csum;
1979 /* make sure the rx descriptor isn't read before rxretprd */
1980 if (idx == rxretcsm)
1981 rmb();
1983 retdesc = &ap->rx_return_ring[idx];
1984 skbidx = retdesc->idx;
1985 bd_flags = retdesc->flags;
1986 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1988 switch(desc_type) {
1989 /*
1990 * Normal frames do not have any flags set
1992 * Mini and normal frames arrive frequently,
1993 * so use a local counter to avoid doing
1994 * atomic operations for each packet arriving.
1995 */
1996 case 0:
1997 rip = &ap->skb->rx_std_skbuff[skbidx];
1998 mapsize = ACE_STD_BUFSIZE;
1999 rxdesc = &ap->rx_std_ring[skbidx];
2000 std_count++;
2001 break;
2002 case BD_FLG_JUMBO:
2003 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
2004 mapsize = ACE_JUMBO_BUFSIZE;
2005 rxdesc = &ap->rx_jumbo_ring[skbidx];
2006 atomic_dec(&ap->cur_jumbo_bufs);
2007 break;
2008 case BD_FLG_MINI:
2009 rip = &ap->skb->rx_mini_skbuff[skbidx];
2010 mapsize = ACE_MINI_BUFSIZE;
2011 rxdesc = &ap->rx_mini_ring[skbidx];
2012 mini_count++;
2013 break;
2014 default:
2015 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2016 "returned by NIC\n", dev->name,
2017 retdesc->flags);
2018 goto error;
2021 skb = rip->skb;
2022 rip->skb = NULL;
2023 pci_unmap_page(ap->pdev,
2024 pci_unmap_addr(rip, mapping),
2025 mapsize,
2026 PCI_DMA_FROMDEVICE);
2027 skb_put(skb, retdesc->size);
2029 /*
2030 * Fly baby, fly!
2031 */
2032 csum = retdesc->tcp_udp_csum;
2034 skb->dev = dev;
2035 skb->protocol = eth_type_trans(skb, dev);
2037 /*
2038 * Instead of forcing the poor tigon mips cpu to calculate
2039 * pseudo hdr checksum, we do this ourselves.
2040 */
2041 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2042 skb->csum = htons(csum);
2043 skb->ip_summed = CHECKSUM_HW;
2044 } else {
2045 skb->ip_summed = CHECKSUM_NONE;
2048 /* send it up */
2049 #if ACENIC_DO_VLAN
2050 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2051 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2052 } else
2053 #endif
2054 netif_rx(skb);
2056 dev->last_rx = jiffies;
2057 ap->stats.rx_packets++;
2058 ap->stats.rx_bytes += retdesc->size;
2060 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2063 atomic_sub(std_count, &ap->cur_rx_bufs);
2064 if (!ACE_IS_TIGON_I(ap))
2065 atomic_sub(mini_count, &ap->cur_mini_bufs);
2067 out:
2068 /*
2069 * According to the documentation RxRetCsm is obsolete with
2070 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2071 */
2072 if (ACE_IS_TIGON_I(ap)) {
2073 writel(idx, &ap->regs->RxRetCsm);
2075 ap->cur_rx = idx;
2077 return;
2078 error:
2079 idx = rxretprd;
2080 goto out;
2084 static inline void ace_tx_int(struct net_device *dev,
2085 u32 txcsm, u32 idx)
2087 struct ace_private *ap = netdev_priv(dev);
2089 do {
2090 struct sk_buff *skb;
2091 dma_addr_t mapping;
2092 struct tx_ring_info *info;
2094 info = ap->skb->tx_skbuff + idx;
2095 skb = info->skb;
2096 mapping = pci_unmap_addr(info, mapping);
2098 if (mapping) {
2099 pci_unmap_page(ap->pdev, mapping,
2100 pci_unmap_len(info, maplen),
2101 PCI_DMA_TODEVICE);
2102 pci_unmap_addr_set(info, mapping, 0);
2105 if (skb) {
2106 ap->stats.tx_packets++;
2107 ap->stats.tx_bytes += skb->len;
2108 dev_kfree_skb_irq(skb);
2109 info->skb = NULL;
2112 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2113 } while (idx != txcsm);
2115 if (netif_queue_stopped(dev))
2116 netif_wake_queue(dev);
2118 wmb();
2119 ap->tx_ret_csm = txcsm;
2121 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2123 * We could try to make it before. In this case we would get
2124 * the following race condition: hard_start_xmit on other cpu
2125 * enters after we advanced tx_ret_csm and fills space,
2126 * which we have just freed, so that we make illegal device wakeup.
2127 * There is no good way to workaround this (at entry
2128 * to ace_start_xmit detects this condition and prevents
2129 * ring corruption, but it is not a good workaround.)
2131 * When tx_ret_csm is advanced after, we wake up device _only_
2132 * if we really have some space in ring (though the core doing
2133 * hard_start_xmit can see full ring for some period and has to
2134 * synchronize.) Superb.
2135 * BUT! We get another subtle race condition. hard_start_xmit
2136 * may think that ring is full between wakeup and advancing
2137 * tx_ret_csm and will stop device instantly! It is not so bad.
2138 * We are guaranteed that there is something in ring, so that
2139 * the next irq will resume transmission. To speedup this we could
2140 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2141 * (see ace_start_xmit).
2143 * Well, this dilemma exists in all lock-free devices.
2144 * We, following scheme used in drivers by Donald Becker,
2145 * select the least dangerous.
2146 * --ANK
2147 */
2151 static irqreturn_t ace_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2153 struct net_device *dev = (struct net_device *)dev_id;
2154 struct ace_private *ap = netdev_priv(dev);
2155 struct ace_regs __iomem *regs = ap->regs;
2156 u32 idx;
2157 u32 txcsm, rxretcsm, rxretprd;
2158 u32 evtcsm, evtprd;
2160 /*
2161 * In case of PCI shared interrupts or spurious interrupts,
2162 * we want to make sure it is actually our interrupt before
2163 * spending any time in here.
2164 */
2165 if (!(readl(&regs->HostCtrl) & IN_INT))
2166 return IRQ_NONE;
2168 /*
2169 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2170 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2171 * writel(0, &regs->Mb0Lo).
2173 * "IRQ avoidance" recommended in docs applies to IRQs served
2174 * threads and it is wrong even for that case.
2175 */
2176 writel(0, &regs->Mb0Lo);
2177 readl(&regs->Mb0Lo);
2179 /*
2180 * There is no conflict between transmit handling in
2181 * start_xmit and receive processing, thus there is no reason
2182 * to take a spin lock for RX handling. Wait until we start
2183 * working on the other stuff - hey we don't need a spin lock
2184 * anymore.
2185 */
2186 rxretprd = *ap->rx_ret_prd;
2187 rxretcsm = ap->cur_rx;
2189 if (rxretprd != rxretcsm)
2190 ace_rx_int(dev, rxretprd, rxretcsm);
2192 txcsm = *ap->tx_csm;
2193 idx = ap->tx_ret_csm;
2195 if (txcsm != idx) {
2196 /*
2197 * If each skb takes only one descriptor this check degenerates
2198 * to identity, because new space has just been opened.
2199 * But if skbs are fragmented we must check that this index
2200 * update releases enough of space, otherwise we just
2201 * wait for device to make more work.
2202 */
2203 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2204 ace_tx_int(dev, txcsm, idx);
2207 evtcsm = readl(&regs->EvtCsm);
2208 evtprd = *ap->evt_prd;
2210 if (evtcsm != evtprd) {
2211 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2212 writel(evtcsm, &regs->EvtCsm);
2215 /*
2216 * This has to go last in the interrupt handler and run with
2217 * the spin lock released ... what lock?
2218 */
2219 if (netif_running(dev)) {
2220 int cur_size;
2221 int run_tasklet = 0;
2223 cur_size = atomic_read(&ap->cur_rx_bufs);
2224 if (cur_size < RX_LOW_STD_THRES) {
2225 if ((cur_size < RX_PANIC_STD_THRES) &&
2226 !test_and_set_bit(0, &ap->std_refill_busy)) {
2227 #ifdef DEBUG
2228 printk("low on std buffers %i\n", cur_size);
2229 #endif
2230 ace_load_std_rx_ring(ap,
2231 RX_RING_SIZE - cur_size);
2232 } else
2233 run_tasklet = 1;
2236 if (!ACE_IS_TIGON_I(ap)) {
2237 cur_size = atomic_read(&ap->cur_mini_bufs);
2238 if (cur_size < RX_LOW_MINI_THRES) {
2239 if ((cur_size < RX_PANIC_MINI_THRES) &&
2240 !test_and_set_bit(0,
2241 &ap->mini_refill_busy)) {
2242 #ifdef DEBUG
2243 printk("low on mini buffers %i\n",
2244 cur_size);
2245 #endif
2246 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2247 } else
2248 run_tasklet = 1;
2252 if (ap->jumbo) {
2253 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2254 if (cur_size < RX_LOW_JUMBO_THRES) {
2255 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2256 !test_and_set_bit(0,
2257 &ap->jumbo_refill_busy)){
2258 #ifdef DEBUG
2259 printk("low on jumbo buffers %i\n",
2260 cur_size);
2261 #endif
2262 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2263 } else
2264 run_tasklet = 1;
2267 if (run_tasklet && !ap->tasklet_pending) {
2268 ap->tasklet_pending = 1;
2269 tasklet_schedule(&ap->ace_tasklet);
2273 return IRQ_HANDLED;
2277 #if ACENIC_DO_VLAN
2278 static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2280 struct ace_private *ap = netdev_priv(dev);
2281 unsigned long flags;
2283 local_irq_save(flags);
2284 ace_mask_irq(dev);
2286 ap->vlgrp = grp;
2288 ace_unmask_irq(dev);
2289 local_irq_restore(flags);
2293 static void ace_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
2295 struct ace_private *ap = netdev_priv(dev);
2296 unsigned long flags;
2298 local_irq_save(flags);
2299 ace_mask_irq(dev);
2301 if (ap->vlgrp)
2302 ap->vlgrp->vlan_devices[vid] = NULL;
2304 ace_unmask_irq(dev);
2305 local_irq_restore(flags);
2307 #endif /* ACENIC_DO_VLAN */
2310 static int ace_open(struct net_device *dev)
2312 struct ace_private *ap = netdev_priv(dev);
2313 struct ace_regs __iomem *regs = ap->regs;
2314 struct cmd cmd;
2316 if (!(ap->fw_running)) {
2317 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2318 return -EBUSY;
2321 writel(dev->mtu + ETH_HLEN + 4, &regs->IfMtu);
2323 cmd.evt = C_CLEAR_STATS;
2324 cmd.code = 0;
2325 cmd.idx = 0;
2326 ace_issue_cmd(regs, &cmd);
2328 cmd.evt = C_HOST_STATE;
2329 cmd.code = C_C_STACK_UP;
2330 cmd.idx = 0;
2331 ace_issue_cmd(regs, &cmd);
2333 if (ap->jumbo &&
2334 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2335 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2337 if (dev->flags & IFF_PROMISC) {
2338 cmd.evt = C_SET_PROMISC_MODE;
2339 cmd.code = C_C_PROMISC_ENABLE;
2340 cmd.idx = 0;
2341 ace_issue_cmd(regs, &cmd);
2343 ap->promisc = 1;
2344 }else
2345 ap->promisc = 0;
2346 ap->mcast_all = 0;
2348 #if 0
2349 cmd.evt = C_LNK_NEGOTIATION;
2350 cmd.code = 0;
2351 cmd.idx = 0;
2352 ace_issue_cmd(regs, &cmd);
2353 #endif
2355 netif_start_queue(dev);
2357 /*
2358 * Setup the bottom half rx ring refill handler
2359 */
2360 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2361 return 0;
2365 static int ace_close(struct net_device *dev)
2367 struct ace_private *ap = netdev_priv(dev);
2368 struct ace_regs __iomem *regs = ap->regs;
2369 struct cmd cmd;
2370 unsigned long flags;
2371 short i;
2373 /*
2374 * Without (or before) releasing irq and stopping hardware, this
2375 * is an absolute non-sense, by the way. It will be reset instantly
2376 * by the first irq.
2377 */
2378 netif_stop_queue(dev);
2381 if (ap->promisc) {
2382 cmd.evt = C_SET_PROMISC_MODE;
2383 cmd.code = C_C_PROMISC_DISABLE;
2384 cmd.idx = 0;
2385 ace_issue_cmd(regs, &cmd);
2386 ap->promisc = 0;
2389 cmd.evt = C_HOST_STATE;
2390 cmd.code = C_C_STACK_DOWN;
2391 cmd.idx = 0;
2392 ace_issue_cmd(regs, &cmd);
2394 tasklet_kill(&ap->ace_tasklet);
2396 /*
2397 * Make sure one CPU is not processing packets while
2398 * buffers are being released by another.
2399 */
2401 local_irq_save(flags);
2402 ace_mask_irq(dev);
2404 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2405 struct sk_buff *skb;
2406 dma_addr_t mapping;
2407 struct tx_ring_info *info;
2409 info = ap->skb->tx_skbuff + i;
2410 skb = info->skb;
2411 mapping = pci_unmap_addr(info, mapping);
2413 if (mapping) {
2414 if (ACE_IS_TIGON_I(ap)) {
2415 struct tx_desc __iomem *tx
2416 = (struct tx_desc __iomem *) &ap->tx_ring[i];
2417 writel(0, &tx->addr.addrhi);
2418 writel(0, &tx->addr.addrlo);
2419 writel(0, &tx->flagsize);
2420 } else
2421 memset(ap->tx_ring + i, 0,
2422 sizeof(struct tx_desc));
2423 pci_unmap_page(ap->pdev, mapping,
2424 pci_unmap_len(info, maplen),
2425 PCI_DMA_TODEVICE);
2426 pci_unmap_addr_set(info, mapping, 0);
2428 if (skb) {
2429 dev_kfree_skb(skb);
2430 info->skb = NULL;
2434 if (ap->jumbo) {
2435 cmd.evt = C_RESET_JUMBO_RNG;
2436 cmd.code = 0;
2437 cmd.idx = 0;
2438 ace_issue_cmd(regs, &cmd);
2441 ace_unmask_irq(dev);
2442 local_irq_restore(flags);
2444 return 0;
2448 static inline dma_addr_t
2449 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2450 struct sk_buff *tail, u32 idx)
2452 dma_addr_t mapping;
2453 struct tx_ring_info *info;
2455 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2456 offset_in_page(skb->data),
2457 skb->len, PCI_DMA_TODEVICE);
2459 info = ap->skb->tx_skbuff + idx;
2460 info->skb = tail;
2461 pci_unmap_addr_set(info, mapping, mapping);
2462 pci_unmap_len_set(info, maplen, skb->len);
2463 return mapping;
2467 static inline void
2468 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2469 u32 flagsize, u32 vlan_tag)
2471 #if !USE_TX_COAL_NOW
2472 flagsize &= ~BD_FLG_COAL_NOW;
2473 #endif
2475 if (ACE_IS_TIGON_I(ap)) {
2476 struct tx_desc __iomem *io = (struct tx_desc __iomem *) desc;
2477 writel(addr >> 32, &io->addr.addrhi);
2478 writel(addr & 0xffffffff, &io->addr.addrlo);
2479 writel(flagsize, &io->flagsize);
2480 #if ACENIC_DO_VLAN
2481 writel(vlan_tag, &io->vlanres);
2482 #endif
2483 } else {
2484 desc->addr.addrhi = addr >> 32;
2485 desc->addr.addrlo = addr;
2486 desc->flagsize = flagsize;
2487 #if ACENIC_DO_VLAN
2488 desc->vlanres = vlan_tag;
2489 #endif
2494 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2496 struct ace_private *ap = netdev_priv(dev);
2497 struct ace_regs __iomem *regs = ap->regs;
2498 struct tx_desc *desc;
2499 u32 idx, flagsize;
2500 unsigned long maxjiff = jiffies + 3*HZ;
2502 restart:
2503 idx = ap->tx_prd;
2505 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2506 goto overflow;
2508 if (!skb_shinfo(skb)->nr_frags) {
2509 dma_addr_t mapping;
2510 u32 vlan_tag = 0;
2512 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2513 flagsize = (skb->len << 16) | (BD_FLG_END);
2514 if (skb->ip_summed == CHECKSUM_HW)
2515 flagsize |= BD_FLG_TCP_UDP_SUM;
2516 #if ACENIC_DO_VLAN
2517 if (vlan_tx_tag_present(skb)) {
2518 flagsize |= BD_FLG_VLAN_TAG;
2519 vlan_tag = vlan_tx_tag_get(skb);
2521 #endif
2522 desc = ap->tx_ring + idx;
2523 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2525 /* Look at ace_tx_int for explanations. */
2526 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2527 flagsize |= BD_FLG_COAL_NOW;
2529 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2530 } else {
2531 dma_addr_t mapping;
2532 u32 vlan_tag = 0;
2533 int i, len = 0;
2535 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2536 flagsize = (skb_headlen(skb) << 16);
2537 if (skb->ip_summed == CHECKSUM_HW)
2538 flagsize |= BD_FLG_TCP_UDP_SUM;
2539 #if ACENIC_DO_VLAN
2540 if (vlan_tx_tag_present(skb)) {
2541 flagsize |= BD_FLG_VLAN_TAG;
2542 vlan_tag = vlan_tx_tag_get(skb);
2544 #endif
2546 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2548 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2550 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2551 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2552 struct tx_ring_info *info;
2554 len += frag->size;
2555 info = ap->skb->tx_skbuff + idx;
2556 desc = ap->tx_ring + idx;
2558 mapping = pci_map_page(ap->pdev, frag->page,
2559 frag->page_offset, frag->size,
2560 PCI_DMA_TODEVICE);
2562 flagsize = (frag->size << 16);
2563 if (skb->ip_summed == CHECKSUM_HW)
2564 flagsize |= BD_FLG_TCP_UDP_SUM;
2565 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2567 if (i == skb_shinfo(skb)->nr_frags - 1) {
2568 flagsize |= BD_FLG_END;
2569 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2570 flagsize |= BD_FLG_COAL_NOW;
2572 /*
2573 * Only the last fragment frees
2574 * the skb!
2575 */
2576 info->skb = skb;
2577 } else {
2578 info->skb = NULL;
2580 pci_unmap_addr_set(info, mapping, mapping);
2581 pci_unmap_len_set(info, maplen, frag->size);
2582 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2586 wmb();
2587 ap->tx_prd = idx;
2588 ace_set_txprd(regs, ap, idx);
2590 if (flagsize & BD_FLG_COAL_NOW) {
2591 netif_stop_queue(dev);
2593 /*
2594 * A TX-descriptor producer (an IRQ) might have gotten
2595 * inbetween, making the ring free again. Since xmit is
2596 * serialized, this is the only situation we have to
2597 * re-test.
2598 */
2599 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2600 netif_wake_queue(dev);
2603 dev->trans_start = jiffies;
2604 return NETDEV_TX_OK;
2606 overflow:
2607 /*
2608 * This race condition is unavoidable with lock-free drivers.
2609 * We wake up the queue _before_ tx_prd is advanced, so that we can
2610 * enter hard_start_xmit too early, while tx ring still looks closed.
2611 * This happens ~1-4 times per 100000 packets, so that we can allow
2612 * to loop syncing to other CPU. Probably, we need an additional
2613 * wmb() in ace_tx_intr as well.
2615 * Note that this race is relieved by reserving one more entry
2616 * in tx ring than it is necessary (see original non-SG driver).
2617 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2618 * is already overkill.
2620 * Alternative is to return with 1 not throttling queue. In this
2621 * case loop becomes longer, no more useful effects.
2622 */
2623 if (time_before(jiffies, maxjiff)) {
2624 barrier();
2625 cpu_relax();
2626 goto restart;
2629 /* The ring is stuck full. */
2630 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2631 return NETDEV_TX_BUSY;
2635 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2637 struct ace_private *ap = netdev_priv(dev);
2638 struct ace_regs __iomem *regs = ap->regs;
2640 if (new_mtu > ACE_JUMBO_MTU)
2641 return -EINVAL;
2643 writel(new_mtu + ETH_HLEN + 4, &regs->IfMtu);
2644 dev->mtu = new_mtu;
2646 if (new_mtu > ACE_STD_MTU) {
2647 if (!(ap->jumbo)) {
2648 printk(KERN_INFO "%s: Enabling Jumbo frame "
2649 "support\n", dev->name);
2650 ap->jumbo = 1;
2651 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2652 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2653 ace_set_rxtx_parms(dev, 1);
2655 } else {
2656 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2657 ace_sync_irq(dev->irq);
2658 ace_set_rxtx_parms(dev, 0);
2659 if (ap->jumbo) {
2660 struct cmd cmd;
2662 cmd.evt = C_RESET_JUMBO_RNG;
2663 cmd.code = 0;
2664 cmd.idx = 0;
2665 ace_issue_cmd(regs, &cmd);
2669 return 0;
2672 static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2674 struct ace_private *ap = netdev_priv(dev);
2675 struct ace_regs __iomem *regs = ap->regs;
2676 u32 link;
2678 memset(ecmd, 0, sizeof(struct ethtool_cmd));
2679 ecmd->supported =
2680 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2681 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2682 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2683 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2685 ecmd->port = PORT_FIBRE;
2686 ecmd->transceiver = XCVR_INTERNAL;
2688 link = readl(&regs->GigLnkState);
2689 if (link & LNK_1000MB)
2690 ecmd->speed = SPEED_1000;
2691 else {
2692 link = readl(&regs->FastLnkState);
2693 if (link & LNK_100MB)
2694 ecmd->speed = SPEED_100;
2695 else if (link & LNK_10MB)
2696 ecmd->speed = SPEED_10;
2697 else
2698 ecmd->speed = 0;
2700 if (link & LNK_FULL_DUPLEX)
2701 ecmd->duplex = DUPLEX_FULL;
2702 else
2703 ecmd->duplex = DUPLEX_HALF;
2705 if (link & LNK_NEGOTIATE)
2706 ecmd->autoneg = AUTONEG_ENABLE;
2707 else
2708 ecmd->autoneg = AUTONEG_DISABLE;
2710 #if 0
2711 /*
2712 * Current struct ethtool_cmd is insufficient
2713 */
2714 ecmd->trace = readl(&regs->TuneTrace);
2716 ecmd->txcoal = readl(&regs->TuneTxCoalTicks);
2717 ecmd->rxcoal = readl(&regs->TuneRxCoalTicks);
2718 #endif
2719 ecmd->maxtxpkt = readl(&regs->TuneMaxTxDesc);
2720 ecmd->maxrxpkt = readl(&regs->TuneMaxRxDesc);
2722 return 0;
2725 static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2727 struct ace_private *ap = netdev_priv(dev);
2728 struct ace_regs __iomem *regs = ap->regs;
2729 u32 link, speed;
2731 link = readl(&regs->GigLnkState);
2732 if (link & LNK_1000MB)
2733 speed = SPEED_1000;
2734 else {
2735 link = readl(&regs->FastLnkState);
2736 if (link & LNK_100MB)
2737 speed = SPEED_100;
2738 else if (link & LNK_10MB)
2739 speed = SPEED_10;
2740 else
2741 speed = SPEED_100;
2744 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2745 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2746 if (!ACE_IS_TIGON_I(ap))
2747 link |= LNK_TX_FLOW_CTL_Y;
2748 if (ecmd->autoneg == AUTONEG_ENABLE)
2749 link |= LNK_NEGOTIATE;
2750 if (ecmd->speed != speed) {
2751 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2752 switch (speed) {
2753 case SPEED_1000:
2754 link |= LNK_1000MB;
2755 break;
2756 case SPEED_100:
2757 link |= LNK_100MB;
2758 break;
2759 case SPEED_10:
2760 link |= LNK_10MB;
2761 break;
2765 if (ecmd->duplex == DUPLEX_FULL)
2766 link |= LNK_FULL_DUPLEX;
2768 if (link != ap->link) {
2769 struct cmd cmd;
2770 printk(KERN_INFO "%s: Renegotiating link state\n",
2771 dev->name);
2773 ap->link = link;
2774 writel(link, &regs->TuneLink);
2775 if (!ACE_IS_TIGON_I(ap))
2776 writel(link, &regs->TuneFastLink);
2777 wmb();
2779 cmd.evt = C_LNK_NEGOTIATION;
2780 cmd.code = 0;
2781 cmd.idx = 0;
2782 ace_issue_cmd(regs, &cmd);
2784 return 0;
2787 static void ace_get_drvinfo(struct net_device *dev,
2788 struct ethtool_drvinfo *info)
2790 struct ace_private *ap = netdev_priv(dev);
2792 strlcpy(info->driver, "acenic", sizeof(info->driver));
2793 snprintf(info->version, sizeof(info->version), "%i.%i.%i",
2794 tigonFwReleaseMajor, tigonFwReleaseMinor,
2795 tigonFwReleaseFix);
2797 if (ap->pdev)
2798 strlcpy(info->bus_info, pci_name(ap->pdev),
2799 sizeof(info->bus_info));
2803 /*
2804 * Set the hardware MAC address.
2805 */
2806 static int ace_set_mac_addr(struct net_device *dev, void *p)
2808 struct ace_private *ap = netdev_priv(dev);
2809 struct ace_regs __iomem *regs = ap->regs;
2810 struct sockaddr *addr=p;
2811 u8 *da;
2812 struct cmd cmd;
2814 if(netif_running(dev))
2815 return -EBUSY;
2817 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2819 da = (u8 *)dev->dev_addr;
2821 writel(da[0] << 8 | da[1], &regs->MacAddrHi);
2822 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2823 &regs->MacAddrLo);
2825 cmd.evt = C_SET_MAC_ADDR;
2826 cmd.code = 0;
2827 cmd.idx = 0;
2828 ace_issue_cmd(regs, &cmd);
2830 return 0;
2834 static void ace_set_multicast_list(struct net_device *dev)
2836 struct ace_private *ap = netdev_priv(dev);
2837 struct ace_regs __iomem *regs = ap->regs;
2838 struct cmd cmd;
2840 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2841 cmd.evt = C_SET_MULTICAST_MODE;
2842 cmd.code = C_C_MCAST_ENABLE;
2843 cmd.idx = 0;
2844 ace_issue_cmd(regs, &cmd);
2845 ap->mcast_all = 1;
2846 } else if (ap->mcast_all) {
2847 cmd.evt = C_SET_MULTICAST_MODE;
2848 cmd.code = C_C_MCAST_DISABLE;
2849 cmd.idx = 0;
2850 ace_issue_cmd(regs, &cmd);
2851 ap->mcast_all = 0;
2854 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2855 cmd.evt = C_SET_PROMISC_MODE;
2856 cmd.code = C_C_PROMISC_ENABLE;
2857 cmd.idx = 0;
2858 ace_issue_cmd(regs, &cmd);
2859 ap->promisc = 1;
2860 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2861 cmd.evt = C_SET_PROMISC_MODE;
2862 cmd.code = C_C_PROMISC_DISABLE;
2863 cmd.idx = 0;
2864 ace_issue_cmd(regs, &cmd);
2865 ap->promisc = 0;
2868 /*
2869 * For the time being multicast relies on the upper layers
2870 * filtering it properly. The Firmware does not allow one to
2871 * set the entire multicast list at a time and keeping track of
2872 * it here is going to be messy.
2873 */
2874 if ((dev->mc_count) && !(ap->mcast_all)) {
2875 cmd.evt = C_SET_MULTICAST_MODE;
2876 cmd.code = C_C_MCAST_ENABLE;
2877 cmd.idx = 0;
2878 ace_issue_cmd(regs, &cmd);
2879 }else if (!ap->mcast_all) {
2880 cmd.evt = C_SET_MULTICAST_MODE;
2881 cmd.code = C_C_MCAST_DISABLE;
2882 cmd.idx = 0;
2883 ace_issue_cmd(regs, &cmd);
2888 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2890 struct ace_private *ap = netdev_priv(dev);
2891 struct ace_mac_stats __iomem *mac_stats =
2892 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2894 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2895 ap->stats.multicast = readl(&mac_stats->kept_mc);
2896 ap->stats.collisions = readl(&mac_stats->coll);
2898 return &ap->stats;
2902 static void __devinit ace_copy(struct ace_regs __iomem *regs, void *src,
2903 u32 dest, int size)
2905 void __iomem *tdest;
2906 u32 *wsrc;
2907 short tsize, i;
2909 if (size <= 0)
2910 return;
2912 while (size > 0) {
2913 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2914 min_t(u32, size, ACE_WINDOW_SIZE));
2915 tdest = (void __iomem *) &regs->Window +
2916 (dest & (ACE_WINDOW_SIZE - 1));
2917 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2918 /*
2919 * This requires byte swapping on big endian, however
2920 * writel does that for us
2921 */
2922 wsrc = src;
2923 for (i = 0; i < (tsize / 4); i++) {
2924 writel(wsrc[i], tdest + i*4);
2926 dest += tsize;
2927 src += tsize;
2928 size -= tsize;
2931 return;
2935 static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2937 void __iomem *tdest;
2938 short tsize = 0, i;
2940 if (size <= 0)
2941 return;
2943 while (size > 0) {
2944 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2945 min_t(u32, size, ACE_WINDOW_SIZE));
2946 tdest = (void __iomem *) &regs->Window +
2947 (dest & (ACE_WINDOW_SIZE - 1));
2948 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2950 for (i = 0; i < (tsize / 4); i++) {
2951 writel(0, tdest + i*4);
2954 dest += tsize;
2955 size -= tsize;
2958 return;
2962 /*
2963 * Download the firmware into the SRAM on the NIC
2965 * This operation requires the NIC to be halted and is performed with
2966 * interrupts disabled and with the spinlock hold.
2967 */
2968 int __devinit ace_load_firmware(struct net_device *dev)
2970 struct ace_private *ap = netdev_priv(dev);
2971 struct ace_regs __iomem *regs = ap->regs;
2973 if (!(readl(&regs->CpuCtrl) & CPU_HALTED)) {
2974 printk(KERN_ERR "%s: trying to download firmware while the "
2975 "CPU is running!\n", ap->name);
2976 return -EFAULT;
2979 /*
2980 * Do not try to clear more than 512KB or we end up seeing
2981 * funny things on NICs with only 512KB SRAM
2982 */
2983 ace_clear(regs, 0x2000, 0x80000-0x2000);
2984 if (ACE_IS_TIGON_I(ap)) {
2985 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
2986 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
2987 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
2988 tigonFwRodataLen);
2989 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
2990 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
2991 }else if (ap->version == 2) {
2992 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
2993 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
2994 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
2995 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
2996 tigon2FwRodataLen);
2997 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
3000 return 0;
3004 /*
3005 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3007 * Accessing the EEPROM is `interesting' to say the least - don't read
3008 * this code right after dinner.
3010 * This is all about black magic and bit-banging the device .... I
3011 * wonder in what hospital they have put the guy who designed the i2c
3012 * specs.
3014 * Oh yes, this is only the beginning!
3016 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3017 * code i2c readout code by beta testing all my hacks.
3018 */
3019 static void __devinit eeprom_start(struct ace_regs __iomem *regs)
3021 u32 local;
3023 readl(&regs->LocalCtrl);
3024 udelay(ACE_SHORT_DELAY);
3025 local = readl(&regs->LocalCtrl);
3026 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3027 writel(local, &regs->LocalCtrl);
3028 readl(&regs->LocalCtrl);
3029 mb();
3030 udelay(ACE_SHORT_DELAY);
3031 local |= EEPROM_CLK_OUT;
3032 writel(local, &regs->LocalCtrl);
3033 readl(&regs->LocalCtrl);
3034 mb();
3035 udelay(ACE_SHORT_DELAY);
3036 local &= ~EEPROM_DATA_OUT;
3037 writel(local, &regs->LocalCtrl);
3038 readl(&regs->LocalCtrl);
3039 mb();
3040 udelay(ACE_SHORT_DELAY);
3041 local &= ~EEPROM_CLK_OUT;
3042 writel(local, &regs->LocalCtrl);
3043 readl(&regs->LocalCtrl);
3044 mb();
3048 static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3050 short i;
3051 u32 local;
3053 udelay(ACE_SHORT_DELAY);
3054 local = readl(&regs->LocalCtrl);
3055 local &= ~EEPROM_DATA_OUT;
3056 local |= EEPROM_WRITE_ENABLE;
3057 writel(local, &regs->LocalCtrl);
3058 readl(&regs->LocalCtrl);
3059 mb();
3061 for (i = 0; i < 8; i++, magic <<= 1) {
3062 udelay(ACE_SHORT_DELAY);
3063 if (magic & 0x80)
3064 local |= EEPROM_DATA_OUT;
3065 else
3066 local &= ~EEPROM_DATA_OUT;
3067 writel(local, &regs->LocalCtrl);
3068 readl(&regs->LocalCtrl);
3069 mb();
3071 udelay(ACE_SHORT_DELAY);
3072 local |= EEPROM_CLK_OUT;
3073 writel(local, &regs->LocalCtrl);
3074 readl(&regs->LocalCtrl);
3075 mb();
3076 udelay(ACE_SHORT_DELAY);
3077 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3078 writel(local, &regs->LocalCtrl);
3079 readl(&regs->LocalCtrl);
3080 mb();
3085 static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3087 int state;
3088 u32 local;
3090 local = readl(&regs->LocalCtrl);
3091 local &= ~EEPROM_WRITE_ENABLE;
3092 writel(local, &regs->LocalCtrl);
3093 readl(&regs->LocalCtrl);
3094 mb();
3095 udelay(ACE_LONG_DELAY);
3096 local |= EEPROM_CLK_OUT;
3097 writel(local, &regs->LocalCtrl);
3098 readl(&regs->LocalCtrl);
3099 mb();
3100 udelay(ACE_SHORT_DELAY);
3101 /* sample data in middle of high clk */
3102 state = (readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0;
3103 udelay(ACE_SHORT_DELAY);
3104 mb();
3105 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3106 readl(&regs->LocalCtrl);
3107 mb();
3109 return state;
3113 static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3115 u32 local;
3117 udelay(ACE_SHORT_DELAY);
3118 local = readl(&regs->LocalCtrl);
3119 local |= EEPROM_WRITE_ENABLE;
3120 writel(local, &regs->LocalCtrl);
3121 readl(&regs->LocalCtrl);
3122 mb();
3123 udelay(ACE_SHORT_DELAY);
3124 local &= ~EEPROM_DATA_OUT;
3125 writel(local, &regs->LocalCtrl);
3126 readl(&regs->LocalCtrl);
3127 mb();
3128 udelay(ACE_SHORT_DELAY);
3129 local |= EEPROM_CLK_OUT;
3130 writel(local, &regs->LocalCtrl);
3131 readl(&regs->LocalCtrl);
3132 mb();
3133 udelay(ACE_SHORT_DELAY);
3134 local |= EEPROM_DATA_OUT;
3135 writel(local, &regs->LocalCtrl);
3136 readl(&regs->LocalCtrl);
3137 mb();
3138 udelay(ACE_LONG_DELAY);
3139 local &= ~EEPROM_CLK_OUT;
3140 writel(local, &regs->LocalCtrl);
3141 mb();
3145 /*
3146 * Read a whole byte from the EEPROM.
3147 */
3148 static int __devinit read_eeprom_byte(struct net_device *dev,
3149 unsigned long offset)
3151 struct ace_private *ap = netdev_priv(dev);
3152 struct ace_regs __iomem *regs = ap->regs;
3153 unsigned long flags;
3154 u32 local;
3155 int result = 0;
3156 short i;
3158 if (!dev) {
3159 printk(KERN_ERR "No device!\n");
3160 result = -ENODEV;
3161 goto out;
3164 /*
3165 * Don't take interrupts on this CPU will bit banging
3166 * the %#%#@$ I2C device
3167 */
3168 local_irq_save(flags);
3170 eeprom_start(regs);
3172 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3173 if (eeprom_check_ack(regs)) {
3174 local_irq_restore(flags);
3175 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3176 result = -EIO;
3177 goto eeprom_read_error;
3180 eeprom_prep(regs, (offset >> 8) & 0xff);
3181 if (eeprom_check_ack(regs)) {
3182 local_irq_restore(flags);
3183 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3184 ap->name);
3185 result = -EIO;
3186 goto eeprom_read_error;
3189 eeprom_prep(regs, offset & 0xff);
3190 if (eeprom_check_ack(regs)) {
3191 local_irq_restore(flags);
3192 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3193 ap->name);
3194 result = -EIO;
3195 goto eeprom_read_error;
3198 eeprom_start(regs);
3199 eeprom_prep(regs, EEPROM_READ_SELECT);
3200 if (eeprom_check_ack(regs)) {
3201 local_irq_restore(flags);
3202 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3203 ap->name);
3204 result = -EIO;
3205 goto eeprom_read_error;
3208 for (i = 0; i < 8; i++) {
3209 local = readl(&regs->LocalCtrl);
3210 local &= ~EEPROM_WRITE_ENABLE;
3211 writel(local, &regs->LocalCtrl);
3212 readl(&regs->LocalCtrl);
3213 udelay(ACE_LONG_DELAY);
3214 mb();
3215 local |= EEPROM_CLK_OUT;
3216 writel(local, &regs->LocalCtrl);
3217 readl(&regs->LocalCtrl);
3218 mb();
3219 udelay(ACE_SHORT_DELAY);
3220 /* sample data mid high clk */
3221 result = (result << 1) |
3222 ((readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0);
3223 udelay(ACE_SHORT_DELAY);
3224 mb();
3225 local = readl(&regs->LocalCtrl);
3226 local &= ~EEPROM_CLK_OUT;
3227 writel(local, &regs->LocalCtrl);
3228 readl(&regs->LocalCtrl);
3229 udelay(ACE_SHORT_DELAY);
3230 mb();
3231 if (i == 7) {
3232 local |= EEPROM_WRITE_ENABLE;
3233 writel(local, &regs->LocalCtrl);
3234 readl(&regs->LocalCtrl);
3235 mb();
3236 udelay(ACE_SHORT_DELAY);
3240 local |= EEPROM_DATA_OUT;
3241 writel(local, &regs->LocalCtrl);
3242 readl(&regs->LocalCtrl);
3243 mb();
3244 udelay(ACE_SHORT_DELAY);
3245 writel(readl(&regs->LocalCtrl) | EEPROM_CLK_OUT, &regs->LocalCtrl);
3246 readl(&regs->LocalCtrl);
3247 udelay(ACE_LONG_DELAY);
3248 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3249 readl(&regs->LocalCtrl);
3250 mb();
3251 udelay(ACE_SHORT_DELAY);
3252 eeprom_stop(regs);
3254 local_irq_restore(flags);
3255 out:
3256 return result;
3258 eeprom_read_error:
3259 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3260 ap->name, offset);
3261 goto out;
3265 /*
3266 * Local variables:
3267 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"
3268 * End:
3269 */