ia64/linux-2.6.18-xen.hg

view drivers/net/3c527.h @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * 3COM "EtherLink MC/32" Descriptions
3 */
5 /*
6 * Registers
7 */
9 #define HOST_CMD 0
10 #define HOST_CMD_START_RX (1<<3)
11 #define HOST_CMD_SUSPND_RX (3<<3)
12 #define HOST_CMD_RESTRT_RX (5<<3)
14 #define HOST_CMD_SUSPND_TX 3
15 #define HOST_CMD_RESTRT_TX 5
18 #define HOST_STATUS 2
19 #define HOST_STATUS_CRR (1<<6)
20 #define HOST_STATUS_CWR (1<<5)
23 #define HOST_CTRL 6
24 #define HOST_CTRL_ATTN (1<<7)
25 #define HOST_CTRL_RESET (1<<6)
26 #define HOST_CTRL_INTE (1<<2)
28 #define HOST_RAMPAGE 8
30 #define HALTED 0
31 #define RUNNING 1
33 struct mc32_mailbox
34 {
35 u16 mbox;
36 u16 data[1];
37 } __attribute((packed));
39 struct skb_header
40 {
41 u8 status;
42 u8 control;
43 u16 next; /* Do not change! */
44 u16 length;
45 u32 data;
46 } __attribute((packed));
48 struct mc32_stats
49 {
50 /* RX Errors */
51 u32 rx_crc_errors;
52 u32 rx_alignment_errors;
53 u32 rx_overrun_errors;
54 u32 rx_tooshort_errors;
55 u32 rx_toolong_errors;
56 u32 rx_outofresource_errors;
58 u32 rx_discarded; /* via card pattern match filter */
60 /* TX Errors */
61 u32 tx_max_collisions;
62 u32 tx_carrier_errors;
63 u32 tx_underrun_errors;
64 u32 tx_cts_errors;
65 u32 tx_timeout_errors;
67 /* various cruft */
68 u32 dataA[6];
69 u16 dataB[5];
70 u32 dataC[14];
71 } __attribute((packed));
73 #define STATUS_MASK 0x0F
74 #define COMPLETED (1<<7)
75 #define COMPLETED_OK (1<<6)
76 #define BUFFER_BUSY (1<<5)
78 #define CONTROL_EOP (1<<7) /* End Of Packet */
79 #define CONTROL_EOL (1<<6) /* End of List */
81 #define MCA_MC32_ID 0x0041 /* Our MCA ident */