ia64/linux-2.6.18-xen.hg

view drivers/atm/eni.h @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
3 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
6 #ifndef DRIVER_ATM_ENI_H
7 #define DRIVER_ATM_ENI_H
9 #include <linux/atm.h>
10 #include <linux/atmdev.h>
11 #include <linux/sonet.h>
12 #include <linux/skbuff.h>
13 #include <linux/time.h>
14 #include <linux/pci.h>
15 #include <linux/spinlock.h>
16 #include <asm/atomic.h>
18 #include "midway.h"
21 #define KERNEL_OFFSET 0xC0000000 /* kernel 0x0 is at phys 0xC0000000 */
22 #define DEV_LABEL "eni"
24 #define UBR_BUFFER (128*1024) /* UBR buffer size */
26 #define RX_DMA_BUF 8 /* burst and skip a few things */
27 #define TX_DMA_BUF 100 /* should be enough for 64 kB */
29 #define DEFAULT_RX_MULT 300 /* max_sdu*3 */
30 #define DEFAULT_TX_MULT 300 /* max_sdu*3 */
32 #define ENI_ZEROES_SIZE 4 /* need that many DMA-able zero bytes */
35 struct eni_free {
36 void __iomem *start; /* counting in bytes */
37 int order;
38 };
40 struct eni_tx {
41 void __iomem *send; /* base, 0 if unused */
42 int prescaler; /* shaping prescaler */
43 int resolution; /* shaping divider */
44 unsigned long tx_pos; /* current TX write position */
45 unsigned long words; /* size of TX queue */
46 int index; /* TX channel number */
47 int reserved; /* reserved peak cell rate */
48 int shaping; /* shaped peak cell rate */
49 struct sk_buff_head backlog; /* queue of waiting TX buffers */
50 };
52 struct eni_vcc {
53 int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */
54 void __iomem *recv; /* receive buffer */
55 unsigned long words; /* its size in words */
56 unsigned long descr; /* next descriptor (RX) */
57 unsigned long rx_pos; /* current RX descriptor pos */
58 struct eni_tx *tx; /* TXer, NULL if none */
59 int rxing; /* number of pending PDUs */
60 int servicing; /* number of waiting VCs (0 or 1) */
61 int txing; /* number of pending TX bytes */
62 struct timeval timestamp; /* for RX timing */
63 struct atm_vcc *next; /* next pending RX */
64 struct sk_buff *last; /* last PDU being DMAed (used to carry
65 discard information) */
66 };
68 struct eni_dev {
69 /*-------------------------------- spinlock */
70 spinlock_t lock; /* sync with interrupt */
71 struct tasklet_struct task; /* tasklet for interrupt work */
72 u32 events; /* pending events */
73 /*-------------------------------- base pointers into Midway address
74 space */
75 void __iomem *phy; /* PHY interface chip registers */
76 void __iomem *reg; /* register base */
77 void __iomem *ram; /* RAM base */
78 void __iomem *vci; /* VCI table */
79 void __iomem *rx_dma; /* RX DMA queue */
80 void __iomem *tx_dma; /* TX DMA queue */
81 void __iomem *service; /* service list */
82 /*-------------------------------- TX part */
83 struct eni_tx tx[NR_CHAN]; /* TX channels */
84 struct eni_tx *ubr; /* UBR channel */
85 struct sk_buff_head tx_queue; /* PDUs currently being TX DMAed*/
86 wait_queue_head_t tx_wait; /* for close */
87 int tx_bw; /* remaining bandwidth */
88 u32 dma[TX_DMA_BUF*2]; /* DMA request scratch area */
89 int tx_mult; /* buffer size multiplier (percent) */
90 /*-------------------------------- RX part */
91 u32 serv_read; /* host service read index */
92 struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
93 struct atm_vcc *slow,*last_slow;
94 struct atm_vcc **rx_map; /* for fast lookups */
95 struct sk_buff_head rx_queue; /* PDUs currently being RX-DMAed */
96 wait_queue_head_t rx_wait; /* for close */
97 int rx_mult; /* buffer size multiplier (percent) */
98 /*-------------------------------- statistics */
99 unsigned long lost; /* number of lost cells (RX) */
100 /*-------------------------------- memory management */
101 unsigned long base_diff; /* virtual-real base address */
102 int free_len; /* free list length */
103 struct eni_free *free_list; /* free list */
104 int free_list_size; /* maximum size of free list */
105 /*-------------------------------- ENI links */
106 struct atm_dev *more; /* other ENI devices */
107 /*-------------------------------- general information */
108 int mem; /* RAM on board (in bytes) */
109 int asic; /* PCI interface type, 0 for FPGA */
110 unsigned int irq; /* IRQ */
111 struct pci_dev *pci_dev; /* PCI stuff */
112 };
115 #define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
116 #define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
119 struct eni_skb_prv {
120 struct atm_skb_data _; /* reserved */
121 unsigned long pos; /* position of next descriptor */
122 int size; /* PDU size in reassembly buffer */
123 dma_addr_t paddr; /* DMA handle */
124 };
126 #define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
127 #define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
128 #define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
130 #endif