ia64/linux-2.6.18-xen.hg

view arch/sparc64/kernel/time.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 3e8752eb6d9c
children
line source
1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
3 *
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
6 *
7 * Based largely on code which is:
8 *
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
10 */
12 #include <linux/errno.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/profile.h>
32 #include <linux/miscdevice.h>
33 #include <linux/rtc.h>
35 #include <asm/oplib.h>
36 #include <asm/mostek.h>
37 #include <asm/timer.h>
38 #include <asm/irq.h>
39 #include <asm/io.h>
40 #include <asm/prom.h>
41 #include <asm/of_device.h>
42 #include <asm/starfire.h>
43 #include <asm/smp.h>
44 #include <asm/sections.h>
45 #include <asm/cpudata.h>
46 #include <asm/uaccess.h>
47 #include <asm/prom.h>
49 DEFINE_SPINLOCK(mostek_lock);
50 DEFINE_SPINLOCK(rtc_lock);
51 void __iomem *mstk48t02_regs = NULL;
52 #ifdef CONFIG_PCI
53 unsigned long ds1287_regs = 0UL;
54 #endif
56 extern unsigned long wall_jiffies;
58 static void __iomem *mstk48t08_regs;
59 static void __iomem *mstk48t59_regs;
61 static int set_rtc_mmss(unsigned long);
63 #define TICK_PRIV_BIT (1UL << 63)
65 #ifdef CONFIG_SMP
66 unsigned long profile_pc(struct pt_regs *regs)
67 {
68 unsigned long pc = instruction_pointer(regs);
70 if (in_lock_functions(pc))
71 return regs->u_regs[UREG_RETPC];
72 return pc;
73 }
74 EXPORT_SYMBOL(profile_pc);
75 #endif
77 static void tick_disable_protection(void)
78 {
79 /* Set things up so user can access tick register for profiling
80 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
81 * read back of %tick after writing it.
82 */
83 __asm__ __volatile__(
84 " ba,pt %%xcc, 1f\n"
85 " nop\n"
86 " .align 64\n"
87 "1: rd %%tick, %%g2\n"
88 " add %%g2, 6, %%g2\n"
89 " andn %%g2, %0, %%g2\n"
90 " wrpr %%g2, 0, %%tick\n"
91 " rdpr %%tick, %%g0"
92 : /* no outputs */
93 : "r" (TICK_PRIV_BIT)
94 : "g2");
95 }
97 static void tick_init_tick(unsigned long offset)
98 {
99 tick_disable_protection();
101 __asm__ __volatile__(
102 " rd %%tick, %%g1\n"
103 " andn %%g1, %1, %%g1\n"
104 " ba,pt %%xcc, 1f\n"
105 " add %%g1, %0, %%g1\n"
106 " .align 64\n"
107 "1: wr %%g1, 0x0, %%tick_cmpr\n"
108 " rd %%tick_cmpr, %%g0"
109 : /* no outputs */
110 : "r" (offset), "r" (TICK_PRIV_BIT)
111 : "g1");
112 }
114 static unsigned long tick_get_tick(void)
115 {
116 unsigned long ret;
118 __asm__ __volatile__("rd %%tick, %0\n\t"
119 "mov %0, %0"
120 : "=r" (ret));
122 return ret & ~TICK_PRIV_BIT;
123 }
125 static unsigned long tick_get_compare(void)
126 {
127 unsigned long ret;
129 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
130 "mov %0, %0"
131 : "=r" (ret));
133 return ret;
134 }
136 static unsigned long tick_add_compare(unsigned long adj)
137 {
138 unsigned long new_compare;
140 /* Workaround for Spitfire Errata (#54 I think??), I discovered
141 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
142 * number 103640.
143 *
144 * On Blackbird writes to %tick_cmpr can fail, the
145 * workaround seems to be to execute the wr instruction
146 * at the start of an I-cache line, and perform a dummy
147 * read back from %tick_cmpr right after writing to it. -DaveM
148 */
149 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
150 "ba,pt %%xcc, 1f\n\t"
151 " add %0, %1, %0\n\t"
152 ".align 64\n"
153 "1:\n\t"
154 "wr %0, 0, %%tick_cmpr\n\t"
155 "rd %%tick_cmpr, %%g0"
156 : "=&r" (new_compare)
157 : "r" (adj));
159 return new_compare;
160 }
162 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
163 {
164 unsigned long new_tick, tmp;
166 /* Also need to handle Blackbird bug here too. */
167 __asm__ __volatile__("rd %%tick, %0\n\t"
168 "add %0, %2, %0\n\t"
169 "wrpr %0, 0, %%tick\n\t"
170 "andn %0, %4, %1\n\t"
171 "ba,pt %%xcc, 1f\n\t"
172 " add %1, %3, %1\n\t"
173 ".align 64\n"
174 "1:\n\t"
175 "wr %1, 0, %%tick_cmpr\n\t"
176 "rd %%tick_cmpr, %%g0"
177 : "=&r" (new_tick), "=&r" (tmp)
178 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
180 return new_tick;
181 }
183 static struct sparc64_tick_ops tick_operations __read_mostly = {
184 .init_tick = tick_init_tick,
185 .get_tick = tick_get_tick,
186 .get_compare = tick_get_compare,
187 .add_tick = tick_add_tick,
188 .add_compare = tick_add_compare,
189 .softint_mask = 1UL << 0,
190 };
192 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
194 static void stick_init_tick(unsigned long offset)
195 {
196 /* Writes to the %tick and %stick register are not
197 * allowed on sun4v. The Hypervisor controls that
198 * bit, per-strand.
199 */
200 if (tlb_type != hypervisor) {
201 tick_disable_protection();
203 /* Let the user get at STICK too. */
204 __asm__ __volatile__(
205 " rd %%asr24, %%g2\n"
206 " andn %%g2, %0, %%g2\n"
207 " wr %%g2, 0, %%asr24"
208 : /* no outputs */
209 : "r" (TICK_PRIV_BIT)
210 : "g1", "g2");
211 }
213 __asm__ __volatile__(
214 " rd %%asr24, %%g1\n"
215 " andn %%g1, %1, %%g1\n"
216 " add %%g1, %0, %%g1\n"
217 " wr %%g1, 0x0, %%asr25"
218 : /* no outputs */
219 : "r" (offset), "r" (TICK_PRIV_BIT)
220 : "g1");
221 }
223 static unsigned long stick_get_tick(void)
224 {
225 unsigned long ret;
227 __asm__ __volatile__("rd %%asr24, %0"
228 : "=r" (ret));
230 return ret & ~TICK_PRIV_BIT;
231 }
233 static unsigned long stick_get_compare(void)
234 {
235 unsigned long ret;
237 __asm__ __volatile__("rd %%asr25, %0"
238 : "=r" (ret));
240 return ret;
241 }
243 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
244 {
245 unsigned long new_tick, tmp;
247 __asm__ __volatile__("rd %%asr24, %0\n\t"
248 "add %0, %2, %0\n\t"
249 "wr %0, 0, %%asr24\n\t"
250 "andn %0, %4, %1\n\t"
251 "add %1, %3, %1\n\t"
252 "wr %1, 0, %%asr25"
253 : "=&r" (new_tick), "=&r" (tmp)
254 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
256 return new_tick;
257 }
259 static unsigned long stick_add_compare(unsigned long adj)
260 {
261 unsigned long new_compare;
263 __asm__ __volatile__("rd %%asr25, %0\n\t"
264 "add %0, %1, %0\n\t"
265 "wr %0, 0, %%asr25"
266 : "=&r" (new_compare)
267 : "r" (adj));
269 return new_compare;
270 }
272 static struct sparc64_tick_ops stick_operations __read_mostly = {
273 .init_tick = stick_init_tick,
274 .get_tick = stick_get_tick,
275 .get_compare = stick_get_compare,
276 .add_tick = stick_add_tick,
277 .add_compare = stick_add_compare,
278 .softint_mask = 1UL << 16,
279 };
281 /* On Hummingbird the STICK/STICK_CMPR register is implemented
282 * in I/O space. There are two 64-bit registers each, the
283 * first holds the low 32-bits of the value and the second holds
284 * the high 32-bits.
285 *
286 * Since STICK is constantly updating, we have to access it carefully.
287 *
288 * The sequence we use to read is:
289 * 1) read high
290 * 2) read low
291 * 3) read high again, if it rolled re-read both low and high again.
292 *
293 * Writing STICK safely is also tricky:
294 * 1) write low to zero
295 * 2) write high
296 * 3) write low
297 */
298 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
299 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
301 static unsigned long __hbird_read_stick(void)
302 {
303 unsigned long ret, tmp1, tmp2, tmp3;
304 unsigned long addr = HBIRD_STICK_ADDR+8;
306 __asm__ __volatile__("ldxa [%1] %5, %2\n"
307 "1:\n\t"
308 "sub %1, 0x8, %1\n\t"
309 "ldxa [%1] %5, %3\n\t"
310 "add %1, 0x8, %1\n\t"
311 "ldxa [%1] %5, %4\n\t"
312 "cmp %4, %2\n\t"
313 "bne,a,pn %%xcc, 1b\n\t"
314 " mov %4, %2\n\t"
315 "sllx %4, 32, %4\n\t"
316 "or %3, %4, %0\n\t"
317 : "=&r" (ret), "=&r" (addr),
318 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
319 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
321 return ret;
322 }
324 static unsigned long __hbird_read_compare(void)
325 {
326 unsigned long low, high;
327 unsigned long addr = HBIRD_STICKCMP_ADDR;
329 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
330 "add %2, 0x8, %2\n\t"
331 "ldxa [%2] %3, %1"
332 : "=&r" (low), "=&r" (high), "=&r" (addr)
333 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
335 return (high << 32UL) | low;
336 }
338 static void __hbird_write_stick(unsigned long val)
339 {
340 unsigned long low = (val & 0xffffffffUL);
341 unsigned long high = (val >> 32UL);
342 unsigned long addr = HBIRD_STICK_ADDR;
344 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
345 "add %0, 0x8, %0\n\t"
346 "stxa %3, [%0] %4\n\t"
347 "sub %0, 0x8, %0\n\t"
348 "stxa %2, [%0] %4"
349 : "=&r" (addr)
350 : "0" (addr), "r" (low), "r" (high),
351 "i" (ASI_PHYS_BYPASS_EC_E));
352 }
354 static void __hbird_write_compare(unsigned long val)
355 {
356 unsigned long low = (val & 0xffffffffUL);
357 unsigned long high = (val >> 32UL);
358 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
360 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
361 "sub %0, 0x8, %0\n\t"
362 "stxa %2, [%0] %4"
363 : "=&r" (addr)
364 : "0" (addr), "r" (low), "r" (high),
365 "i" (ASI_PHYS_BYPASS_EC_E));
366 }
368 static void hbtick_init_tick(unsigned long offset)
369 {
370 unsigned long val;
372 tick_disable_protection();
374 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
375 * XXX into actually sending STICK interrupts. I think because
376 * XXX of how we store %tick_cmpr in head.S this somehow resets the
377 * XXX {TICK + STICK} interrupt mux. -DaveM
378 */
379 __hbird_write_stick(__hbird_read_stick());
381 val = __hbird_read_stick() & ~TICK_PRIV_BIT;
382 __hbird_write_compare(val + offset);
383 }
385 static unsigned long hbtick_get_tick(void)
386 {
387 return __hbird_read_stick() & ~TICK_PRIV_BIT;
388 }
390 static unsigned long hbtick_get_compare(void)
391 {
392 return __hbird_read_compare();
393 }
395 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
396 {
397 unsigned long val;
399 val = __hbird_read_stick() + adj;
400 __hbird_write_stick(val);
402 val &= ~TICK_PRIV_BIT;
403 __hbird_write_compare(val + offset);
405 return val;
406 }
408 static unsigned long hbtick_add_compare(unsigned long adj)
409 {
410 unsigned long val = __hbird_read_compare() + adj;
412 val &= ~TICK_PRIV_BIT;
413 __hbird_write_compare(val);
415 return val;
416 }
418 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
419 .init_tick = hbtick_init_tick,
420 .get_tick = hbtick_get_tick,
421 .get_compare = hbtick_get_compare,
422 .add_tick = hbtick_add_tick,
423 .add_compare = hbtick_add_compare,
424 .softint_mask = 1UL << 0,
425 };
427 /* timer_interrupt() needs to keep up the real-time clock,
428 * as well as call the "do_timer()" routine every clocktick
429 *
430 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
431 * interrupts, one at level14 and one with softint bit 0.
432 */
433 unsigned long timer_tick_offset __read_mostly;
435 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
437 #define TICK_SIZE (tick_nsec / 1000)
439 static inline void timer_check_rtc(void)
440 {
441 /* last time the cmos clock got updated */
442 static long last_rtc_update;
444 /* Determine when to update the Mostek clock. */
445 if (ntp_synced() &&
446 xtime.tv_sec > last_rtc_update + 660 &&
447 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
448 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
449 if (set_rtc_mmss(xtime.tv_sec) == 0)
450 last_rtc_update = xtime.tv_sec;
451 else
452 last_rtc_update = xtime.tv_sec - 600;
453 /* do it again in 60 s */
454 }
455 }
457 irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
458 {
459 unsigned long ticks, compare, pstate;
461 write_seqlock(&xtime_lock);
463 do {
464 #ifndef CONFIG_SMP
465 profile_tick(CPU_PROFILING, regs);
466 update_process_times(user_mode(regs));
467 #endif
468 do_timer(regs);
470 /* Guarantee that the following sequences execute
471 * uninterrupted.
472 */
473 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
474 "wrpr %0, %1, %%pstate"
475 : "=r" (pstate)
476 : "i" (PSTATE_IE));
478 compare = tick_ops->add_compare(timer_tick_offset);
479 ticks = tick_ops->get_tick();
481 /* Restore PSTATE_IE. */
482 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
483 : /* no outputs */
484 : "r" (pstate));
485 } while (time_after_eq(ticks, compare));
487 timer_check_rtc();
489 write_sequnlock(&xtime_lock);
491 return IRQ_HANDLED;
492 }
494 #ifdef CONFIG_SMP
495 void timer_tick_interrupt(struct pt_regs *regs)
496 {
497 write_seqlock(&xtime_lock);
499 do_timer(regs);
501 timer_check_rtc();
503 write_sequnlock(&xtime_lock);
504 }
505 #endif
507 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
508 static void __init kick_start_clock(void)
509 {
510 void __iomem *regs = mstk48t02_regs;
511 u8 sec, tmp;
512 int i, count;
514 prom_printf("CLOCK: Clock was stopped. Kick start ");
516 spin_lock_irq(&mostek_lock);
518 /* Turn on the kick start bit to start the oscillator. */
519 tmp = mostek_read(regs + MOSTEK_CREG);
520 tmp |= MSTK_CREG_WRITE;
521 mostek_write(regs + MOSTEK_CREG, tmp);
522 tmp = mostek_read(regs + MOSTEK_SEC);
523 tmp &= ~MSTK_STOP;
524 mostek_write(regs + MOSTEK_SEC, tmp);
525 tmp = mostek_read(regs + MOSTEK_HOUR);
526 tmp |= MSTK_KICK_START;
527 mostek_write(regs + MOSTEK_HOUR, tmp);
528 tmp = mostek_read(regs + MOSTEK_CREG);
529 tmp &= ~MSTK_CREG_WRITE;
530 mostek_write(regs + MOSTEK_CREG, tmp);
532 spin_unlock_irq(&mostek_lock);
534 /* Delay to allow the clock oscillator to start. */
535 sec = MSTK_REG_SEC(regs);
536 for (i = 0; i < 3; i++) {
537 while (sec == MSTK_REG_SEC(regs))
538 for (count = 0; count < 100000; count++)
539 /* nothing */ ;
540 prom_printf(".");
541 sec = MSTK_REG_SEC(regs);
542 }
543 prom_printf("\n");
545 spin_lock_irq(&mostek_lock);
547 /* Turn off kick start and set a "valid" time and date. */
548 tmp = mostek_read(regs + MOSTEK_CREG);
549 tmp |= MSTK_CREG_WRITE;
550 mostek_write(regs + MOSTEK_CREG, tmp);
551 tmp = mostek_read(regs + MOSTEK_HOUR);
552 tmp &= ~MSTK_KICK_START;
553 mostek_write(regs + MOSTEK_HOUR, tmp);
554 MSTK_SET_REG_SEC(regs,0);
555 MSTK_SET_REG_MIN(regs,0);
556 MSTK_SET_REG_HOUR(regs,0);
557 MSTK_SET_REG_DOW(regs,5);
558 MSTK_SET_REG_DOM(regs,1);
559 MSTK_SET_REG_MONTH(regs,8);
560 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
561 tmp = mostek_read(regs + MOSTEK_CREG);
562 tmp &= ~MSTK_CREG_WRITE;
563 mostek_write(regs + MOSTEK_CREG, tmp);
565 spin_unlock_irq(&mostek_lock);
567 /* Ensure the kick start bit is off. If it isn't, turn it off. */
568 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
569 prom_printf("CLOCK: Kick start still on!\n");
571 spin_lock_irq(&mostek_lock);
573 tmp = mostek_read(regs + MOSTEK_CREG);
574 tmp |= MSTK_CREG_WRITE;
575 mostek_write(regs + MOSTEK_CREG, tmp);
577 tmp = mostek_read(regs + MOSTEK_HOUR);
578 tmp &= ~MSTK_KICK_START;
579 mostek_write(regs + MOSTEK_HOUR, tmp);
581 tmp = mostek_read(regs + MOSTEK_CREG);
582 tmp &= ~MSTK_CREG_WRITE;
583 mostek_write(regs + MOSTEK_CREG, tmp);
585 spin_unlock_irq(&mostek_lock);
586 }
588 prom_printf("CLOCK: Kick start procedure successful.\n");
589 }
591 /* Return nonzero if the clock chip battery is low. */
592 static int __init has_low_battery(void)
593 {
594 void __iomem *regs = mstk48t02_regs;
595 u8 data1, data2;
597 spin_lock_irq(&mostek_lock);
599 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
600 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
601 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
602 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
604 spin_unlock_irq(&mostek_lock);
606 return (data1 == data2); /* Was the write blocked? */
607 }
609 /* Probe for the real time clock chip. */
610 static void __init set_system_time(void)
611 {
612 unsigned int year, mon, day, hour, min, sec;
613 void __iomem *mregs = mstk48t02_regs;
614 #ifdef CONFIG_PCI
615 unsigned long dregs = ds1287_regs;
616 #else
617 unsigned long dregs = 0UL;
618 #endif
619 u8 tmp;
621 if (!mregs && !dregs) {
622 prom_printf("Something wrong, clock regs not mapped yet.\n");
623 prom_halt();
624 }
626 if (mregs) {
627 spin_lock_irq(&mostek_lock);
629 /* Traditional Mostek chip. */
630 tmp = mostek_read(mregs + MOSTEK_CREG);
631 tmp |= MSTK_CREG_READ;
632 mostek_write(mregs + MOSTEK_CREG, tmp);
634 sec = MSTK_REG_SEC(mregs);
635 min = MSTK_REG_MIN(mregs);
636 hour = MSTK_REG_HOUR(mregs);
637 day = MSTK_REG_DOM(mregs);
638 mon = MSTK_REG_MONTH(mregs);
639 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
640 } else {
641 /* Dallas 12887 RTC chip. */
643 do {
644 sec = CMOS_READ(RTC_SECONDS);
645 min = CMOS_READ(RTC_MINUTES);
646 hour = CMOS_READ(RTC_HOURS);
647 day = CMOS_READ(RTC_DAY_OF_MONTH);
648 mon = CMOS_READ(RTC_MONTH);
649 year = CMOS_READ(RTC_YEAR);
650 } while (sec != CMOS_READ(RTC_SECONDS));
652 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
653 BCD_TO_BIN(sec);
654 BCD_TO_BIN(min);
655 BCD_TO_BIN(hour);
656 BCD_TO_BIN(day);
657 BCD_TO_BIN(mon);
658 BCD_TO_BIN(year);
659 }
660 if ((year += 1900) < 1970)
661 year += 100;
662 }
664 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
665 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
666 set_normalized_timespec(&wall_to_monotonic,
667 -xtime.tv_sec, -xtime.tv_nsec);
669 if (mregs) {
670 tmp = mostek_read(mregs + MOSTEK_CREG);
671 tmp &= ~MSTK_CREG_READ;
672 mostek_write(mregs + MOSTEK_CREG, tmp);
674 spin_unlock_irq(&mostek_lock);
675 }
676 }
678 /* davem suggests we keep this within the 4M locked kernel image */
679 static u32 starfire_get_time(void)
680 {
681 static char obp_gettod[32];
682 static u32 unix_tod;
684 sprintf(obp_gettod, "h# %08x unix-gettod",
685 (unsigned int) (long) &unix_tod);
686 prom_feval(obp_gettod);
688 return unix_tod;
689 }
691 static int starfire_set_time(u32 val)
692 {
693 /* Do nothing, time is set using the service processor
694 * console on this platform.
695 */
696 return 0;
697 }
699 static u32 hypervisor_get_time(void)
700 {
701 register unsigned long func asm("%o5");
702 register unsigned long arg0 asm("%o0");
703 register unsigned long arg1 asm("%o1");
704 int retries = 10000;
706 retry:
707 func = HV_FAST_TOD_GET;
708 arg0 = 0;
709 arg1 = 0;
710 __asm__ __volatile__("ta %6"
711 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
712 : "0" (func), "1" (arg0), "2" (arg1),
713 "i" (HV_FAST_TRAP));
714 if (arg0 == HV_EOK)
715 return arg1;
716 if (arg0 == HV_EWOULDBLOCK) {
717 if (--retries > 0) {
718 udelay(100);
719 goto retry;
720 }
721 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
722 return 0;
723 }
724 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
725 return 0;
726 }
728 static int hypervisor_set_time(u32 secs)
729 {
730 register unsigned long func asm("%o5");
731 register unsigned long arg0 asm("%o0");
732 int retries = 10000;
734 retry:
735 func = HV_FAST_TOD_SET;
736 arg0 = secs;
737 __asm__ __volatile__("ta %4"
738 : "=&r" (func), "=&r" (arg0)
739 : "0" (func), "1" (arg0),
740 "i" (HV_FAST_TRAP));
741 if (arg0 == HV_EOK)
742 return 0;
743 if (arg0 == HV_EWOULDBLOCK) {
744 if (--retries > 0) {
745 udelay(100);
746 goto retry;
747 }
748 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
749 return -EAGAIN;
750 }
751 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
752 return -EOPNOTSUPP;
753 }
755 static int __init clock_model_matches(char *model)
756 {
757 if (strcmp(model, "mk48t02") &&
758 strcmp(model, "mk48t08") &&
759 strcmp(model, "mk48t59") &&
760 strcmp(model, "m5819") &&
761 strcmp(model, "m5819p") &&
762 strcmp(model, "m5823") &&
763 strcmp(model, "ds1287"))
764 return 0;
766 return 1;
767 }
769 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
770 {
771 struct device_node *dp = op->node;
772 char *model = of_get_property(dp, "model", NULL);
773 unsigned long size, flags;
774 void __iomem *regs;
776 if (!model || !clock_model_matches(model))
777 return -ENODEV;
779 /* On an Enterprise system there can be multiple mostek clocks.
780 * We should only match the one that is on the central FHC bus.
781 */
782 if (!strcmp(dp->parent->name, "fhc") &&
783 strcmp(dp->parent->parent->name, "central") != 0)
784 return -ENODEV;
786 size = (op->resource[0].end - op->resource[0].start) + 1;
787 regs = of_ioremap(&op->resource[0], 0, size, "clock");
788 if (!regs)
789 return -ENOMEM;
791 #ifdef CONFIG_PCI
792 if (!strcmp(model, "ds1287") ||
793 !strcmp(model, "m5819") ||
794 !strcmp(model, "m5819p") ||
795 !strcmp(model, "m5823")) {
796 ds1287_regs = (unsigned long) regs;
797 } else
798 #endif
799 if (model[5] == '0' && model[6] == '2') {
800 mstk48t02_regs = regs;
801 } else if(model[5] == '0' && model[6] == '8') {
802 mstk48t08_regs = regs;
803 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
804 } else {
805 mstk48t59_regs = regs;
806 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
807 }
809 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
811 local_irq_save(flags);
813 if (mstk48t02_regs != NULL) {
814 /* Report a low battery voltage condition. */
815 if (has_low_battery())
816 prom_printf("NVRAM: Low battery voltage!\n");
818 /* Kick start the clock if it is completely stopped. */
819 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
820 kick_start_clock();
821 }
823 set_system_time();
825 local_irq_restore(flags);
827 return 0;
828 }
830 static struct of_device_id clock_match[] = {
831 {
832 .name = "eeprom",
833 },
834 {
835 .name = "rtc",
836 },
837 {},
838 };
840 static struct of_platform_driver clock_driver = {
841 .name = "clock",
842 .match_table = clock_match,
843 .probe = clock_probe,
844 };
846 static int __init clock_init(void)
847 {
848 if (this_is_starfire) {
849 xtime.tv_sec = starfire_get_time();
850 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
851 set_normalized_timespec(&wall_to_monotonic,
852 -xtime.tv_sec, -xtime.tv_nsec);
853 return 0;
854 }
855 if (tlb_type == hypervisor) {
856 xtime.tv_sec = hypervisor_get_time();
857 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
858 set_normalized_timespec(&wall_to_monotonic,
859 -xtime.tv_sec, -xtime.tv_nsec);
860 return 0;
861 }
863 return of_register_driver(&clock_driver, &of_bus_type);
864 }
866 /* Must be after subsys_initcall() so that busses are probed. Must
867 * be before device_initcall() because things like the RTC driver
868 * need to see the clock registers.
869 */
870 fs_initcall(clock_init);
872 /* This is gets the master TICK_INT timer going. */
873 static unsigned long sparc64_init_timers(void)
874 {
875 struct device_node *dp;
876 struct property *prop;
877 unsigned long clock;
878 #ifdef CONFIG_SMP
879 extern void smp_tick_init(void);
880 #endif
882 dp = of_find_node_by_path("/");
883 if (tlb_type == spitfire) {
884 unsigned long ver, manuf, impl;
886 __asm__ __volatile__ ("rdpr %%ver, %0"
887 : "=&r" (ver));
888 manuf = ((ver >> 48) & 0xffff);
889 impl = ((ver >> 32) & 0xffff);
890 if (manuf == 0x17 && impl == 0x13) {
891 /* Hummingbird, aka Ultra-IIe */
892 tick_ops = &hbtick_operations;
893 prop = of_find_property(dp, "stick-frequency", NULL);
894 } else {
895 tick_ops = &tick_operations;
896 cpu_find_by_instance(0, &dp, NULL);
897 prop = of_find_property(dp, "clock-frequency", NULL);
898 }
899 } else {
900 tick_ops = &stick_operations;
901 prop = of_find_property(dp, "stick-frequency", NULL);
902 }
903 clock = *(unsigned int *) prop->value;
904 timer_tick_offset = clock / HZ;
906 #ifdef CONFIG_SMP
907 smp_tick_init();
908 #endif
910 return clock;
911 }
913 static void sparc64_start_timers(void)
914 {
915 unsigned long pstate;
917 /* Guarantee that the following sequences execute
918 * uninterrupted.
919 */
920 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
921 "wrpr %0, %1, %%pstate"
922 : "=r" (pstate)
923 : "i" (PSTATE_IE));
925 tick_ops->init_tick(timer_tick_offset);
927 /* Restore PSTATE_IE. */
928 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
929 : /* no outputs */
930 : "r" (pstate));
931 }
933 struct freq_table {
934 unsigned long clock_tick_ref;
935 unsigned int ref_freq;
936 };
937 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
939 unsigned long sparc64_get_clock_tick(unsigned int cpu)
940 {
941 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
943 if (ft->clock_tick_ref)
944 return ft->clock_tick_ref;
945 return cpu_data(cpu).clock_tick;
946 }
948 #ifdef CONFIG_CPU_FREQ
950 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
951 void *data)
952 {
953 struct cpufreq_freqs *freq = data;
954 unsigned int cpu = freq->cpu;
955 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
957 if (!ft->ref_freq) {
958 ft->ref_freq = freq->old;
959 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
960 }
961 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
962 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
963 (val == CPUFREQ_RESUMECHANGE)) {
964 cpu_data(cpu).clock_tick =
965 cpufreq_scale(ft->clock_tick_ref,
966 ft->ref_freq,
967 freq->new);
968 }
970 return 0;
971 }
973 static struct notifier_block sparc64_cpufreq_notifier_block = {
974 .notifier_call = sparc64_cpufreq_notifier
975 };
977 #endif /* CONFIG_CPU_FREQ */
979 static struct time_interpolator sparc64_cpu_interpolator = {
980 .source = TIME_SOURCE_CPU,
981 .shift = 16,
982 .mask = 0xffffffffffffffffLL
983 };
985 /* The quotient formula is taken from the IA64 port. */
986 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
987 void __init time_init(void)
988 {
989 unsigned long clock = sparc64_init_timers();
991 sparc64_cpu_interpolator.frequency = clock;
992 register_time_interpolator(&sparc64_cpu_interpolator);
994 /* Now that the interpolator is registered, it is
995 * safe to start the timer ticking.
996 */
997 sparc64_start_timers();
999 timer_ticks_per_nsec_quotient =
1000 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1001 (clock / 2)) / clock);
1003 #ifdef CONFIG_CPU_FREQ
1004 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1005 CPUFREQ_TRANSITION_NOTIFIER);
1006 #endif
1009 unsigned long long sched_clock(void)
1011 unsigned long ticks = tick_ops->get_tick();
1013 return (ticks * timer_ticks_per_nsec_quotient)
1014 >> SPARC64_NSEC_PER_CYC_SHIFT;
1017 static int set_rtc_mmss(unsigned long nowtime)
1019 int real_seconds, real_minutes, chip_minutes;
1020 void __iomem *mregs = mstk48t02_regs;
1021 #ifdef CONFIG_PCI
1022 unsigned long dregs = ds1287_regs;
1023 #else
1024 unsigned long dregs = 0UL;
1025 #endif
1026 unsigned long flags;
1027 u8 tmp;
1029 /*
1030 * Not having a register set can lead to trouble.
1031 * Also starfire doesn't have a tod clock.
1032 */
1033 if (!mregs && !dregs)
1034 return -1;
1036 if (mregs) {
1037 spin_lock_irqsave(&mostek_lock, flags);
1039 /* Read the current RTC minutes. */
1040 tmp = mostek_read(mregs + MOSTEK_CREG);
1041 tmp |= MSTK_CREG_READ;
1042 mostek_write(mregs + MOSTEK_CREG, tmp);
1044 chip_minutes = MSTK_REG_MIN(mregs);
1046 tmp = mostek_read(mregs + MOSTEK_CREG);
1047 tmp &= ~MSTK_CREG_READ;
1048 mostek_write(mregs + MOSTEK_CREG, tmp);
1050 /*
1051 * since we're only adjusting minutes and seconds,
1052 * don't interfere with hour overflow. This avoids
1053 * messing with unknown time zones but requires your
1054 * RTC not to be off by more than 15 minutes
1055 */
1056 real_seconds = nowtime % 60;
1057 real_minutes = nowtime / 60;
1058 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1059 real_minutes += 30; /* correct for half hour time zone */
1060 real_minutes %= 60;
1062 if (abs(real_minutes - chip_minutes) < 30) {
1063 tmp = mostek_read(mregs + MOSTEK_CREG);
1064 tmp |= MSTK_CREG_WRITE;
1065 mostek_write(mregs + MOSTEK_CREG, tmp);
1067 MSTK_SET_REG_SEC(mregs,real_seconds);
1068 MSTK_SET_REG_MIN(mregs,real_minutes);
1070 tmp = mostek_read(mregs + MOSTEK_CREG);
1071 tmp &= ~MSTK_CREG_WRITE;
1072 mostek_write(mregs + MOSTEK_CREG, tmp);
1074 spin_unlock_irqrestore(&mostek_lock, flags);
1076 return 0;
1077 } else {
1078 spin_unlock_irqrestore(&mostek_lock, flags);
1080 return -1;
1082 } else {
1083 int retval = 0;
1084 unsigned char save_control, save_freq_select;
1086 /* Stolen from arch/i386/kernel/time.c, see there for
1087 * credits and descriptive comments.
1088 */
1089 spin_lock_irqsave(&rtc_lock, flags);
1090 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1091 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1093 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1094 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1096 chip_minutes = CMOS_READ(RTC_MINUTES);
1097 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1098 BCD_TO_BIN(chip_minutes);
1099 real_seconds = nowtime % 60;
1100 real_minutes = nowtime / 60;
1101 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1102 real_minutes += 30;
1103 real_minutes %= 60;
1105 if (abs(real_minutes - chip_minutes) < 30) {
1106 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1107 BIN_TO_BCD(real_seconds);
1108 BIN_TO_BCD(real_minutes);
1110 CMOS_WRITE(real_seconds,RTC_SECONDS);
1111 CMOS_WRITE(real_minutes,RTC_MINUTES);
1112 } else {
1113 printk(KERN_WARNING
1114 "set_rtc_mmss: can't update from %d to %d\n",
1115 chip_minutes, real_minutes);
1116 retval = -1;
1119 CMOS_WRITE(save_control, RTC_CONTROL);
1120 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1121 spin_unlock_irqrestore(&rtc_lock, flags);
1123 return retval;
1127 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1128 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1130 /* months start at 0 now */
1131 static unsigned char days_in_mo[] =
1132 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1134 #define FEBRUARY 2
1135 #define STARTOFTIME 1970
1136 #define SECDAY 86400L
1137 #define SECYR (SECDAY * 365)
1138 #define leapyear(year) ((year) % 4 == 0 && \
1139 ((year) % 100 != 0 || (year) % 400 == 0))
1140 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1141 #define days_in_month(a) (month_days[(a) - 1])
1143 static int month_days[12] = {
1144 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1145 };
1147 /*
1148 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1149 */
1150 static void GregorianDay(struct rtc_time * tm)
1152 int leapsToDate;
1153 int lastYear;
1154 int day;
1155 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1157 lastYear = tm->tm_year - 1;
1159 /*
1160 * Number of leap corrections to apply up to end of last year
1161 */
1162 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1164 /*
1165 * This year is a leap year if it is divisible by 4 except when it is
1166 * divisible by 100 unless it is divisible by 400
1168 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1169 */
1170 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1172 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1173 tm->tm_mday;
1175 tm->tm_wday = day % 7;
1178 static void to_tm(int tim, struct rtc_time *tm)
1180 register int i;
1181 register long hms, day;
1183 day = tim / SECDAY;
1184 hms = tim % SECDAY;
1186 /* Hours, minutes, seconds are easy */
1187 tm->tm_hour = hms / 3600;
1188 tm->tm_min = (hms % 3600) / 60;
1189 tm->tm_sec = (hms % 3600) % 60;
1191 /* Number of years in days */
1192 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1193 day -= days_in_year(i);
1194 tm->tm_year = i;
1196 /* Number of months in days left */
1197 if (leapyear(tm->tm_year))
1198 days_in_month(FEBRUARY) = 29;
1199 for (i = 1; day >= days_in_month(i); i++)
1200 day -= days_in_month(i);
1201 days_in_month(FEBRUARY) = 28;
1202 tm->tm_mon = i;
1204 /* Days are what is left over (+1) from all that. */
1205 tm->tm_mday = day + 1;
1207 /*
1208 * Determine the day of week
1209 */
1210 GregorianDay(tm);
1213 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1214 * aka Unix time. So we have to convert to/from rtc_time.
1215 */
1216 static inline void mini_get_rtc_time(struct rtc_time *time)
1218 unsigned long flags;
1219 u32 seconds;
1221 spin_lock_irqsave(&rtc_lock, flags);
1222 seconds = 0;
1223 if (this_is_starfire)
1224 seconds = starfire_get_time();
1225 else if (tlb_type == hypervisor)
1226 seconds = hypervisor_get_time();
1227 spin_unlock_irqrestore(&rtc_lock, flags);
1229 to_tm(seconds, time);
1230 time->tm_year -= 1900;
1231 time->tm_mon -= 1;
1234 static inline int mini_set_rtc_time(struct rtc_time *time)
1236 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1237 time->tm_mday, time->tm_hour,
1238 time->tm_min, time->tm_sec);
1239 unsigned long flags;
1240 int err;
1242 spin_lock_irqsave(&rtc_lock, flags);
1243 err = -ENODEV;
1244 if (this_is_starfire)
1245 err = starfire_set_time(seconds);
1246 else if (tlb_type == hypervisor)
1247 err = hypervisor_set_time(seconds);
1248 spin_unlock_irqrestore(&rtc_lock, flags);
1250 return err;
1253 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1254 unsigned int cmd, unsigned long arg)
1256 struct rtc_time wtime;
1257 void __user *argp = (void __user *)arg;
1259 switch (cmd) {
1261 case RTC_PLL_GET:
1262 return -EINVAL;
1264 case RTC_PLL_SET:
1265 return -EINVAL;
1267 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1268 return 0;
1270 case RTC_UIE_ON: /* enable ints for RTC updates. */
1271 return -EINVAL;
1273 case RTC_RD_TIME: /* Read the time/date from RTC */
1274 /* this doesn't get week-day, who cares */
1275 memset(&wtime, 0, sizeof(wtime));
1276 mini_get_rtc_time(&wtime);
1278 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1280 case RTC_SET_TIME: /* Set the RTC */
1282 int year;
1283 unsigned char leap_yr;
1285 if (!capable(CAP_SYS_TIME))
1286 return -EACCES;
1288 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1289 return -EFAULT;
1291 year = wtime.tm_year + 1900;
1292 leap_yr = ((!(year % 4) && (year % 100)) ||
1293 !(year % 400));
1295 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1))
1296 return -EINVAL;
1298 if (wtime.tm_mday < 0 || wtime.tm_mday >
1299 (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
1300 return -EINVAL;
1302 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1303 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1304 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1305 return -EINVAL;
1307 return mini_set_rtc_time(&wtime);
1311 return -EINVAL;
1314 static int mini_rtc_open(struct inode *inode, struct file *file)
1316 if (mini_rtc_status & RTC_IS_OPEN)
1317 return -EBUSY;
1319 mini_rtc_status |= RTC_IS_OPEN;
1321 return 0;
1324 static int mini_rtc_release(struct inode *inode, struct file *file)
1326 mini_rtc_status &= ~RTC_IS_OPEN;
1327 return 0;
1331 static struct file_operations mini_rtc_fops = {
1332 .owner = THIS_MODULE,
1333 .ioctl = mini_rtc_ioctl,
1334 .open = mini_rtc_open,
1335 .release = mini_rtc_release,
1336 };
1338 static struct miscdevice rtc_mini_dev =
1340 .minor = RTC_MINOR,
1341 .name = "rtc",
1342 .fops = &mini_rtc_fops,
1343 };
1345 static int __init rtc_mini_init(void)
1347 int retval;
1349 if (tlb_type != hypervisor && !this_is_starfire)
1350 return -ENODEV;
1352 printk(KERN_INFO "Mini RTC Driver\n");
1354 retval = misc_register(&rtc_mini_dev);
1355 if (retval < 0)
1356 return retval;
1358 return 0;
1361 static void __exit rtc_mini_exit(void)
1363 misc_deregister(&rtc_mini_dev);
1367 module_init(rtc_mini_init);
1368 module_exit(rtc_mini_exit);