ia64/linux-2.6.18-xen.hg

view arch/mips/pci/ops-titan.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
line source
1 /*
2 * Copyright 2003 PMC-Sierra
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
29 #include <asm/pci.h>
30 #include <asm/io.h>
31 #include <asm/rm9k-ocd.h>
33 /*
34 * PCI specific defines
35 */
36 #define TITAN_PCI_0_CONFIG_ADDRESS 0x780
37 #define TITAN_PCI_0_CONFIG_DATA 0x784
39 /*
40 * Titan PCI Config Read Byte
41 */
42 static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
43 int size, u32 * val)
44 {
45 uint32_t address, tmp;
46 int dev, busno, func;
48 busno = bus->number;
49 dev = PCI_SLOT(devfn);
50 func = PCI_FUNC(devfn);
52 address = (busno << 16) | (dev << 11) | (func << 8) |
53 (reg & 0xfc) | 0x80000000;
56 /* start the configuration cycle */
57 ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
58 tmp = ocd_readl(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);
60 switch (size) {
61 case 1:
62 tmp &= 0xff;
63 case 2:
64 tmp &= 0xffff;
65 }
66 *val = tmp;
68 return PCIBIOS_SUCCESSFUL;
69 }
71 static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
72 int size, u32 val)
73 {
74 uint32_t address;
75 int dev, busno, func;
77 busno = bus->number;
78 dev = PCI_SLOT(devfn);
79 func = PCI_FUNC(devfn);
81 address = (busno << 16) | (dev << 11) | (func << 8) |
82 (reg & 0xfc) | 0x80000000;
84 /* start the configuration cycle */
85 ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
87 /* write the data */
88 switch (size) {
89 case 1:
90 ocd_writeb(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3));
91 break;
93 case 2:
94 ocd_writew(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2));
95 break;
97 case 4:
98 ocd_writel(val, TITAN_PCI_0_CONFIG_DATA);
99 break;
100 }
102 return PCIBIOS_SUCCESSFUL;
103 }
105 /*
106 * Titan PCI structure
107 */
108 struct pci_ops titan_pci_ops = {
109 titan_read_config,
110 titan_write_config,
111 };