view arch/mips/pci/fixup-wrppmc.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
line source
1 /*
2 * fixup-wrppmc.c: PPMC board specific PCI fixup
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2006, Wind River Inc. Rongkai.zhan (rongkai.zhan@windriver.com)
9 */
10 #include <linux/init.h>
11 #include <linux/pci.h>
12 #include <asm/gt64120.h>
14 /* PCI interrupt pins */
15 #define PCI_INTA 1
16 #define PCI_INTB 2
17 #define PCI_INTC 3
18 #define PCI_INTD 4
20 #define PCI_SLOT_MAXNR 32 /* Each PCI bus has 32 physical slots */
22 static char pci_irq_tab[PCI_SLOT_MAXNR][5] __initdata = {
24 [0] = {0, 0, 0, 0, 0}, /* Slot 0: GT64120 PCI bridge */
25 [6] = {0, WRPPMC_PCI_INTA_IRQ, 0, 0, 0},
26 };
28 int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
29 {
30 return pci_irq_tab[slot][pin];
31 }
33 /* Do platform specific device initialization at pci_enable_device() time */
34 int pcibios_plat_dev_init(struct pci_dev *dev)
35 {
36 return 0;
37 }