view arch/alpha/kernel/ns87312.c @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
line source
1 /*
2 * linux/arch/alpha/kernel/ns87312.c
3 */
5 #include <linux/init.h>
6 #include <asm/io.h>
7 #include "proto.h"
10 /*
11 * The SRM console *disables* the IDE interface, this code ensures it's
12 * enabled.
13 *
14 * This code bangs on a control register of the 87312 Super I/O chip
15 * that implements parallel port/serial ports/IDE/FDI. Depending on
16 * the motherboard, the Super I/O chip can be configured through a
17 * pair of registers that are located either at I/O ports 0x26e/0x26f
18 * or 0x398/0x399. Unfortunately, autodetecting which base address is
19 * in use works only once (right after a reset). The Super I/O chip
20 * has the additional quirk that configuration register data must be
21 * written twice (I believe this is a safety feature to prevent
22 * accidental modification---fun, isn't it?).
23 */
25 void __init
26 ns87312_enable_ide(long ide_base)
27 {
28 int data;
29 unsigned long flags;
31 local_irq_save(flags);
32 outb(0, ide_base); /* set the index register for reg #0 */
33 data = inb(ide_base+1); /* read the current contents */
34 outb(0, ide_base); /* set the index register for reg #0 */
35 outb(data | 0x40, ide_base+1); /* turn on IDE */
36 outb(data | 0x40, ide_base+1); /* turn on IDE, really! */
37 local_irq_restore(flags);
38 }