ia64/linux-2.6.18-xen.hg

annotate drivers/char/ser_a2232fw.ax @ 893:f994bfe9b93b

linux/blktap2: reduce TLB flush scope

c/s 885 added very coarse TLB flushing. Since these flushes always
follow single page updates, single page flushes (when available) are
sufficient.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jun 04 10:32:57 2009 +0100 (2009-06-04)
parents 831230e53067
children
rev   line source
ian@0 1 ;.lib "axm"
ian@0 2 ;
ian@0 3 ;begin
ian@0 4 ;title "A2232 serial board driver"
ian@0 5 ;
ian@0 6 ;set modules "2232"
ian@0 7 ;set executable "2232.bin"
ian@0 8 ;
ian@0 9 ;;;;set nolink
ian@0 10 ;
ian@0 11 ;set temporary directory "t:"
ian@0 12 ;
ian@0 13 ;set assembly options "-m6502 -l60:t:list"
ian@0 14 ;set link options "bin"; loadadr"
ian@0 15 ;;;bin2c 2232.bin msc6502.h msc6502code
ian@0 16 ;end
ian@0 17 ;
ian@0 18 ;
ian@0 19 ; ### Commodore A2232 serial board driver for NetBSD by JM v1.3 ###
ian@0 20 ;
ian@0 21 ; - Created 950501 by JM -
ian@0 22 ;
ian@0 23 ;
ian@0 24 ; Serial board driver software.
ian@0 25 ;
ian@0 26 ;
ian@0 27 % Copyright (c) 1995 Jukka Marin <jmarin@jmp.fi>.
ian@0 28 % All rights reserved.
ian@0 29 %
ian@0 30 % Redistribution and use in source and binary forms, with or without
ian@0 31 % modification, are permitted provided that the following conditions
ian@0 32 % are met:
ian@0 33 % 1. Redistributions of source code must retain the above copyright
ian@0 34 % notice, and the entire permission notice in its entirety,
ian@0 35 % including the disclaimer of warranties.
ian@0 36 % 2. Redistributions in binary form must reproduce the above copyright
ian@0 37 % notice, this list of conditions and the following disclaimer in the
ian@0 38 % documentation and/or other materials provided with the distribution.
ian@0 39 % 3. The name of the author may not be used to endorse or promote
ian@0 40 % products derived from this software without specific prior
ian@0 41 % written permission.
ian@0 42 %
ian@0 43 % ALTERNATIVELY, this product may be distributed under the terms of
ian@0 44 % the GNU General Public License, in which case the provisions of the
ian@0 45 % GPL are required INSTEAD OF the above restrictions. (This clause is
ian@0 46 % necessary due to a potential bad interaction between the GPL and
ian@0 47 % the restrictions contained in a BSD-style copyright.)
ian@0 48 %
ian@0 49 % THIS SOFTWARE IS PROVIDED `AS IS'' AND ANY EXPRESS OR IMPLIED
ian@0 50 % WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
ian@0 51 % OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ian@0 52 % DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
ian@0 53 % INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
ian@0 54 % (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ian@0 55 % SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
ian@0 56 % HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
ian@0 57 % STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ian@0 58 % ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
ian@0 59 % OF THE POSSIBILITY OF SUCH DAMAGE.
ian@0 60 ;
ian@0 61 ;
ian@0 62 ; Bugs:
ian@0 63 ;
ian@0 64 ; - Can't send a break yet
ian@0 65 ;
ian@0 66 ;
ian@0 67 ;
ian@0 68 ; Edited:
ian@0 69 ;
ian@0 70 ; - 950501 by JM -> v0.1 - Created this file.
ian@0 71 ; - 951029 by JM -> v1.3 - Carrier Detect events now queued in a separate
ian@0 72 ; queue.
ian@0 73 ;
ian@0 74 ;
ian@0 75
ian@0 76
ian@0 77 CODE equ $3800 ; start address for program code
ian@0 78
ian@0 79
ian@0 80 CTL_CHAR equ $00 ; byte in ibuf is a character
ian@0 81 CTL_EVENT equ $01 ; byte in ibuf is an event
ian@0 82
ian@0 83 EVENT_BREAK equ $01
ian@0 84 EVENT_CDON equ $02
ian@0 85 EVENT_CDOFF equ $03
ian@0 86 EVENT_SYNC equ $04
ian@0 87
ian@0 88 XON equ $11
ian@0 89 XOFF equ $13
ian@0 90
ian@0 91
ian@0 92 VARBASE macro *starting_address ; was VARINIT
ian@0 93 _varbase set \1
ian@0 94 endm
ian@0 95
ian@0 96 VARDEF macro *name space_needs
ian@0 97 \1 equ _varbase
ian@0 98 _varbase set _varbase+\2
ian@0 99 endm
ian@0 100
ian@0 101
ian@0 102 stz macro * address
ian@0 103 db $64,\1
ian@0 104 endm
ian@0 105
ian@0 106 stzax macro * address
ian@0 107 db $9e,<\1,>\1
ian@0 108 endm
ian@0 109
ian@0 110
ian@0 111 biti macro * immediate value
ian@0 112 db $89,\1
ian@0 113 endm
ian@0 114
ian@0 115 smb0 macro * address
ian@0 116 db $87,\1
ian@0 117 endm
ian@0 118 smb1 macro * address
ian@0 119 db $97,\1
ian@0 120 endm
ian@0 121 smb2 macro * address
ian@0 122 db $a7,\1
ian@0 123 endm
ian@0 124 smb3 macro * address
ian@0 125 db $b7,\1
ian@0 126 endm
ian@0 127 smb4 macro * address
ian@0 128 db $c7,\1
ian@0 129 endm
ian@0 130 smb5 macro * address
ian@0 131 db $d7,\1
ian@0 132 endm
ian@0 133 smb6 macro * address
ian@0 134 db $e7,\1
ian@0 135 endm
ian@0 136 smb7 macro * address
ian@0 137 db $f7,\1
ian@0 138 endm
ian@0 139
ian@0 140
ian@0 141
ian@0 142 ;-----------------------------------------------------------------------;
ian@0 143 ; ;
ian@0 144 ; stuff common for all ports, non-critical (run once / loop) ;
ian@0 145 ; ;
ian@0 146 DO_SLOW macro * port_number ;
ian@0 147 .local ; ;
ian@0 148 lda CIA+C_PA ; check all CD inputs ;
ian@0 149 cmp CommonCDo ; changed from previous accptd? ;
ian@0 150 beq =over ; nope, do nothing else here ;
ian@0 151 ; ;
ian@0 152 cmp CommonCDb ; bouncing? ;
ian@0 153 beq =nobounce ; nope -> ;
ian@0 154 ; ;
ian@0 155 sta CommonCDb ; save current state ;
ian@0 156 lda #64 ; reinitialize counter ;
ian@0 157 sta CommonCDc ; ;
ian@0 158 jmp =over ; skip CD save ;
ian@0 159 ; ;
ian@0 160 =nobounce dec CommonCDc ; no, decrement bounce counter ;
ian@0 161 bpl =over ; not done yet, so skip CD save ;
ian@0 162 ; ;
ian@0 163 =saveCD ldx CDHead ; get write index ;
ian@0 164 sta cdbuf,x ; save status in buffer ;
ian@0 165 inx ; ;
ian@0 166 cpx CDTail ; buffer full? ;
ian@0 167 .if ne ; no: preserve status: ;
ian@0 168 stx CDHead ; update index in RAM ;
ian@0 169 sta CommonCDo ; save state for the next check ;
ian@0 170 .end ; ;
ian@0 171 =over .end local ;
ian@0 172 endm ;
ian@0 173 ;
ian@0 174 ;-----------------------------------------------------------------------;
ian@0 175
ian@0 176
ian@0 177 ; port specific stuff (no data transfer)
ian@0 178
ian@0 179 DO_PORT macro * port_number
ian@0 180 .local ; ;
ian@0 181 lda SetUp\1 ; reconfiguration request? ;
ian@0 182 .if ne ; yes: ;
ian@0 183 lda SoftFlow\1 ; get XON/XOFF flag ;
ian@0 184 sta XonOff\1 ; save it ;
ian@0 185 lda Param\1 ; get parameter ;
ian@0 186 ora #%00010000 ; use baud generator for Rx ;
ian@0 187 sta ACIA\1+A_CTRL ; store in control register ;
ian@0 188 stz OutDisable\1 ; enable transmit output ;
ian@0 189 stz SetUp\1 ; no reconfiguration no more ;
ian@0 190 .end ; ;
ian@0 191 ; ;
ian@0 192 lda InHead\1 ; get write index ;
ian@0 193 sbc InTail\1 ; buffer full soon? ;
ian@0 194 cmp #200 ; 200 chars or more in buffer? ;
ian@0 195 lda Command\1 ; get Command reg value ;
ian@0 196 and #%11110011 ; turn RTS OFF by default ;
ian@0 197 .if cc ; still room in buffer: ;
ian@0 198 ora #%00001000 ; turn RTS ON ;
ian@0 199 .end ; ;
ian@0 200 sta ACIA\1+A_CMD ; set/clear RTS ;
ian@0 201 ; ;
ian@0 202 lda OutFlush\1 ; request to flush output buffer;
ian@0 203 .if ne ; yessh! ;
ian@0 204 lda OutHead\1 ; get head ;
ian@0 205 sta OutTail\1 ; save as tail ;
ian@0 206 stz OutDisable\1 ; enable transmit output ;
ian@0 207 stz OutFlush\1 ; clear request ;
ian@0 208 .end
ian@0 209 .end local
ian@0 210 endm
ian@0 211
ian@0 212
ian@0 213 DO_DATA macro * port number
ian@0 214 .local
ian@0 215 lda ACIA\1+A_SR ; read ACIA status register ;
ian@0 216 biti [1<<3] ; something received? ;
ian@0 217 .if ne ; yes: ;
ian@0 218 biti [1<<1] ; framing error? ;
ian@0 219 .if ne ; yes: ;
ian@0 220 lda ACIA\1+A_DATA ; read received character ;
ian@0 221 bne =SEND ; not break -> ignore it ;
ian@0 222 ldx InHead\1 ; get write pointer ;
ian@0 223 lda #CTL_EVENT ; get type of byte ;
ian@0 224 sta ictl\1,x ; save it in InCtl buffer ;
ian@0 225 lda #EVENT_BREAK ; event code ;
ian@0 226 sta ibuf\1,x ; save it as well ;
ian@0 227 inx ; ;
ian@0 228 cpx InTail\1 ; still room in buffer? ;
ian@0 229 .if ne ; absolutely: ;
ian@0 230 stx InHead\1 ; update index in memory ;
ian@0 231 .end ; ;
ian@0 232 jmp =SEND ; go check if anything to send ;
ian@0 233 .end ; ;
ian@0 234 ; normal char received: ;
ian@0 235 ldx InHead\1 ; get write index ;
ian@0 236 lda ACIA\1+A_DATA ; read received character ;
ian@0 237 sta ibuf\1,x ; save char in buffer ;
ian@0 238 stzax ictl\1 ; set type to CTL_CHAR ;
ian@0 239 inx ; ;
ian@0 240 cpx InTail\1 ; buffer full? ;
ian@0 241 .if ne ; no: preserve character: ;
ian@0 242 stx InHead\1 ; update index in RAM ;
ian@0 243 .end ; ;
ian@0 244 and #$7f ; mask off parity if any ;
ian@0 245 cmp #XOFF ; XOFF from remote host? ;
ian@0 246 .if eq ; yes: ;
ian@0 247 lda XonOff\1 ; if XON/XOFF handshaking.. ;
ian@0 248 sta OutDisable\1 ; ..disable transmitter ;
ian@0 249 .end ; ;
ian@0 250 .end ; ;
ian@0 251 ; ;
ian@0 252 ; BUFFER FULL CHECK WAS HERE ;
ian@0 253 ; ;
ian@0 254 =SEND lda ACIA\1+A_SR ; transmit register empty? ;
ian@0 255 and #[1<<4] ; ;
ian@0 256 .if ne ; yes: ;
ian@0 257 ldx OutCtrl\1 ; sending out XON/XOFF? ;
ian@0 258 .if ne ; yes: ;
ian@0 259 lda CIA+C_PB ; check CTS signal ;
ian@0 260 and #[1<<\1] ; (for this port only) ;
ian@0 261 bne =DONE ; not allowed to send -> done ;
ian@0 262 stx ACIA\1+A_DATA ; transmit control char ;
ian@0 263 stz OutCtrl\1 ; clear flag ;
ian@0 264 jmp =DONE ; and we're done ;
ian@0 265 .end ; ;
ian@0 266 ; ;
ian@0 267 ldx OutTail\1 ; anything to transmit? ;
ian@0 268 cpx OutHead\1 ; ;
ian@0 269 .if ne ; yes: ;
ian@0 270 lda OutDisable\1 ; allowed to transmit? ;
ian@0 271 .if eq ; yes: ;
ian@0 272 lda CIA+C_PB ; check CTS signal ;
ian@0 273 and #[1<<\1] ; (for this port only) ;
ian@0 274 bne =DONE ; not allowed to send -> done ;
ian@0 275 lda obuf\1,x ; get a char from buffer ;
ian@0 276 sta ACIA\1+A_DATA ; send it away ;
ian@0 277 inc OutTail\1 ; update read index ;
ian@0 278 .end ; ;
ian@0 279 .end ; ;
ian@0 280 .end ; ;
ian@0 281 =DONE .end local
ian@0 282 endm
ian@0 283
ian@0 284
ian@0 285
ian@0 286 PORTVAR macro * port number
ian@0 287 VARDEF InHead\1 1
ian@0 288 VARDEF InTail\1 1
ian@0 289 VARDEF OutDisable\1 1
ian@0 290 VARDEF OutHead\1 1
ian@0 291 VARDEF OutTail\1 1
ian@0 292 VARDEF OutCtrl\1 1
ian@0 293 VARDEF OutFlush\1 1
ian@0 294 VARDEF SetUp\1 1
ian@0 295 VARDEF Param\1 1
ian@0 296 VARDEF Command\1 1
ian@0 297 VARDEF SoftFlow\1 1
ian@0 298 ; private:
ian@0 299 VARDEF XonOff\1 1
ian@0 300 endm
ian@0 301
ian@0 302
ian@0 303 VARBASE 0 ; start variables at address $0000
ian@0 304 PORTVAR 0 ; define variables for port 0
ian@0 305 PORTVAR 1 ; define variables for port 1
ian@0 306 PORTVAR 2 ; define variables for port 2
ian@0 307 PORTVAR 3 ; define variables for port 3
ian@0 308 PORTVAR 4 ; define variables for port 4
ian@0 309 PORTVAR 5 ; define variables for port 5
ian@0 310 PORTVAR 6 ; define variables for port 6
ian@0 311
ian@0 312
ian@0 313
ian@0 314 VARDEF Crystal 1 ; 0 = unknown, 1 = normal, 2 = turbo
ian@0 315 VARDEF Pad_a 1
ian@0 316 VARDEF TimerH 1
ian@0 317 VARDEF TimerL 1
ian@0 318 VARDEF CDHead 1
ian@0 319 VARDEF CDTail 1
ian@0 320 VARDEF CDStatus 1
ian@0 321 VARDEF Pad_b 1
ian@0 322
ian@0 323 VARDEF CommonCDo 1 ; for carrier detect optimization
ian@0 324 VARDEF CommonCDc 1 ; for carrier detect debouncing
ian@0 325 VARDEF CommonCDb 1 ; for carrier detect debouncing
ian@0 326
ian@0 327
ian@0 328 VARBASE $0200
ian@0 329 VARDEF obuf0 256 ; output data (characters only)
ian@0 330 VARDEF obuf1 256
ian@0 331 VARDEF obuf2 256
ian@0 332 VARDEF obuf3 256
ian@0 333 VARDEF obuf4 256
ian@0 334 VARDEF obuf5 256
ian@0 335 VARDEF obuf6 256
ian@0 336
ian@0 337 VARDEF ibuf0 256 ; input data (characters, events etc - see ictl)
ian@0 338 VARDEF ibuf1 256
ian@0 339 VARDEF ibuf2 256
ian@0 340 VARDEF ibuf3 256
ian@0 341 VARDEF ibuf4 256
ian@0 342 VARDEF ibuf5 256
ian@0 343 VARDEF ibuf6 256
ian@0 344
ian@0 345 VARDEF ictl0 256 ; input control information (type of data in ibuf)
ian@0 346 VARDEF ictl1 256
ian@0 347 VARDEF ictl2 256
ian@0 348 VARDEF ictl3 256
ian@0 349 VARDEF ictl4 256
ian@0 350 VARDEF ictl5 256
ian@0 351 VARDEF ictl6 256
ian@0 352
ian@0 353 VARDEF cdbuf 256 ; CD event queue
ian@0 354
ian@0 355
ian@0 356 ACIA0 equ $4400
ian@0 357 ACIA1 equ $4c00
ian@0 358 ACIA2 equ $5400
ian@0 359 ACIA3 equ $5c00
ian@0 360 ACIA4 equ $6400
ian@0 361 ACIA5 equ $6c00
ian@0 362 ACIA6 equ $7400
ian@0 363
ian@0 364 A_DATA equ $00
ian@0 365 A_SR equ $02
ian@0 366 A_CMD equ $04
ian@0 367 A_CTRL equ $06
ian@0 368 ; 00 write transmit data read received data
ian@0 369 ; 02 reset ACIA read status register
ian@0 370 ; 04 write command register read command register
ian@0 371 ; 06 write control register read control register
ian@0 372
ian@0 373 CIA equ $7c00 ; 8520 CIA
ian@0 374 C_PA equ $00 ; port A data register
ian@0 375 C_PB equ $02 ; port B data register
ian@0 376 C_DDRA equ $04 ; data direction register for port A
ian@0 377 C_DDRB equ $06 ; data direction register for port B
ian@0 378 C_TAL equ $08 ; timer A
ian@0 379 C_TAH equ $0a
ian@0 380 C_TBL equ $0c ; timer B
ian@0 381 C_TBH equ $0e
ian@0 382 C_TODL equ $10 ; TOD LSB
ian@0 383 C_TODM equ $12 ; TOD middle byte
ian@0 384 C_TODH equ $14 ; TOD MSB
ian@0 385 C_DATA equ $18 ; serial data register
ian@0 386 C_INTCTRL equ $1a ; interrupt control register
ian@0 387 C_CTRLA equ $1c ; control register A
ian@0 388 C_CTRLB equ $1e ; control register B
ian@0 389
ian@0 390
ian@0 391
ian@0 392
ian@0 393
ian@0 394 section main,code,CODE-2
ian@0 395
ian@0 396 db >CODE,<CODE
ian@0 397
ian@0 398 ;-----------------------------------------------------------------------;
ian@0 399 ; here's the initialization code: ;
ian@0 400 ; ;
ian@0 401 R_RESET ldx #$ff ;
ian@0 402 txs ; initialize stack pointer ;
ian@0 403 cld ; in case a 6502 is used... ;
ian@0 404 ldx #0 ; ;
ian@0 405 lda #0 ; ;
ian@0 406 ldy #Crystal ; this many bytes to clear ;
ian@0 407 clr_loop sta 0,x ; clear zero page variables ;
ian@0 408 inx ; ;
ian@0 409 dey ; ;
ian@0 410 bne clr_loop ; ;
ian@0 411 ; ;
ian@0 412 stz CommonCDo ; force CD test at boot ;
ian@0 413 stz CommonCDb ; ;
ian@0 414 stz CDHead ; clear queue ;
ian@0 415 stz CDTail ; ;
ian@0 416 ; ;
ian@0 417 lda #0 ; ;
ian@0 418 sta Pad_a ; ;
ian@0 419 lda #170 ; test cmp ;
ian@0 420 cmp #100 ; ;
ian@0 421 .if cs ; ;
ian@0 422 inc Pad_a ; C was set ;
ian@0 423 .end ; ;
ian@0 424 ;
ian@0 425 ;-----------------------------------------------------------------------;
ian@0 426 ; Speed check ;
ian@0 427 ;-----------------------------------------------------------------------;
ian@0 428 ;
ian@0 429 lda Crystal ; speed already set? ;
ian@0 430 beq DoSpeedy ; ;
ian@0 431 jmp LOOP ; yes, skip speed test ;
ian@0 432 ; ;
ian@0 433 DoSpeedy lda #%10011000 ; 8N1, 1200/2400 bps ;
ian@0 434 sta ACIA0+A_CTRL ; ;
ian@0 435 lda #%00001011 ; enable DTR ;
ian@0 436 sta ACIA0+A_CMD ; ;
ian@0 437 lda ACIA0+A_SR ; read status register ;
ian@0 438 ; ;
ian@0 439 lda #%10000000 ; disable all ints (unnecessary);
ian@0 440 sta CIA+C_INTCTRL ; ;
ian@0 441 lda #255 ; program the timer ;
ian@0 442 sta CIA+C_TAL ; ;
ian@0 443 sta CIA+C_TAH ; ;
ian@0 444 ; ;
ian@0 445 ldx #0 ; ;
ian@0 446 stx ACIA0+A_DATA ; transmit a zero ;
ian@0 447 nop ; ;
ian@0 448 nop ; ;
ian@0 449 lda ACIA0+A_SR ; read status ;
ian@0 450 nop ; ;
ian@0 451 nop ; ;
ian@0 452 stx ACIA0+A_DATA ; transmit a zero ;
ian@0 453 Speedy1 lda ACIA0+A_SR ; read status ;
ian@0 454 and #[1<<4] ; transmit data reg empty? ;
ian@0 455 beq Speedy1 ; not yet, wait more ;
ian@0 456 ; ;
ian@0 457 lda #%00010001 ; load & start the timer ;
ian@0 458 stx ACIA0+A_DATA ; transmit one more zero ;
ian@0 459 sta CIA+C_CTRLA ; ;
ian@0 460 Speedy2 lda ACIA0+A_SR ; read status ;
ian@0 461 and #[1<<4] ; transmit data reg empty? ;
ian@0 462 beq Speedy2 ; not yet, wait more ;
ian@0 463 stx CIA+C_CTRLA ; stop the timer ;
ian@0 464 ; ;
ian@0 465 lda CIA+C_TAL ; copy timer value for 68k ;
ian@0 466 sta TimerL ; ;
ian@0 467 lda CIA+C_TAH ; ;
ian@0 468 sta TimerH ; ;
ian@0 469 cmp #$d0 ; turbo or normal? ;
ian@0 470 .if cs ; ;
ian@0 471 lda #2 ; turbo! :-) ;
ian@0 472 .else ; ;
ian@0 473 lda #1 ; normal :-( ;
ian@0 474 .end ; ;
ian@0 475 sta Crystal ; ;
ian@0 476 lda #0 ; ;
ian@0 477 sta ACIA0+A_SR ; ;
ian@0 478 sta ACIA0+A_CTRL ; reset UART ;
ian@0 479 sta ACIA0+A_CMD ; ;
ian@0 480 ;
ian@0 481 jmp LOOP ;
ian@0 482 ;
ian@0 483 ; ;
ian@0 484 ;-----------------------------------------------------------------------;
ian@0 485 ; ;
ian@0 486 ; The Real Thing: ;
ian@0 487 ; ;
ian@0 488 LOOP DO_SLOW ; do non-critical things ;
ian@0 489 jsr do_input ; check for received data
ian@0 490 DO_PORT 0
ian@0 491 jsr do_input
ian@0 492 DO_PORT 1
ian@0 493 jsr do_input
ian@0 494 DO_PORT 2
ian@0 495 jsr do_input
ian@0 496 DO_PORT 3
ian@0 497 jsr do_input
ian@0 498 DO_PORT 4
ian@0 499 jsr do_input
ian@0 500 DO_PORT 5
ian@0 501 jsr do_input
ian@0 502 DO_PORT 6
ian@0 503 jsr do_input
ian@0 504 jmp LOOP
ian@0 505
ian@0 506
ian@0 507 do_input DO_DATA 0
ian@0 508 DO_DATA 1
ian@0 509 DO_DATA 2
ian@0 510 DO_DATA 3
ian@0 511 DO_DATA 4
ian@0 512 DO_DATA 5
ian@0 513 DO_DATA 6
ian@0 514 rts
ian@0 515
ian@0 516
ian@0 517 ;-----------------------------------------------------------------------;
ian@0 518 section vectors,data,$3ffa
ian@0 519 dw $d0d0
ian@0 520 dw R_RESET
ian@0 521 dw $c0ce
ian@0 522 ;-----------------------------------------------------------------------;
ian@0 523
ian@0 524
ian@0 525
ian@0 526 end
ian@0 527
ian@0 528
ian@0 529