ia64/linux-2.6.18-xen.hg

annotate drivers/char/rio/pci.h @ 893:f994bfe9b93b

linux/blktap2: reduce TLB flush scope

c/s 885 added very coarse TLB flushing. Since these flushes always
follow single page updates, single page flushes (when available) are
sufficient.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jun 04 10:32:57 2009 +0100 (2009-06-04)
parents 831230e53067
children
rev   line source
ian@0 1 /*
ian@0 2 ** -----------------------------------------------------------------------------
ian@0 3 **
ian@0 4 ** Perle Specialix driver for Linux
ian@0 5 ** Ported from existing RIO Driver for SCO sources.
ian@0 6 *
ian@0 7 * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
ian@0 8 *
ian@0 9 * This program is free software; you can redistribute it and/or modify
ian@0 10 * it under the terms of the GNU General Public License as published by
ian@0 11 * the Free Software Foundation; either version 2 of the License, or
ian@0 12 * (at your option) any later version.
ian@0 13 *
ian@0 14 * This program is distributed in the hope that it will be useful,
ian@0 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
ian@0 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
ian@0 17 * GNU General Public License for more details.
ian@0 18 *
ian@0 19 * You should have received a copy of the GNU General Public License
ian@0 20 * along with this program; if not, write to the Free Software
ian@0 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
ian@0 22 **
ian@0 23 ** Module : pci.h
ian@0 24 ** SID : 1.2
ian@0 25 ** Last Modified : 11/6/98 11:34:12
ian@0 26 ** Retrieved : 11/6/98 11:34:21
ian@0 27 **
ian@0 28 ** ident @(#)pci.h 1.2
ian@0 29 **
ian@0 30 ** -----------------------------------------------------------------------------
ian@0 31 */
ian@0 32
ian@0 33 #ifndef __rio_pci_h__
ian@0 34 #define __rio_pci_h__
ian@0 35
ian@0 36 #ifdef SCCS_LABELS
ian@0 37 static char *_pci_h_sccs_ = "@(#)pci.h 1.2";
ian@0 38 #endif
ian@0 39
ian@0 40 /*
ian@0 41 ** PCI stuff
ian@0 42 */
ian@0 43
ian@0 44 #define PCITpFastClock 0x80
ian@0 45 #define PCITpSlowClock 0x00
ian@0 46 #define PCITpFastLinks 0x40
ian@0 47 #define PCITpSlowLinks 0x00
ian@0 48 #define PCITpIntEnable 0x04
ian@0 49 #define PCITpIntDisable 0x00
ian@0 50 #define PCITpBusEnable 0x02
ian@0 51 #define PCITpBusDisable 0x00
ian@0 52 #define PCITpBootFromRam 0x01
ian@0 53 #define PCITpBootFromLink 0x00
ian@0 54
ian@0 55 #define RIO_PCI_VENDOR 0x11CB
ian@0 56 #define RIO_PCI_DEVICE 0x8000
ian@0 57 #define RIO_PCI_BASE_CLASS 0x02
ian@0 58 #define RIO_PCI_SUB_CLASS 0x80
ian@0 59 #define RIO_PCI_PROG_IFACE 0x00
ian@0 60
ian@0 61 #define RIO_PCI_RID 0x0008
ian@0 62 #define RIO_PCI_BADR0 0x0010
ian@0 63 #define RIO_PCI_INTLN 0x003C
ian@0 64 #define RIO_PCI_INTPIN 0x003D
ian@0 65
ian@0 66 #define RIO_PCI_MEM_SIZE 65536
ian@0 67
ian@0 68 #define RIO_PCI_TURBO_TP 0x80
ian@0 69 #define RIO_PCI_FAST_LINKS 0x40
ian@0 70 #define RIO_PCI_INT_ENABLE 0x04
ian@0 71 #define RIO_PCI_TP_BUS_ENABLE 0x02
ian@0 72 #define RIO_PCI_BOOT_FROM_RAM 0x01
ian@0 73
ian@0 74 #define RIO_PCI_DEFAULT_MODE 0x05
ian@0 75
ian@0 76 #endif /* __rio_pci_h__ */