ia64/linux-2.6.18-xen.hg

annotate include/linux/pci.h @ 790:77e3b255381e

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linux: remove xen specific member from pci_dev

Move msi related variable irq_old out of struct pci_dev. This is
logically more consistent and has the additional benefit that xen
kernel and vanilla kernel now have the same pci_dev layout

Signed-off-by: Qing He <qing.he@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Feb 04 12:25:09 2009 +0000 (2009-02-04)
parents 2fdc121e9b5d
children 36d8c23b7574
rev   line source
ian@0 1 /*
ian@0 2 * pci.h
ian@0 3 *
ian@0 4 * PCI defines and function prototypes
ian@0 5 * Copyright 1994, Drew Eckhardt
ian@0 6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
ian@0 7 *
ian@0 8 * For more information, please consult the following manuals (look at
ian@0 9 * http://www.pcisig.com/ for how to get them):
ian@0 10 *
ian@0 11 * PCI BIOS Specification
ian@0 12 * PCI Local Bus Specification
ian@0 13 * PCI to PCI Bridge Specification
ian@0 14 * PCI System Design Guide
ian@0 15 */
ian@0 16
ian@0 17 #ifndef LINUX_PCI_H
ian@0 18 #define LINUX_PCI_H
ian@0 19
ian@0 20 /* Include the pci register defines */
ian@0 21 #include <linux/pci_regs.h>
ian@0 22
ian@0 23 /* Include the ID list */
ian@0 24 #include <linux/pci_ids.h>
ian@0 25
ian@0 26 /*
ian@0 27 * The PCI interface treats multi-function devices as independent
ian@0 28 * devices. The slot/function address of each device is encoded
ian@0 29 * in a single byte as follows:
ian@0 30 *
ian@0 31 * 7:3 = slot
ian@0 32 * 2:0 = function
ian@0 33 */
ian@0 34 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
ian@0 35 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
ian@0 36 #define PCI_FUNC(devfn) ((devfn) & 0x07)
ian@0 37
ian@0 38 /* Ioctls for /proc/bus/pci/X/Y nodes. */
ian@0 39 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
ian@0 40 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
ian@0 41 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
ian@0 42 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
ian@0 43 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
ian@0 44
ian@0 45 #ifdef __KERNEL__
ian@0 46
ian@0 47 #include <linux/mod_devicetable.h>
ian@0 48
ian@0 49 #include <linux/types.h>
ian@0 50 #include <linux/ioport.h>
ian@0 51 #include <linux/list.h>
ian@0 52 #include <linux/errno.h>
ian@0 53 #include <linux/device.h>
ian@0 54
ian@0 55 /* File state for mmap()s on /proc/bus/pci/X/Y */
ian@0 56 enum pci_mmap_state {
ian@0 57 pci_mmap_io,
ian@0 58 pci_mmap_mem
ian@0 59 };
ian@0 60
ian@0 61 /* This defines the direction arg to the DMA mapping routines. */
ian@0 62 #define PCI_DMA_BIDIRECTIONAL 0
ian@0 63 #define PCI_DMA_TODEVICE 1
ian@0 64 #define PCI_DMA_FROMDEVICE 2
ian@0 65 #define PCI_DMA_NONE 3
ian@0 66
ian@0 67 #define DEVICE_COUNT_COMPATIBLE 4
ian@0 68 #define DEVICE_COUNT_RESOURCE 12
ian@0 69
ian@0 70 typedef int __bitwise pci_power_t;
ian@0 71
ian@0 72 #define PCI_D0 ((pci_power_t __force) 0)
ian@0 73 #define PCI_D1 ((pci_power_t __force) 1)
ian@0 74 #define PCI_D2 ((pci_power_t __force) 2)
ian@0 75 #define PCI_D3hot ((pci_power_t __force) 3)
ian@0 76 #define PCI_D3cold ((pci_power_t __force) 4)
ian@0 77 #define PCI_UNKNOWN ((pci_power_t __force) 5)
ian@0 78 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
ian@0 79
ian@0 80 /** The pci_channel state describes connectivity between the CPU and
ian@0 81 * the pci device. If some PCI bus between here and the pci device
ian@0 82 * has crashed or locked up, this info is reflected here.
ian@0 83 */
ian@0 84 typedef unsigned int __bitwise pci_channel_state_t;
ian@0 85
ian@0 86 enum pci_channel_state {
ian@0 87 /* I/O channel is in normal state */
ian@0 88 pci_channel_io_normal = (__force pci_channel_state_t) 1,
ian@0 89
ian@0 90 /* I/O to channel is blocked */
ian@0 91 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
ian@0 92
ian@0 93 /* PCI card is dead */
ian@0 94 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
ian@0 95 };
ian@0 96
ian@0 97 typedef unsigned short __bitwise pci_bus_flags_t;
ian@0 98 enum pci_bus_flags {
ian@0 99 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
ian@0 100 };
ian@0 101
ian@0 102 struct pci_cap_saved_state {
ian@0 103 struct hlist_node next;
ian@0 104 char cap_nr;
ian@0 105 u32 data[0];
ian@0 106 };
ian@0 107
ian@0 108 /*
ian@0 109 * The pci_dev structure is used to describe PCI devices.
ian@0 110 */
ian@0 111 struct pci_dev {
ian@0 112 struct list_head global_list; /* node in list of all PCI devices */
ian@0 113 struct list_head bus_list; /* node in per-bus list */
ian@0 114 struct pci_bus *bus; /* bus this device is on */
ian@0 115 struct pci_bus *subordinate; /* bus this device bridges to */
ian@0 116
ian@0 117 void *sysdata; /* hook for sys-specific extension */
ian@0 118 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
ian@0 119
ian@0 120 unsigned int devfn; /* encoded device & function index */
ian@0 121 unsigned short vendor;
ian@0 122 unsigned short device;
ian@0 123 unsigned short subsystem_vendor;
ian@0 124 unsigned short subsystem_device;
ian@0 125 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
ian@0 126 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
ian@0 127 u8 rom_base_reg; /* which config register controls the ROM */
ian@0 128 u8 pin; /* which interrupt pin this device uses */
ian@0 129
ian@0 130 struct pci_driver *driver; /* which driver has allocated this device */
ian@0 131 u64 dma_mask; /* Mask of the bits of bus address this
ian@0 132 device implements. Normally this is
ian@0 133 0xffffffff. You only need to change
ian@0 134 this if your device has broken DMA
ian@0 135 or supports 64-bit transfers. */
ian@0 136
ian@0 137 pci_power_t current_state; /* Current operating state. In ACPI-speak,
ian@0 138 this is D0-D3, D0 being fully functional,
ian@0 139 and D3 being off. */
ian@0 140
ian@0 141 pci_channel_state_t error_state; /* current connectivity state */
ian@0 142 struct device dev; /* Generic device interface */
ian@0 143
ian@0 144 /* device is compatible with these IDs */
ian@0 145 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
ian@0 146 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
ian@0 147
ian@0 148 int cfg_size; /* Size of configuration space */
ian@0 149
ian@0 150 /*
ian@0 151 * Instead of touching interrupt line and base address registers
ian@0 152 * directly, use the values stored here. They might be different!
ian@0 153 */
ian@0 154 unsigned int irq;
ian@0 155 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
ian@0 156
ian@0 157 /* These fields are used by common fixups */
ian@0 158 unsigned int transparent:1; /* Transparent PCI bridge */
ian@0 159 unsigned int multifunction:1;/* Part of multi-function device */
ian@0 160 /* keep track of device state */
ian@0 161 unsigned int is_enabled:1; /* pci_enable_device has been called */
ian@0 162 unsigned int is_busmaster:1; /* device is busmaster */
ian@0 163 unsigned int no_msi:1; /* device may not use msi */
ian@0 164 unsigned int no_d1d2:1; /* only allow d0 or d3 */
ian@0 165 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
ian@0 166 unsigned int broken_parity_status:1; /* Device generates false positive parity */
ian@0 167 unsigned int msi_enabled:1;
ian@0 168 unsigned int msix_enabled:1;
ian@0 169
ian@0 170 u32 saved_config_space[16]; /* config space saved at suspend time */
ian@0 171 struct hlist_head saved_cap_space;
ian@0 172 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
ian@0 173 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
ian@0 174 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
ian@0 175 };
ian@0 176
ian@0 177 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
ian@0 178 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
ian@0 179 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
ian@0 180 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
ian@0 181
ian@0 182 static inline struct pci_cap_saved_state *pci_find_saved_cap(
ian@0 183 struct pci_dev *pci_dev,char cap)
ian@0 184 {
ian@0 185 struct pci_cap_saved_state *tmp;
ian@0 186 struct hlist_node *pos;
ian@0 187
ian@0 188 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
ian@0 189 if (tmp->cap_nr == cap)
ian@0 190 return tmp;
ian@0 191 }
ian@0 192 return NULL;
ian@0 193 }
ian@0 194
ian@0 195 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
ian@0 196 struct pci_cap_saved_state *new_cap)
ian@0 197 {
ian@0 198 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
ian@0 199 }
ian@0 200
ian@0 201 static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
ian@0 202 {
ian@0 203 hlist_del(&cap->next);
ian@0 204 }
ian@0 205
ian@0 206 /*
ian@0 207 * For PCI devices, the region numbers are assigned this way:
ian@0 208 *
ian@0 209 * 0-5 standard PCI regions
ian@0 210 * 6 expansion ROM
ian@0 211 * 7-10 bridges: address space assigned to buses behind the bridge
ian@0 212 */
ian@0 213
ian@0 214 #define PCI_ROM_RESOURCE 6
ian@0 215 #define PCI_BRIDGE_RESOURCES 7
ian@0 216 #define PCI_NUM_RESOURCES 11
ian@0 217
ian@0 218 #ifndef PCI_BUS_NUM_RESOURCES
ian@0 219 #define PCI_BUS_NUM_RESOURCES 8
ian@0 220 #endif
ian@0 221
ian@0 222 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
ian@0 223
ian@0 224 struct pci_bus {
ian@0 225 struct list_head node; /* node in list of buses */
ian@0 226 struct pci_bus *parent; /* parent bus this bridge is on */
ian@0 227 struct list_head children; /* list of child buses */
ian@0 228 struct list_head devices; /* list of devices on this bus */
ian@0 229 struct pci_dev *self; /* bridge device as seen by parent */
ian@0 230 struct resource *resource[PCI_BUS_NUM_RESOURCES];
ian@0 231 /* address space routed to this bus */
ian@0 232
ian@0 233 struct pci_ops *ops; /* configuration access functions */
ian@0 234 void *sysdata; /* hook for sys-specific extension */
ian@0 235 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
ian@0 236
ian@0 237 unsigned char number; /* bus number */
ian@0 238 unsigned char primary; /* number of primary bridge */
ian@0 239 unsigned char secondary; /* number of secondary bridge */
ian@0 240 unsigned char subordinate; /* max number of subordinate buses */
ian@0 241
ian@0 242 char name[48];
ian@0 243
ian@0 244 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
ian@0 245 pci_bus_flags_t bus_flags; /* Inherited by child busses */
ian@0 246 struct device *bridge;
ian@0 247 struct class_device class_dev;
ian@0 248 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
ian@0 249 struct bin_attribute *legacy_mem; /* legacy mem */
ian@0 250 };
ian@0 251
ian@0 252 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
ian@0 253 #define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
ian@0 254
ian@0 255 /*
ian@0 256 * Error values that may be returned by PCI functions.
ian@0 257 */
ian@0 258 #define PCIBIOS_SUCCESSFUL 0x00
ian@0 259 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
ian@0 260 #define PCIBIOS_BAD_VENDOR_ID 0x83
ian@0 261 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
ian@0 262 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
ian@0 263 #define PCIBIOS_SET_FAILED 0x88
ian@0 264 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
ian@0 265
ian@0 266 /* Low-level architecture-dependent routines */
ian@0 267
ian@0 268 struct pci_ops {
ian@0 269 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
ian@0 270 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
ian@0 271 };
ian@0 272
ian@0 273 struct pci_raw_ops {
ian@0 274 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
ian@0 275 int reg, int len, u32 *val);
ian@0 276 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
ian@0 277 int reg, int len, u32 val);
ian@0 278 };
ian@0 279
ian@0 280 extern struct pci_raw_ops *raw_pci_ops;
ian@0 281
ian@0 282 struct pci_bus_region {
ian@0 283 unsigned long start;
ian@0 284 unsigned long end;
ian@0 285 };
ian@0 286
ian@0 287 struct pci_dynids {
ian@0 288 spinlock_t lock; /* protects list, index */
ian@0 289 struct list_head list; /* for IDs added at runtime */
ian@0 290 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
ian@0 291 };
ian@0 292
ian@0 293 /* ---------------------------------------------------------------- */
ian@0 294 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
ian@0 295 * a set fof callbacks in struct pci_error_handlers, then that device driver
ian@0 296 * will be notified of PCI bus errors, and will be driven to recovery
ian@0 297 * when an error occurs.
ian@0 298 */
ian@0 299
ian@0 300 typedef unsigned int __bitwise pci_ers_result_t;
ian@0 301
ian@0 302 enum pci_ers_result {
ian@0 303 /* no result/none/not supported in device driver */
ian@0 304 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
ian@0 305
ian@0 306 /* Device driver can recover without slot reset */
ian@0 307 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
ian@0 308
ian@0 309 /* Device driver wants slot to be reset. */
ian@0 310 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
ian@0 311
ian@0 312 /* Device has completely failed, is unrecoverable */
ian@0 313 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
ian@0 314
ian@0 315 /* Device driver is fully recovered and operational */
ian@0 316 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
ian@0 317 };
ian@0 318
ian@0 319 /* PCI bus error event callbacks */
ian@0 320 struct pci_error_handlers
ian@0 321 {
ian@0 322 /* PCI bus error detected on this device */
ian@0 323 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
ian@0 324 enum pci_channel_state error);
ian@0 325
ian@0 326 /* MMIO has been re-enabled, but not DMA */
ian@0 327 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
ian@0 328
ian@0 329 /* PCI Express link has been reset */
ian@0 330 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
ian@0 331
ian@0 332 /* PCI slot has been reset */
ian@0 333 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
ian@0 334
ian@0 335 /* Device driver may resume normal operations */
ian@0 336 void (*resume)(struct pci_dev *dev);
ian@0 337 };
ian@0 338
ian@0 339 /* ---------------------------------------------------------------- */
ian@0 340
ian@0 341 struct module;
ian@0 342 struct pci_driver {
ian@0 343 struct list_head node;
ian@0 344 char *name;
ian@0 345 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
ian@0 346 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
ian@0 347 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
ian@0 348 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
ian@0 349 int (*resume) (struct pci_dev *dev); /* Device woken up */
ian@0 350 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
ian@0 351 void (*shutdown) (struct pci_dev *dev);
ian@0 352
ian@0 353 struct pci_error_handlers *err_handler;
ian@0 354 struct device_driver driver;
ian@0 355 struct pci_dynids dynids;
ian@0 356 };
ian@0 357
ian@0 358 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
ian@0 359
ian@0 360 /**
ian@0 361 * PCI_DEVICE - macro used to describe a specific pci device
ian@0 362 * @vend: the 16 bit PCI Vendor ID
ian@0 363 * @dev: the 16 bit PCI Device ID
ian@0 364 *
ian@0 365 * This macro is used to create a struct pci_device_id that matches a
ian@0 366 * specific device. The subvendor and subdevice fields will be set to
ian@0 367 * PCI_ANY_ID.
ian@0 368 */
ian@0 369 #define PCI_DEVICE(vend,dev) \
ian@0 370 .vendor = (vend), .device = (dev), \
ian@0 371 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
ian@0 372
ian@0 373 /**
ian@0 374 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
ian@0 375 * @dev_class: the class, subclass, prog-if triple for this device
ian@0 376 * @dev_class_mask: the class mask for this device
ian@0 377 *
ian@0 378 * This macro is used to create a struct pci_device_id that matches a
ian@0 379 * specific PCI class. The vendor, device, subvendor, and subdevice
ian@0 380 * fields will be set to PCI_ANY_ID.
ian@0 381 */
ian@0 382 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
ian@0 383 .class = (dev_class), .class_mask = (dev_class_mask), \
ian@0 384 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
ian@0 385 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
ian@0 386
ian@0 387 /*
ian@0 388 * pci_module_init is obsolete, this stays here till we fix up all usages of it
ian@0 389 * in the tree.
ian@0 390 */
ian@0 391 #define pci_module_init pci_register_driver
ian@0 392
ian@0 393 /* these external functions are only available when PCI support is enabled */
ian@0 394 #ifdef CONFIG_PCI
ian@0 395
ian@0 396 extern struct bus_type pci_bus_type;
ian@0 397
ian@0 398 /* Do NOT directly access these two variables, unless you are arch specific pci
ian@0 399 * code, or pci core code. */
ian@0 400 extern struct list_head pci_root_buses; /* list of all known PCI buses */
ian@0 401 extern struct list_head pci_devices; /* list of all devices */
ian@0 402
ian@0 403 void pcibios_fixup_bus(struct pci_bus *);
ian@0 404 int pcibios_enable_device(struct pci_dev *, int mask);
ian@0 405 char *pcibios_setup (char *str);
ian@0 406
ian@0 407 /* Used only when drivers/pci/setup.c is used */
ian@0 408 void pcibios_align_resource(void *, struct resource *, resource_size_t,
ian@0 409 resource_size_t);
ian@0 410 void pcibios_update_irq(struct pci_dev *, int irq);
ian@0 411
ian@0 412 /* Generic PCI functions used internally */
ian@0 413
ian@0 414 extern struct pci_bus *pci_find_bus(int domain, int busnr);
ian@0 415 void pci_bus_add_devices(struct pci_bus *bus);
ian@0 416 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
ian@0 417 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
ian@0 418 {
ian@0 419 struct pci_bus *root_bus;
ian@0 420 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
ian@0 421 if (root_bus)
ian@0 422 pci_bus_add_devices(root_bus);
ian@0 423 return root_bus;
ian@0 424 }
ian@0 425 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
ian@0 426 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
ian@0 427 int pci_scan_slot(struct pci_bus *bus, int devfn);
ian@0 428 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
ian@0 429 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
ian@0 430 unsigned int pci_scan_child_bus(struct pci_bus *bus);
ian@0 431 void pci_bus_add_device(struct pci_dev *dev);
ian@0 432 void pci_read_bridge_bases(struct pci_bus *child);
ian@0 433 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
ian@0 434 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
ian@0 435 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
ian@0 436 extern void pci_dev_put(struct pci_dev *dev);
ian@0 437 extern void pci_remove_bus(struct pci_bus *b);
ian@0 438 extern void pci_remove_bus_device(struct pci_dev *dev);
ian@0 439 void pci_setup_cardbus(struct pci_bus *bus);
ian@0 440
ian@0 441 /* Generic PCI functions exported to card drivers */
ian@0 442
ian@0 443 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
ian@0 444 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
ian@0 445 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
ian@0 446 int pci_find_capability (struct pci_dev *dev, int cap);
ian@0 447 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
ian@0 448 int pci_find_ext_capability (struct pci_dev *dev, int cap);
ian@0 449 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
ian@0 450
ian@0 451 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
ian@0 452 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
ian@0 453 unsigned int ss_vendor, unsigned int ss_device,
ian@0 454 struct pci_dev *from);
ian@0 455 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
keir@735 456 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
ian@0 457 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
ian@0 458 int pci_dev_present(const struct pci_device_id *ids);
ian@0 459
ian@0 460 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
ian@0 461 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
ian@0 462 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
ian@0 463 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
ian@0 464 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
ian@0 465 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
ian@0 466
ian@0 467 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
ian@0 468 {
ian@0 469 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
ian@0 470 }
ian@0 471 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
ian@0 472 {
ian@0 473 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
ian@0 474 }
ian@0 475 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
ian@0 476 {
ian@0 477 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
ian@0 478 }
ian@0 479 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
ian@0 480 {
ian@0 481 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
ian@0 482 }
ian@0 483 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
ian@0 484 {
ian@0 485 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
ian@0 486 }
ian@0 487 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
ian@0 488 {
ian@0 489 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
ian@0 490 }
ian@0 491
ian@0 492 int pci_enable_device(struct pci_dev *dev);
ian@0 493 int pci_enable_device_bars(struct pci_dev *dev, int mask);
ian@0 494 void pci_disable_device(struct pci_dev *dev);
ian@0 495 void pci_set_master(struct pci_dev *dev);
ian@0 496 #define HAVE_PCI_SET_MWI
ian@0 497 int pci_set_mwi(struct pci_dev *dev);
ian@0 498 void pci_clear_mwi(struct pci_dev *dev);
ian@0 499 void pci_intx(struct pci_dev *dev, int enable);
ian@0 500 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
ian@0 501 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
ian@0 502 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
ian@0 503 int pci_assign_resource(struct pci_dev *dev, int i);
ian@0 504 int pci_assign_resource_fixed(struct pci_dev *dev, int i);
ian@0 505 void pci_restore_bars(struct pci_dev *dev);
ian@0 506
ian@0 507 /* ROM control related routines */
ian@0 508 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
ian@0 509 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
ian@0 510 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
ian@0 511 void pci_remove_rom(struct pci_dev *pdev);
ian@0 512
ian@0 513 /* Power management related routines */
ian@0 514 int pci_save_state(struct pci_dev *dev);
ian@0 515 int pci_restore_state(struct pci_dev *dev);
ian@0 516 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
ian@0 517 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
ian@0 518 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
ian@0 519
ian@0 520 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
ian@0 521 void pci_bus_assign_resources(struct pci_bus *bus);
ian@0 522 void pci_bus_size_bridges(struct pci_bus *bus);
ian@0 523 int pci_claim_resource(struct pci_dev *, int);
ian@0 524 void pci_assign_unassigned_resources(void);
ian@0 525 void pdev_enable_device(struct pci_dev *);
ian@0 526 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
ian@0 527 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
ian@0 528 int (*)(struct pci_dev *, u8, u8));
ian@0 529 #define HAVE_PCI_REQ_REGIONS 2
ian@0 530 int pci_request_regions(struct pci_dev *, const char *);
ian@0 531 void pci_release_regions(struct pci_dev *);
ian@0 532 int pci_request_region(struct pci_dev *, int, const char *);
ian@0 533 void pci_release_region(struct pci_dev *, int);
ian@0 534
ian@0 535 /* drivers/pci/bus.c */
ian@0 536 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
ian@0 537 resource_size_t size, resource_size_t align,
ian@0 538 resource_size_t min, unsigned int type_mask,
ian@0 539 void (*alignf)(void *, struct resource *,
ian@0 540 resource_size_t, resource_size_t),
ian@0 541 void *alignf_data);
ian@0 542 void pci_enable_bridges(struct pci_bus *bus);
ian@0 543
ian@0 544 /* Proper probing supporting hot-pluggable devices */
ian@0 545 int __pci_register_driver(struct pci_driver *, struct module *);
ian@0 546 static inline int pci_register_driver(struct pci_driver *driver)
ian@0 547 {
ian@0 548 return __pci_register_driver(driver, THIS_MODULE);
ian@0 549 }
ian@0 550
ian@0 551 void pci_unregister_driver(struct pci_driver *);
ian@0 552 void pci_remove_behind_bridge(struct pci_dev *);
ian@0 553 struct pci_driver *pci_dev_driver(const struct pci_dev *);
ian@0 554 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
ian@0 555 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
ian@0 556 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
ian@0 557
ian@0 558 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
ian@0 559 void *userdata);
ian@0 560 int pci_cfg_space_size(struct pci_dev *dev);
ian@0 561 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
ian@0 562
ian@0 563 /* kmem_cache style wrapper around pci_alloc_consistent() */
ian@0 564
ian@0 565 #include <linux/dmapool.h>
ian@0 566
ian@0 567 #define pci_pool dma_pool
ian@0 568 #define pci_pool_create(name, pdev, size, align, allocation) \
ian@0 569 dma_pool_create(name, &pdev->dev, size, align, allocation)
ian@0 570 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
ian@0 571 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
ian@0 572 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
ian@0 573
ian@0 574 enum pci_dma_burst_strategy {
ian@0 575 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
ian@0 576 strategy_parameter is N/A */
ian@0 577 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
ian@0 578 byte boundaries */
ian@0 579 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
ian@0 580 strategy_parameter byte boundaries */
ian@0 581 };
ian@0 582
ian@0 583 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
ian@0 584 extern struct pci_dev *isa_bridge;
ian@0 585 #endif
ian@0 586
ian@0 587 struct msix_entry {
ian@0 588 u16 vector; /* kernel uses to write allocated vector */
ian@0 589 u16 entry; /* driver uses to specify entry, OS writes */
ian@0 590 };
ian@0 591
ian@0 592 #ifndef CONFIG_PCI_MSI
ian@0 593 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
ian@0 594 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
ian@0 595 static inline void pci_disable_msi(struct pci_dev *dev) {}
ian@0 596 static inline int pci_enable_msix(struct pci_dev* dev,
ian@0 597 struct msix_entry *entries, int nvec) {return -1;}
ian@0 598 static inline void pci_disable_msix(struct pci_dev *dev) {}
ian@0 599 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
keir@619 600 #ifdef CONFIG_XEN
keir@619 601 #define register_msi_get_owner(func) 0
keir@619 602 #define unregister_msi_get_owner(func) 0
keir@619 603 #endif
ian@0 604 #else
ian@0 605 extern void pci_scan_msi_device(struct pci_dev *dev);
ian@0 606 extern int pci_enable_msi(struct pci_dev *dev);
ian@0 607 extern void pci_disable_msi(struct pci_dev *dev);
ian@0 608 extern int pci_enable_msix(struct pci_dev* dev,
ian@0 609 struct msix_entry *entries, int nvec);
ian@0 610 extern void pci_disable_msix(struct pci_dev *dev);
ian@0 611 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
keir@619 612 #ifdef CONFIG_XEN
keir@619 613 extern int register_msi_get_owner(int (*func)(struct pci_dev *dev));
keir@619 614 extern int unregister_msi_get_owner(int (*func)(struct pci_dev *dev));
keir@619 615 #endif
ian@0 616 #endif
ian@0 617
ian@0 618 extern void pci_block_user_cfg_access(struct pci_dev *dev);
ian@0 619 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
ian@0 620
ian@0 621 /*
ian@0 622 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
ian@0 623 * a PCI domain is defined to be a set of PCI busses which share
ian@0 624 * configuration space.
ian@0 625 */
ian@0 626 #ifndef CONFIG_PCI_DOMAINS
ian@0 627 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
ian@0 628 static inline int pci_proc_domain(struct pci_bus *bus)
ian@0 629 {
ian@0 630 return 0;
ian@0 631 }
ian@0 632 #endif
ian@0 633
ian@0 634 #else /* CONFIG_PCI is not enabled */
ian@0 635
ian@0 636 /*
ian@0 637 * If the system does not have PCI, clearly these return errors. Define
ian@0 638 * these as simple inline functions to avoid hair in drivers.
ian@0 639 */
ian@0 640
ian@0 641 #define _PCI_NOP(o,s,t) \
ian@0 642 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
ian@0 643 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
ian@0 644 #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
ian@0 645 _PCI_NOP(o,word,u16 x) \
ian@0 646 _PCI_NOP(o,dword,u32 x)
ian@0 647 _PCI_NOP_ALL(read, *)
ian@0 648 _PCI_NOP_ALL(write,)
ian@0 649
ian@0 650 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
ian@0 651 { return NULL; }
ian@0 652
ian@0 653 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
ian@0 654 { return NULL; }
ian@0 655
keir@735 656
keir@735 657 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn)
keir@735 658 {
keir@735 659 return NULL;
keir@735 660 }
ian@0 661 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
ian@0 662 { return NULL; }
ian@0 663
ian@0 664 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
ian@0 665 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
ian@0 666 { return NULL; }
ian@0 667
ian@0 668 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
ian@0 669 { return NULL; }
ian@0 670
ian@0 671 #define pci_dev_present(ids) (0)
ian@0 672 #define pci_dev_put(dev) do { } while (0)
ian@0 673
ian@0 674 static inline void pci_set_master(struct pci_dev *dev) { }
ian@0 675 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
ian@0 676 static inline void pci_disable_device(struct pci_dev *dev) { }
ian@0 677 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
ian@0 678 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
ian@0 679 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
ian@0 680 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
ian@0 681 static inline void pci_unregister_driver(struct pci_driver *drv) { }
ian@0 682 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
ian@0 683 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
ian@0 684 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
ian@0 685 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
ian@0 686
ian@0 687 /* Power management related routines */
ian@0 688 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
ian@0 689 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
ian@0 690 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
ian@0 691 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
ian@0 692 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
ian@0 693
ian@0 694 #define isa_bridge ((struct pci_dev *)NULL)
ian@0 695
ian@0 696 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
ian@0 697
ian@0 698 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
ian@0 699 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
ian@0 700
ian@0 701 #endif /* CONFIG_PCI */
ian@0 702
ian@0 703 /* Include architecture-dependent settings and functions */
ian@0 704
ian@0 705 #include <asm/pci.h>
ian@0 706
ian@0 707 /* these helpers provide future and backwards compatibility
ian@0 708 * for accessing popular PCI BAR info */
ian@0 709 #define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
ian@0 710 #define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
ian@0 711 #define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
ian@0 712 #define pci_resource_len(dev,bar) \
ian@0 713 ((pci_resource_start((dev),(bar)) == 0 && \
ian@0 714 pci_resource_end((dev),(bar)) == \
ian@0 715 pci_resource_start((dev),(bar))) ? 0 : \
ian@0 716 \
ian@0 717 (pci_resource_end((dev),(bar)) - \
ian@0 718 pci_resource_start((dev),(bar)) + 1))
ian@0 719
ian@0 720 /* Similar to the helpers above, these manipulate per-pci_dev
ian@0 721 * driver-specific data. They are really just a wrapper around
ian@0 722 * the generic device structure functions of these calls.
ian@0 723 */
ian@0 724 static inline void *pci_get_drvdata (struct pci_dev *pdev)
ian@0 725 {
ian@0 726 return dev_get_drvdata(&pdev->dev);
ian@0 727 }
ian@0 728
ian@0 729 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
ian@0 730 {
ian@0 731 dev_set_drvdata(&pdev->dev, data);
ian@0 732 }
ian@0 733
ian@0 734 /* If you want to know what to call your pci_dev, ask this function.
ian@0 735 * Again, it's a wrapper around the generic device.
ian@0 736 */
ian@0 737 static inline char *pci_name(struct pci_dev *pdev)
ian@0 738 {
ian@0 739 return pdev->dev.bus_id;
ian@0 740 }
ian@0 741
ian@0 742
ian@0 743 /* Some archs don't want to expose struct resource to userland as-is
ian@0 744 * in sysfs and /proc
ian@0 745 */
ian@0 746 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
ian@0 747 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
ian@0 748 const struct resource *rsrc, resource_size_t *start,
ian@0 749 resource_size_t *end)
ian@0 750 {
ian@0 751 *start = rsrc->start;
ian@0 752 *end = rsrc->end;
ian@0 753 }
ian@0 754 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
ian@0 755
ian@0 756
ian@0 757 /*
ian@0 758 * The world is not perfect and supplies us with broken PCI devices.
ian@0 759 * For at least a part of these bugs we need a work-around, so both
ian@0 760 * generic (drivers/pci/quirks.c) and per-architecture code can define
ian@0 761 * fixup hooks to be called for particular buggy devices.
ian@0 762 */
ian@0 763
ian@0 764 struct pci_fixup {
ian@0 765 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
ian@0 766 void (*hook)(struct pci_dev *dev);
ian@0 767 };
ian@0 768
ian@0 769 enum pci_fixup_pass {
ian@0 770 pci_fixup_early, /* Before probing BARs */
ian@0 771 pci_fixup_header, /* After reading configuration header */
ian@0 772 pci_fixup_final, /* Final phase of device fixups */
ian@0 773 pci_fixup_enable, /* pci_enable_device() time */
ian@0 774 };
ian@0 775
ian@0 776 /* Anonymous variables would be nice... */
ian@0 777 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
ian@0 778 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
ian@0 779 __attribute__((__section__(#section))) = { vendor, device, hook };
ian@0 780 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
ian@0 781 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
ian@0 782 vendor##device##hook, vendor, device, hook)
ian@0 783 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
ian@0 784 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
ian@0 785 vendor##device##hook, vendor, device, hook)
ian@0 786 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
ian@0 787 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
ian@0 788 vendor##device##hook, vendor, device, hook)
ian@0 789 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
ian@0 790 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
ian@0 791 vendor##device##hook, vendor, device, hook)
ian@0 792
ian@0 793
ian@0 794 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
ian@0 795
ian@0 796 extern int pci_pci_problems;
ian@0 797 #define PCIPCI_FAIL 1
ian@0 798 #define PCIPCI_TRITON 2
ian@0 799 #define PCIPCI_NATOMA 4
ian@0 800 #define PCIPCI_VIAETBF 8
ian@0 801 #define PCIPCI_VSFX 16
ian@0 802 #define PCIPCI_ALIMAGIK 32
ian@0 803
keir@769 804 #ifdef CONFIG_PCI_GUESTDEV
keir@769 805 int pci_is_guestdev(struct pci_dev *dev);
keir@769 806 #endif /* CONFIG_PCI_GUESTDEV */
keir@769 807
ian@0 808 #endif /* __KERNEL__ */
ian@0 809 #endif /* LINUX_PCI_H */