ia64/linux-2.6.18-xen.hg

annotate drivers/telephony/ixj.h @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 831230e53067
children
rev   line source
ian@0 1 /******************************************************************************
ian@0 2 * ixj.h
ian@0 3 *
ian@0 4 *
ian@0 5 * Device Driver for Quicknet Technologies, Inc.'s Telephony cards
ian@0 6 * including the Internet PhoneJACK, Internet PhoneJACK Lite,
ian@0 7 * Internet PhoneJACK PCI, Internet LineJACK, Internet PhoneCARD and
ian@0 8 * SmartCABLE
ian@0 9 *
ian@0 10 * (c) Copyright 1999-2001 Quicknet Technologies, Inc.
ian@0 11 *
ian@0 12 * This program is free software; you can redistribute it and/or
ian@0 13 * modify it under the terms of the GNU General Public License
ian@0 14 * as published by the Free Software Foundation; either version
ian@0 15 * 2 of the License, or (at your option) any later version.
ian@0 16 *
ian@0 17 * Author: Ed Okerson, <eokerson@quicknet.net>
ian@0 18 *
ian@0 19 * Contributors: Greg Herlein, <gherlein@quicknet.net>
ian@0 20 * David W. Erhart, <derhart@quicknet.net>
ian@0 21 * John Sellers, <jsellers@quicknet.net>
ian@0 22 * Mike Preston, <mpreston@quicknet.net>
ian@0 23 *
ian@0 24 * More information about the hardware related to this driver can be found
ian@0 25 * at our website: http://www.quicknet.net
ian@0 26 *
ian@0 27 * Fixes:
ian@0 28 *
ian@0 29 * IN NO EVENT SHALL QUICKNET TECHNOLOGIES, INC. BE LIABLE TO ANY PARTY FOR
ian@0 30 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
ian@0 31 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF QUICKNET
ian@0 32 * TECHNOLOGIES, INC.HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ian@0 33 *
ian@0 34 * QUICKNET TECHNOLOGIES, INC. SPECIFICALLY DISCLAIMS ANY WARRANTIES,
ian@0 35 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
ian@0 36 * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
ian@0 37 * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION
ian@0 38 * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
ian@0 39 *
ian@0 40 *****************************************************************************/
ian@0 41 #define IXJ_VERSION 3031
ian@0 42
ian@0 43 #include <linux/types.h>
ian@0 44
ian@0 45 #include <linux/ixjuser.h>
ian@0 46 #include <linux/phonedev.h>
ian@0 47
ian@0 48 typedef __u16 WORD;
ian@0 49 typedef __u32 DWORD;
ian@0 50 typedef __u8 BYTE;
ian@0 51 typedef __u8 BOOL;
ian@0 52
ian@0 53 #ifndef IXJMAX
ian@0 54 #define IXJMAX 16
ian@0 55 #endif
ian@0 56
ian@0 57 #define TRUE 1
ian@0 58 #define FALSE 0
ian@0 59
ian@0 60 /******************************************************************************
ian@0 61 *
ian@0 62 * This structure when unioned with the structures below makes simple byte
ian@0 63 * access to the registers easier.
ian@0 64 *
ian@0 65 ******************************************************************************/
ian@0 66 typedef struct {
ian@0 67 unsigned char low;
ian@0 68 unsigned char high;
ian@0 69 } BYTES;
ian@0 70
ian@0 71 typedef union {
ian@0 72 BYTES bytes;
ian@0 73 short word;
ian@0 74 } IXJ_WORD;
ian@0 75
ian@0 76 typedef struct{
ian@0 77 unsigned int b0:1;
ian@0 78 unsigned int b1:1;
ian@0 79 unsigned int b2:1;
ian@0 80 unsigned int b3:1;
ian@0 81 unsigned int b4:1;
ian@0 82 unsigned int b5:1;
ian@0 83 unsigned int b6:1;
ian@0 84 unsigned int b7:1;
ian@0 85 } IXJ_CBITS;
ian@0 86
ian@0 87 typedef union{
ian@0 88 IXJ_CBITS cbits;
ian@0 89 char cbyte;
ian@0 90 } IXJ_CBYTE;
ian@0 91
ian@0 92 /******************************************************************************
ian@0 93 *
ian@0 94 * This structure represents the Hardware Control Register of the CT8020/8021
ian@0 95 * The CT8020 is used in the Internet PhoneJACK, and the 8021 in the
ian@0 96 * Internet LineJACK
ian@0 97 *
ian@0 98 ******************************************************************************/
ian@0 99 typedef struct {
ian@0 100 unsigned int rxrdy:1;
ian@0 101 unsigned int txrdy:1;
ian@0 102 unsigned int status:1;
ian@0 103 unsigned int auxstatus:1;
ian@0 104 unsigned int rxdma:1;
ian@0 105 unsigned int txdma:1;
ian@0 106 unsigned int rxburst:1;
ian@0 107 unsigned int txburst:1;
ian@0 108 unsigned int dmadir:1;
ian@0 109 unsigned int cont:1;
ian@0 110 unsigned int irqn:1;
ian@0 111 unsigned int t:5;
ian@0 112 } HCRBIT;
ian@0 113
ian@0 114 typedef union {
ian@0 115 HCRBIT bits;
ian@0 116 BYTES bytes;
ian@0 117 } HCR;
ian@0 118
ian@0 119 /******************************************************************************
ian@0 120 *
ian@0 121 * This structure represents the Hardware Status Register of the CT8020/8021
ian@0 122 * The CT8020 is used in the Internet PhoneJACK, and the 8021 in the
ian@0 123 * Internet LineJACK
ian@0 124 *
ian@0 125 ******************************************************************************/
ian@0 126 typedef struct {
ian@0 127 unsigned int controlrdy:1;
ian@0 128 unsigned int auxctlrdy:1;
ian@0 129 unsigned int statusrdy:1;
ian@0 130 unsigned int auxstatusrdy:1;
ian@0 131 unsigned int rxrdy:1;
ian@0 132 unsigned int txrdy:1;
ian@0 133 unsigned int restart:1;
ian@0 134 unsigned int irqn:1;
ian@0 135 unsigned int rxdma:1;
ian@0 136 unsigned int txdma:1;
ian@0 137 unsigned int cohostshutdown:1;
ian@0 138 unsigned int t:5;
ian@0 139 } HSRBIT;
ian@0 140
ian@0 141 typedef union {
ian@0 142 HSRBIT bits;
ian@0 143 BYTES bytes;
ian@0 144 } HSR;
ian@0 145
ian@0 146 /******************************************************************************
ian@0 147 *
ian@0 148 * This structure represents the General Purpose IO Register of the CT8020/8021
ian@0 149 * The CT8020 is used in the Internet PhoneJACK, and the 8021 in the
ian@0 150 * Internet LineJACK
ian@0 151 *
ian@0 152 ******************************************************************************/
ian@0 153 typedef struct {
ian@0 154 unsigned int x:1;
ian@0 155 unsigned int gpio1:1;
ian@0 156 unsigned int gpio2:1;
ian@0 157 unsigned int gpio3:1;
ian@0 158 unsigned int gpio4:1;
ian@0 159 unsigned int gpio5:1;
ian@0 160 unsigned int gpio6:1;
ian@0 161 unsigned int gpio7:1;
ian@0 162 unsigned int xread:1;
ian@0 163 unsigned int gpio1read:1;
ian@0 164 unsigned int gpio2read:1;
ian@0 165 unsigned int gpio3read:1;
ian@0 166 unsigned int gpio4read:1;
ian@0 167 unsigned int gpio5read:1;
ian@0 168 unsigned int gpio6read:1;
ian@0 169 unsigned int gpio7read:1;
ian@0 170 } GPIOBIT;
ian@0 171
ian@0 172 typedef union {
ian@0 173 GPIOBIT bits;
ian@0 174 BYTES bytes;
ian@0 175 unsigned short word;
ian@0 176 } GPIO;
ian@0 177
ian@0 178 /******************************************************************************
ian@0 179 *
ian@0 180 * This structure represents the Line Monitor status response
ian@0 181 *
ian@0 182 ******************************************************************************/
ian@0 183 typedef struct {
ian@0 184 unsigned int digit:4;
ian@0 185 unsigned int cpf_valid:1;
ian@0 186 unsigned int dtmf_valid:1;
ian@0 187 unsigned int peak:1;
ian@0 188 unsigned int z:1;
ian@0 189 unsigned int f0:1;
ian@0 190 unsigned int f1:1;
ian@0 191 unsigned int f2:1;
ian@0 192 unsigned int f3:1;
ian@0 193 unsigned int frame:4;
ian@0 194 } LMON;
ian@0 195
ian@0 196 typedef union {
ian@0 197 LMON bits;
ian@0 198 BYTES bytes;
ian@0 199 } DTMF;
ian@0 200
ian@0 201 typedef struct {
ian@0 202 unsigned int z:7;
ian@0 203 unsigned int dtmf_en:1;
ian@0 204 unsigned int y:4;
ian@0 205 unsigned int F3:1;
ian@0 206 unsigned int F2:1;
ian@0 207 unsigned int F1:1;
ian@0 208 unsigned int F0:1;
ian@0 209 } CP;
ian@0 210
ian@0 211 typedef union {
ian@0 212 CP bits;
ian@0 213 BYTES bytes;
ian@0 214 } CPTF;
ian@0 215
ian@0 216 /******************************************************************************
ian@0 217 *
ian@0 218 * This structure represents the Status Control Register on the Internet
ian@0 219 * LineJACK
ian@0 220 *
ian@0 221 ******************************************************************************/
ian@0 222 typedef struct {
ian@0 223 unsigned int c0:1;
ian@0 224 unsigned int c1:1;
ian@0 225 unsigned int stereo:1;
ian@0 226 unsigned int daafsyncen:1;
ian@0 227 unsigned int led1:1;
ian@0 228 unsigned int led2:1;
ian@0 229 unsigned int led3:1;
ian@0 230 unsigned int led4:1;
ian@0 231 } PSCRWI; /* Internet LineJACK and Internet PhoneJACK Lite */
ian@0 232
ian@0 233 typedef struct {
ian@0 234 unsigned int eidp:1;
ian@0 235 unsigned int eisd:1;
ian@0 236 unsigned int x:6;
ian@0 237 } PSCRWP; /* Internet PhoneJACK PCI */
ian@0 238
ian@0 239 typedef union {
ian@0 240 PSCRWI bits;
ian@0 241 PSCRWP pcib;
ian@0 242 char byte;
ian@0 243 } PLD_SCRW;
ian@0 244
ian@0 245 typedef struct {
ian@0 246 unsigned int c0:1;
ian@0 247 unsigned int c1:1;
ian@0 248 unsigned int x:1;
ian@0 249 unsigned int d0ee:1;
ian@0 250 unsigned int mixerbusy:1;
ian@0 251 unsigned int sci:1;
ian@0 252 unsigned int dspflag:1;
ian@0 253 unsigned int daaflag:1;
ian@0 254 } PSCRRI;
ian@0 255
ian@0 256 typedef struct {
ian@0 257 unsigned int eidp:1;
ian@0 258 unsigned int eisd:1;
ian@0 259 unsigned int x:4;
ian@0 260 unsigned int dspflag:1;
ian@0 261 unsigned int det:1;
ian@0 262 } PSCRRP;
ian@0 263
ian@0 264 typedef union {
ian@0 265 PSCRRI bits;
ian@0 266 PSCRRP pcib;
ian@0 267 char byte;
ian@0 268 } PLD_SCRR;
ian@0 269
ian@0 270 /******************************************************************************
ian@0 271 *
ian@0 272 * These structures represents the SLIC Control Register on the
ian@0 273 * Internet LineJACK
ian@0 274 *
ian@0 275 ******************************************************************************/
ian@0 276 typedef struct {
ian@0 277 unsigned int c1:1;
ian@0 278 unsigned int c2:1;
ian@0 279 unsigned int c3:1;
ian@0 280 unsigned int b2en:1;
ian@0 281 unsigned int spken:1;
ian@0 282 unsigned int rly1:1;
ian@0 283 unsigned int rly2:1;
ian@0 284 unsigned int rly3:1;
ian@0 285 } PSLICWRITE;
ian@0 286
ian@0 287 typedef struct {
ian@0 288 unsigned int state:3;
ian@0 289 unsigned int b2en:1;
ian@0 290 unsigned int spken:1;
ian@0 291 unsigned int c3:1;
ian@0 292 unsigned int potspstn:1;
ian@0 293 unsigned int det:1;
ian@0 294 } PSLICREAD;
ian@0 295
ian@0 296 typedef struct {
ian@0 297 unsigned int c1:1;
ian@0 298 unsigned int c2:1;
ian@0 299 unsigned int c3:1;
ian@0 300 unsigned int b2en:1;
ian@0 301 unsigned int e1:1;
ian@0 302 unsigned int mic:1;
ian@0 303 unsigned int spk:1;
ian@0 304 unsigned int x:1;
ian@0 305 } PSLICPCI;
ian@0 306
ian@0 307 typedef union {
ian@0 308 PSLICPCI pcib;
ian@0 309 PSLICWRITE bits;
ian@0 310 PSLICREAD slic;
ian@0 311 char byte;
ian@0 312 } PLD_SLICW;
ian@0 313
ian@0 314 typedef union {
ian@0 315 PSLICPCI pcib;
ian@0 316 PSLICREAD bits;
ian@0 317 char byte;
ian@0 318 } PLD_SLICR;
ian@0 319
ian@0 320 /******************************************************************************
ian@0 321 *
ian@0 322 * These structures represents the Clock Control Register on the
ian@0 323 * Internet LineJACK
ian@0 324 *
ian@0 325 ******************************************************************************/
ian@0 326 typedef struct {
ian@0 327 unsigned int clk0:1;
ian@0 328 unsigned int clk1:1;
ian@0 329 unsigned int clk2:1;
ian@0 330 unsigned int x0:1;
ian@0 331 unsigned int slic_e1:1;
ian@0 332 unsigned int x1:1;
ian@0 333 unsigned int x2:1;
ian@0 334 unsigned int x3:1;
ian@0 335 } PCLOCK;
ian@0 336
ian@0 337 typedef union {
ian@0 338 PCLOCK bits;
ian@0 339 char byte;
ian@0 340 } PLD_CLOCK;
ian@0 341
ian@0 342 /******************************************************************************
ian@0 343 *
ian@0 344 * These structures deal with the mixer on the Internet LineJACK
ian@0 345 *
ian@0 346 ******************************************************************************/
ian@0 347
ian@0 348 typedef struct {
ian@0 349 unsigned short vol[10];
ian@0 350 unsigned int recsrc;
ian@0 351 unsigned int modcnt;
ian@0 352 unsigned short micpreamp;
ian@0 353 } MIX;
ian@0 354
ian@0 355 /******************************************************************************
ian@0 356 *
ian@0 357 * These structures deal with the control logic on the Internet PhoneCARD
ian@0 358 *
ian@0 359 ******************************************************************************/
ian@0 360 typedef struct {
ian@0 361 unsigned int x0:4; /* unused bits */
ian@0 362
ian@0 363 unsigned int ed:1; /* Event Detect */
ian@0 364
ian@0 365 unsigned int drf:1; /* SmartCABLE Removal Flag 1=no cable */
ian@0 366
ian@0 367 unsigned int dspf:1; /* DSP Flag 1=DSP Ready */
ian@0 368
ian@0 369 unsigned int crr:1; /* Control Register Ready */
ian@0 370
ian@0 371 } COMMAND_REG1;
ian@0 372
ian@0 373 typedef union {
ian@0 374 COMMAND_REG1 bits;
ian@0 375 unsigned char byte;
ian@0 376 } PCMCIA_CR1;
ian@0 377
ian@0 378 typedef struct {
ian@0 379 unsigned int x0:4; /* unused bits */
ian@0 380
ian@0 381 unsigned int rstc:1; /* SmartCABLE Reset */
ian@0 382
ian@0 383 unsigned int pwr:1; /* SmartCABLE Power */
ian@0 384
ian@0 385 unsigned int x1:2; /* unused bits */
ian@0 386
ian@0 387 } COMMAND_REG2;
ian@0 388
ian@0 389 typedef union {
ian@0 390 COMMAND_REG2 bits;
ian@0 391 unsigned char byte;
ian@0 392 } PCMCIA_CR2;
ian@0 393
ian@0 394 typedef struct {
ian@0 395 unsigned int addr:5; /* R/W SmartCABLE Register Address */
ian@0 396
ian@0 397 unsigned int rw:1; /* Read / Write flag */
ian@0 398
ian@0 399 unsigned int dev:2; /* 2 bit SmartCABLE Device Address */
ian@0 400
ian@0 401 } CONTROL_REG;
ian@0 402
ian@0 403 typedef union {
ian@0 404 CONTROL_REG bits;
ian@0 405 unsigned char byte;
ian@0 406 } PCMCIA_SCCR;
ian@0 407
ian@0 408 typedef struct {
ian@0 409 unsigned int hsw:1;
ian@0 410 unsigned int det:1;
ian@0 411 unsigned int led2:1;
ian@0 412 unsigned int led1:1;
ian@0 413 unsigned int ring1:1;
ian@0 414 unsigned int ring0:1;
ian@0 415 unsigned int x:1;
ian@0 416 unsigned int powerdown:1;
ian@0 417 } PCMCIA_SLIC_REG;
ian@0 418
ian@0 419 typedef union {
ian@0 420 PCMCIA_SLIC_REG bits;
ian@0 421 unsigned char byte;
ian@0 422 } PCMCIA_SLIC;
ian@0 423
ian@0 424 typedef struct {
ian@0 425 unsigned int cpd:1; /* Chip Power Down */
ian@0 426
ian@0 427 unsigned int mpd:1; /* MIC Bias Power Down */
ian@0 428
ian@0 429 unsigned int hpd:1; /* Handset Drive Power Down */
ian@0 430
ian@0 431 unsigned int lpd:1; /* Line Drive Power Down */
ian@0 432
ian@0 433 unsigned int spd:1; /* Speaker Drive Power Down */
ian@0 434
ian@0 435 unsigned int x:2; /* unused bits */
ian@0 436
ian@0 437 unsigned int sr:1; /* Software Reset */
ian@0 438
ian@0 439 } Si3CONTROL1;
ian@0 440
ian@0 441 typedef union {
ian@0 442 Si3CONTROL1 bits;
ian@0 443 unsigned char byte;
ian@0 444 } Si3C1;
ian@0 445
ian@0 446 typedef struct {
ian@0 447 unsigned int al:1; /* Analog Loopback DAC analog -> ADC analog */
ian@0 448
ian@0 449 unsigned int dl2:1; /* Digital Loopback DAC -> ADC one bit */
ian@0 450
ian@0 451 unsigned int dl1:1; /* Digital Loopback ADC -> DAC one bit */
ian@0 452
ian@0 453 unsigned int pll:1; /* 1 = div 10, 0 = div 5 */
ian@0 454
ian@0 455 unsigned int hpd:1; /* HPF disable */
ian@0 456
ian@0 457 unsigned int x:3; /* unused bits */
ian@0 458
ian@0 459 } Si3CONTROL2;
ian@0 460
ian@0 461 typedef union {
ian@0 462 Si3CONTROL2 bits;
ian@0 463 unsigned char byte;
ian@0 464 } Si3C2;
ian@0 465
ian@0 466 typedef struct {
ian@0 467 unsigned int iir:1; /* 1 enables IIR, 0 enables FIR */
ian@0 468
ian@0 469 unsigned int him:1; /* Handset Input Mute */
ian@0 470
ian@0 471 unsigned int mcm:1; /* MIC In Mute */
ian@0 472
ian@0 473 unsigned int mcg:2; /* MIC In Gain */
ian@0 474
ian@0 475 unsigned int lim:1; /* Line In Mute */
ian@0 476
ian@0 477 unsigned int lig:2; /* Line In Gain */
ian@0 478
ian@0 479 } Si3RXGAIN;
ian@0 480
ian@0 481 typedef union {
ian@0 482 Si3RXGAIN bits;
ian@0 483 unsigned char byte;
ian@0 484 } Si3RXG;
ian@0 485
ian@0 486 typedef struct {
ian@0 487 unsigned int hom:1; /* Handset Out Mute */
ian@0 488
ian@0 489 unsigned int lom:1; /* Line Out Mute */
ian@0 490
ian@0 491 unsigned int rxg:5; /* RX PGA Gain */
ian@0 492
ian@0 493 unsigned int x:1; /* unused bit */
ian@0 494
ian@0 495 } Si3ADCVOLUME;
ian@0 496
ian@0 497 typedef union {
ian@0 498 Si3ADCVOLUME bits;
ian@0 499 unsigned char byte;
ian@0 500 } Si3ADC;
ian@0 501
ian@0 502 typedef struct {
ian@0 503 unsigned int srm:1; /* Speaker Right Mute */
ian@0 504
ian@0 505 unsigned int slm:1; /* Speaker Left Mute */
ian@0 506
ian@0 507 unsigned int txg:5; /* TX PGA Gain */
ian@0 508
ian@0 509 unsigned int x:1; /* unused bit */
ian@0 510
ian@0 511 } Si3DACVOLUME;
ian@0 512
ian@0 513 typedef union {
ian@0 514 Si3DACVOLUME bits;
ian@0 515 unsigned char byte;
ian@0 516 } Si3DAC;
ian@0 517
ian@0 518 typedef struct {
ian@0 519 unsigned int x:5; /* unused bit */
ian@0 520
ian@0 521 unsigned int losc:1; /* Line Out Short Circuit */
ian@0 522
ian@0 523 unsigned int srsc:1; /* Speaker Right Short Circuit */
ian@0 524
ian@0 525 unsigned int slsc:1; /* Speaker Left Short Circuit */
ian@0 526
ian@0 527 } Si3STATUSREPORT;
ian@0 528
ian@0 529 typedef union {
ian@0 530 Si3STATUSREPORT bits;
ian@0 531 unsigned char byte;
ian@0 532 } Si3STAT;
ian@0 533
ian@0 534 typedef struct {
ian@0 535 unsigned int sot:2; /* Speaker Out Attenuation */
ian@0 536
ian@0 537 unsigned int lot:2; /* Line Out Attenuation */
ian@0 538
ian@0 539 unsigned int x:4; /* unused bits */
ian@0 540
ian@0 541 } Si3ANALOGATTN;
ian@0 542
ian@0 543 typedef union {
ian@0 544 Si3ANALOGATTN bits;
ian@0 545 unsigned char byte;
ian@0 546 } Si3AATT;
ian@0 547
ian@0 548 /******************************************************************************
ian@0 549 *
ian@0 550 * These structures deal with the DAA on the Internet LineJACK
ian@0 551 *
ian@0 552 ******************************************************************************/
ian@0 553
ian@0 554 typedef struct _DAA_REGS {
ian@0 555 /*----------------------------------------------- */
ian@0 556 /* SOP Registers */
ian@0 557 /* */
ian@0 558 BYTE bySOP;
ian@0 559
ian@0 560 union _SOP_REGS {
ian@0 561 struct _SOP {
ian@0 562 union /* SOP - CR0 Register */
ian@0 563 {
ian@0 564 BYTE reg;
ian@0 565 struct _CR0_BITREGS {
ian@0 566 BYTE CLK_EXT:1; /* cr0[0:0] */
ian@0 567
ian@0 568 BYTE RIP:1; /* cr0[1:1] */
ian@0 569
ian@0 570 BYTE AR:1; /* cr0[2:2] */
ian@0 571
ian@0 572 BYTE AX:1; /* cr0[3:3] */
ian@0 573
ian@0 574 BYTE FRR:1; /* cr0[4:4] */
ian@0 575
ian@0 576 BYTE FRX:1; /* cr0[5:5] */
ian@0 577
ian@0 578 BYTE IM:1; /* cr0[6:6] */
ian@0 579
ian@0 580 BYTE TH:1; /* cr0[7:7] */
ian@0 581
ian@0 582 } bitreg;
ian@0 583 } cr0;
ian@0 584
ian@0 585 union /* SOP - CR1 Register */
ian@0 586 {
ian@0 587 BYTE reg;
ian@0 588 struct _CR1_REGS {
ian@0 589 BYTE RM:1; /* cr1[0:0] */
ian@0 590
ian@0 591 BYTE RMR:1; /* cr1[1:1] */
ian@0 592
ian@0 593 BYTE No_auto:1; /* cr1[2:2] */
ian@0 594
ian@0 595 BYTE Pulse:1; /* cr1[3:3] */
ian@0 596
ian@0 597 BYTE P_Tone1:1; /* cr1[4:4] */
ian@0 598
ian@0 599 BYTE P_Tone2:1; /* cr1[5:5] */
ian@0 600
ian@0 601 BYTE E_Tone1:1; /* cr1[6:6] */
ian@0 602
ian@0 603 BYTE E_Tone2:1; /* cr1[7:7] */
ian@0 604
ian@0 605 } bitreg;
ian@0 606 } cr1;
ian@0 607
ian@0 608 union /* SOP - CR2 Register */
ian@0 609 {
ian@0 610 BYTE reg;
ian@0 611 struct _CR2_REGS {
ian@0 612 BYTE Call_II:1; /* CR2[0:0] */
ian@0 613
ian@0 614 BYTE Call_I:1; /* CR2[1:1] */
ian@0 615
ian@0 616 BYTE Call_en:1; /* CR2[2:2] */
ian@0 617
ian@0 618 BYTE Call_pon:1; /* CR2[3:3] */
ian@0 619
ian@0 620 BYTE IDR:1; /* CR2[4:4] */
ian@0 621
ian@0 622 BYTE COT_R:3; /* CR2[5:7] */
ian@0 623
ian@0 624 } bitreg;
ian@0 625 } cr2;
ian@0 626
ian@0 627 union /* SOP - CR3 Register */
ian@0 628 {
ian@0 629 BYTE reg;
ian@0 630 struct _CR3_REGS {
ian@0 631 BYTE DHP_X:1; /* CR3[0:0] */
ian@0 632
ian@0 633 BYTE DHP_R:1; /* CR3[1:1] */
ian@0 634
ian@0 635 BYTE Cal_pctl:1; /* CR3[2:2] */
ian@0 636
ian@0 637 BYTE SEL:1; /* CR3[3:3] */
ian@0 638
ian@0 639 BYTE TestLoops:4; /* CR3[4:7] */
ian@0 640
ian@0 641 } bitreg;
ian@0 642 } cr3;
ian@0 643
ian@0 644 union /* SOP - CR4 Register */
ian@0 645 {
ian@0 646 BYTE reg;
ian@0 647 struct _CR4_REGS {
ian@0 648 BYTE Fsc_en:1; /* CR4[0:0] */
ian@0 649
ian@0 650 BYTE Int_en:1; /* CR4[1:1] */
ian@0 651
ian@0 652 BYTE AGX:2; /* CR4[2:3] */
ian@0 653
ian@0 654 BYTE AGR_R:2; /* CR4[4:5] */
ian@0 655
ian@0 656 BYTE AGR_Z:2; /* CR4[6:7] */
ian@0 657
ian@0 658 } bitreg;
ian@0 659 } cr4;
ian@0 660
ian@0 661 union /* SOP - CR5 Register */
ian@0 662 {
ian@0 663 BYTE reg;
ian@0 664 struct _CR5_REGS {
ian@0 665 BYTE V_0:1; /* CR5[0:0] */
ian@0 666
ian@0 667 BYTE V_1:1; /* CR5[1:1] */
ian@0 668
ian@0 669 BYTE V_2:1; /* CR5[2:2] */
ian@0 670
ian@0 671 BYTE V_3:1; /* CR5[3:3] */
ian@0 672
ian@0 673 BYTE V_4:1; /* CR5[4:4] */
ian@0 674
ian@0 675 BYTE V_5:1; /* CR5[5:5] */
ian@0 676
ian@0 677 BYTE V_6:1; /* CR5[6:6] */
ian@0 678
ian@0 679 BYTE V_7:1; /* CR5[7:7] */
ian@0 680
ian@0 681 } bitreg;
ian@0 682 } cr5;
ian@0 683
ian@0 684 union /* SOP - CR6 Register */
ian@0 685 {
ian@0 686 BYTE reg;
ian@0 687 struct _CR6_REGS {
ian@0 688 BYTE reserved:8; /* CR6[0:7] */
ian@0 689
ian@0 690 } bitreg;
ian@0 691 } cr6;
ian@0 692
ian@0 693 union /* SOP - CR7 Register */
ian@0 694 {
ian@0 695 BYTE reg;
ian@0 696 struct _CR7_REGS {
ian@0 697 BYTE reserved:8; /* CR7[0:7] */
ian@0 698
ian@0 699 } bitreg;
ian@0 700 } cr7;
ian@0 701 } SOP;
ian@0 702
ian@0 703 BYTE ByteRegs[sizeof(struct _SOP)];
ian@0 704
ian@0 705 } SOP_REGS;
ian@0 706
ian@0 707 /* DAA_REGS.SOP_REGS.SOP.CR5.reg */
ian@0 708 /* DAA_REGS.SOP_REGS.SOP.CR5.bitreg */
ian@0 709 /* DAA_REGS.SOP_REGS.SOP.CR5.bitreg.V_2 */
ian@0 710 /* DAA_REGS.SOP_REGS.ByteRegs[5] */
ian@0 711
ian@0 712 /*----------------------------------------------- */
ian@0 713 /* XOP Registers */
ian@0 714 /* */
ian@0 715 BYTE byXOP;
ian@0 716
ian@0 717 union _XOP_REGS {
ian@0 718 struct _XOP {
ian@0 719 union XOPXR0/* XOP - XR0 Register - Read values */
ian@0 720 {
ian@0 721 BYTE reg;
ian@0 722 struct _XR0_BITREGS {
ian@0 723 BYTE SI_0:1; /* XR0[0:0] - Read */
ian@0 724
ian@0 725 BYTE SI_1:1; /* XR0[1:1] - Read */
ian@0 726
ian@0 727 BYTE VDD_OK:1; /* XR0[2:2] - Read */
ian@0 728
ian@0 729 BYTE Caller_ID:1; /* XR0[3:3] - Read */
ian@0 730
ian@0 731 BYTE RING:1; /* XR0[4:4] - Read */
ian@0 732
ian@0 733 BYTE Cadence:1; /* XR0[5:5] - Read */
ian@0 734
ian@0 735 BYTE Wake_up:1; /* XR0[6:6] - Read */
ian@0 736
ian@0 737 BYTE RMR:1; /* XR0[7:7] - Read */
ian@0 738
ian@0 739 } bitreg;
ian@0 740 } xr0;
ian@0 741
ian@0 742 union /* XOP - XR1 Register */
ian@0 743 {
ian@0 744 BYTE reg;
ian@0 745 struct _XR1_BITREGS {
ian@0 746 BYTE M_SI_0:1; /* XR1[0:0] */
ian@0 747
ian@0 748 BYTE M_SI_1:1; /* XR1[1:1] */
ian@0 749
ian@0 750 BYTE M_VDD_OK:1; /* XR1[2:2] */
ian@0 751
ian@0 752 BYTE M_Caller_ID:1; /* XR1[3:3] */
ian@0 753
ian@0 754 BYTE M_RING:1; /* XR1[4:4] */
ian@0 755
ian@0 756 BYTE M_Cadence:1; /* XR1[5:5] */
ian@0 757
ian@0 758 BYTE M_Wake_up:1; /* XR1[6:6] */
ian@0 759
ian@0 760 BYTE unused:1; /* XR1[7:7] */
ian@0 761
ian@0 762 } bitreg;
ian@0 763 } xr1;
ian@0 764
ian@0 765 union /* XOP - XR2 Register */
ian@0 766 {
ian@0 767 BYTE reg;
ian@0 768 struct _XR2_BITREGS {
ian@0 769 BYTE CTO0:1; /* XR2[0:0] */
ian@0 770
ian@0 771 BYTE CTO1:1; /* XR2[1:1] */
ian@0 772
ian@0 773 BYTE CTO2:1; /* XR2[2:2] */
ian@0 774
ian@0 775 BYTE CTO3:1; /* XR2[3:3] */
ian@0 776
ian@0 777 BYTE CTO4:1; /* XR2[4:4] */
ian@0 778
ian@0 779 BYTE CTO5:1; /* XR2[5:5] */
ian@0 780
ian@0 781 BYTE CTO6:1; /* XR2[6:6] */
ian@0 782
ian@0 783 BYTE CTO7:1; /* XR2[7:7] */
ian@0 784
ian@0 785 } bitreg;
ian@0 786 } xr2;
ian@0 787
ian@0 788 union /* XOP - XR3 Register */
ian@0 789 {
ian@0 790 BYTE reg;
ian@0 791 struct _XR3_BITREGS {
ian@0 792 BYTE DCR0:1; /* XR3[0:0] */
ian@0 793
ian@0 794 BYTE DCR1:1; /* XR3[1:1] */
ian@0 795
ian@0 796 BYTE DCI:1; /* XR3[2:2] */
ian@0 797
ian@0 798 BYTE DCU0:1; /* XR3[3:3] */
ian@0 799
ian@0 800 BYTE DCU1:1; /* XR3[4:4] */
ian@0 801
ian@0 802 BYTE B_off:1; /* XR3[5:5] */
ian@0 803
ian@0 804 BYTE AGB0:1; /* XR3[6:6] */
ian@0 805
ian@0 806 BYTE AGB1:1; /* XR3[7:7] */
ian@0 807
ian@0 808 } bitreg;
ian@0 809 } xr3;
ian@0 810
ian@0 811 union /* XOP - XR4 Register */
ian@0 812 {
ian@0 813 BYTE reg;
ian@0 814 struct _XR4_BITREGS {
ian@0 815 BYTE C_0:1; /* XR4[0:0] */
ian@0 816
ian@0 817 BYTE C_1:1; /* XR4[1:1] */
ian@0 818
ian@0 819 BYTE C_2:1; /* XR4[2:2] */
ian@0 820
ian@0 821 BYTE C_3:1; /* XR4[3:3] */
ian@0 822
ian@0 823 BYTE C_4:1; /* XR4[4:4] */
ian@0 824
ian@0 825 BYTE C_5:1; /* XR4[5:5] */
ian@0 826
ian@0 827 BYTE C_6:1; /* XR4[6:6] */
ian@0 828
ian@0 829 BYTE C_7:1; /* XR4[7:7] */
ian@0 830
ian@0 831 } bitreg;
ian@0 832 } xr4;
ian@0 833
ian@0 834 union /* XOP - XR5 Register */
ian@0 835 {
ian@0 836 BYTE reg;
ian@0 837 struct _XR5_BITREGS {
ian@0 838 BYTE T_0:1; /* XR5[0:0] */
ian@0 839
ian@0 840 BYTE T_1:1; /* XR5[1:1] */
ian@0 841
ian@0 842 BYTE T_2:1; /* XR5[2:2] */
ian@0 843
ian@0 844 BYTE T_3:1; /* XR5[3:3] */
ian@0 845
ian@0 846 BYTE T_4:1; /* XR5[4:4] */
ian@0 847
ian@0 848 BYTE T_5:1; /* XR5[5:5] */
ian@0 849
ian@0 850 BYTE T_6:1; /* XR5[6:6] */
ian@0 851
ian@0 852 BYTE T_7:1; /* XR5[7:7] */
ian@0 853
ian@0 854 } bitreg;
ian@0 855 } xr5;
ian@0 856
ian@0 857 union /* XOP - XR6 Register - Read Values */
ian@0 858 {
ian@0 859 BYTE reg;
ian@0 860 struct _XR6_BITREGS {
ian@0 861 BYTE CPS0:1; /* XR6[0:0] */
ian@0 862
ian@0 863 BYTE CPS1:1; /* XR6[1:1] */
ian@0 864
ian@0 865 BYTE unused1:2; /* XR6[2:3] */
ian@0 866
ian@0 867 BYTE CLK_OFF:1; /* XR6[4:4] */
ian@0 868
ian@0 869 BYTE unused2:3; /* XR6[5:7] */
ian@0 870
ian@0 871 } bitreg;
ian@0 872 } xr6;
ian@0 873
ian@0 874 union /* XOP - XR7 Register */
ian@0 875 {
ian@0 876 BYTE reg;
ian@0 877 struct _XR7_BITREGS {
ian@0 878 BYTE unused1:1; /* XR7[0:0] */
ian@0 879
ian@0 880 BYTE Vdd0:1; /* XR7[1:1] */
ian@0 881
ian@0 882 BYTE Vdd1:1; /* XR7[2:2] */
ian@0 883
ian@0 884 BYTE unused2:5; /* XR7[3:7] */
ian@0 885
ian@0 886 } bitreg;
ian@0 887 } xr7;
ian@0 888 } XOP;
ian@0 889
ian@0 890 BYTE ByteRegs[sizeof(struct _XOP)];
ian@0 891
ian@0 892 } XOP_REGS;
ian@0 893
ian@0 894 /* DAA_REGS.XOP_REGS.XOP.XR7.reg */
ian@0 895 /* DAA_REGS.XOP_REGS.XOP.XR7.bitreg */
ian@0 896 /* DAA_REGS.XOP_REGS.XOP.XR7.bitreg.Vdd0 */
ian@0 897 /* DAA_REGS.XOP_REGS.ByteRegs[7] */
ian@0 898
ian@0 899 /*----------------------------------------------- */
ian@0 900 /* COP Registers */
ian@0 901 /* */
ian@0 902 BYTE byCOP;
ian@0 903
ian@0 904 union _COP_REGS {
ian@0 905 struct _COP {
ian@0 906 BYTE THFilterCoeff_1[8]; /* COP - TH Filter Coefficients, CODE=0, Part 1 */
ian@0 907
ian@0 908 BYTE THFilterCoeff_2[8]; /* COP - TH Filter Coefficients, CODE=1, Part 2 */
ian@0 909
ian@0 910 BYTE THFilterCoeff_3[8]; /* COP - TH Filter Coefficients, CODE=2, Part 3 */
ian@0 911
ian@0 912 BYTE RingerImpendance_1[8]; /* COP - Ringer Impendance Coefficients, CODE=3, Part 1 */
ian@0 913
ian@0 914 BYTE IMFilterCoeff_1[8]; /* COP - IM Filter Coefficients, CODE=4, Part 1 */
ian@0 915
ian@0 916 BYTE IMFilterCoeff_2[8]; /* COP - IM Filter Coefficients, CODE=5, Part 2 */
ian@0 917
ian@0 918 BYTE RingerImpendance_2[8]; /* COP - Ringer Impendance Coefficients, CODE=6, Part 2 */
ian@0 919
ian@0 920 BYTE FRRFilterCoeff[8]; /* COP - FRR Filter Coefficients, CODE=7 */
ian@0 921
ian@0 922 BYTE FRXFilterCoeff[8]; /* COP - FRX Filter Coefficients, CODE=8 */
ian@0 923
ian@0 924 BYTE ARFilterCoeff[4]; /* COP - AR Filter Coefficients, CODE=9 */
ian@0 925
ian@0 926 BYTE AXFilterCoeff[4]; /* COP - AX Filter Coefficients, CODE=10 */
ian@0 927
ian@0 928 BYTE Tone1Coeff[4]; /* COP - Tone1 Coefficients, CODE=11 */
ian@0 929
ian@0 930 BYTE Tone2Coeff[4]; /* COP - Tone2 Coefficients, CODE=12 */
ian@0 931
ian@0 932 BYTE LevelmeteringRinging[4]; /* COP - Levelmetering Ringing, CODE=13 */
ian@0 933
ian@0 934 BYTE CallerID1stTone[8]; /* COP - Caller ID 1st Tone, CODE=14 */
ian@0 935
ian@0 936 BYTE CallerID2ndTone[8]; /* COP - Caller ID 2nd Tone, CODE=15 */
ian@0 937
ian@0 938 } COP;
ian@0 939
ian@0 940 BYTE ByteRegs[sizeof(struct _COP)];
ian@0 941
ian@0 942 } COP_REGS;
ian@0 943
ian@0 944 /* DAA_REGS.COP_REGS.COP.XR7.Tone1Coeff[3] */
ian@0 945 /* DAA_REGS.COP_REGS.COP.XR7.bitreg */
ian@0 946 /* DAA_REGS.COP_REGS.COP.XR7.bitreg.Vdd0 */
ian@0 947 /* DAA_REGS.COP_REGS.ByteRegs[57] */
ian@0 948
ian@0 949 /*----------------------------------------------- */
ian@0 950 /* CAO Registers */
ian@0 951 /* */
ian@0 952 BYTE byCAO;
ian@0 953
ian@0 954 union _CAO_REGS {
ian@0 955 struct _CAO {
ian@0 956 BYTE CallerID[512]; /* CAO - Caller ID Bytes */
ian@0 957
ian@0 958 } CAO;
ian@0 959
ian@0 960 BYTE ByteRegs[sizeof(struct _CAO)];
ian@0 961 } CAO_REGS;
ian@0 962
ian@0 963 union /* XOP - XR0 Register - Write values */
ian@0 964 {
ian@0 965 BYTE reg;
ian@0 966 struct _XR0_BITREGSW {
ian@0 967 BYTE SO_0:1; /* XR1[0:0] - Write */
ian@0 968
ian@0 969 BYTE SO_1:1; /* XR1[1:1] - Write */
ian@0 970
ian@0 971 BYTE SO_2:1; /* XR1[2:2] - Write */
ian@0 972
ian@0 973 BYTE unused:5; /* XR1[3:7] - Write */
ian@0 974
ian@0 975 } bitreg;
ian@0 976 } XOP_xr0_W;
ian@0 977
ian@0 978 union /* XOP - XR6 Register - Write values */
ian@0 979 {
ian@0 980 BYTE reg;
ian@0 981 struct _XR6_BITREGSW {
ian@0 982 BYTE unused1:4; /* XR6[0:3] */
ian@0 983
ian@0 984 BYTE CLK_OFF:1; /* XR6[4:4] */
ian@0 985
ian@0 986 BYTE unused2:3; /* XR6[5:7] */
ian@0 987
ian@0 988 } bitreg;
ian@0 989 } XOP_xr6_W;
ian@0 990
ian@0 991 } DAA_REGS;
ian@0 992
ian@0 993 #define ALISDAA_ID_BYTE 0x81
ian@0 994 #define ALISDAA_CALLERID_SIZE 512
ian@0 995
ian@0 996 /*------------------------------ */
ian@0 997 /* */
ian@0 998 /* Misc definitions */
ian@0 999 /* */
ian@0 1000
ian@0 1001 /* Power Up Operation */
ian@0 1002 #define SOP_PU_SLEEP 0
ian@0 1003 #define SOP_PU_RINGING 1
ian@0 1004 #define SOP_PU_CONVERSATION 2
ian@0 1005 #define SOP_PU_PULSEDIALING 3
ian@0 1006 #define SOP_PU_RESET 4
ian@0 1007
ian@0 1008 #define ALISDAA_CALLERID_SIZE 512
ian@0 1009
ian@0 1010 #define PLAYBACK_MODE_COMPRESSED 0 /* Selects: Compressed modes, TrueSpeech 8.5-4.1, G.723.1, G.722, G.728, G.729 */
ian@0 1011 #define PLAYBACK_MODE_TRUESPEECH_V40 0 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps */
ian@0 1012 #define PLAYBACK_MODE_TRUESPEECH 8 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps Version 5.1 */
ian@0 1013 #define PLAYBACK_MODE_ULAW 2 /* Selects: 64 Kbit/sec MuA-law PCM */
ian@0 1014 #define PLAYBACK_MODE_ALAW 10 /* Selects: 64 Kbit/sec A-law PCM */
ian@0 1015 #define PLAYBACK_MODE_16LINEAR 6 /* Selects: 128 Kbit/sec 16-bit linear */
ian@0 1016 #define PLAYBACK_MODE_8LINEAR 4 /* Selects: 64 Kbit/sec 8-bit signed linear */
ian@0 1017 #define PLAYBACK_MODE_8LINEAR_WSS 5 /* Selects: 64 Kbit/sec WSS 8-bit unsigned linear */
ian@0 1018
ian@0 1019 #define RECORD_MODE_COMPRESSED 0 /* Selects: Compressed modes, TrueSpeech 8.5-4.1, G.723.1, G.722, G.728, G.729 */
ian@0 1020 #define RECORD_MODE_TRUESPEECH 0 /* Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps */
ian@0 1021 #define RECORD_MODE_ULAW 4 /* Selects: 64 Kbit/sec Mu-law PCM */
ian@0 1022 #define RECORD_MODE_ALAW 12 /* Selects: 64 Kbit/sec A-law PCM */
ian@0 1023 #define RECORD_MODE_16LINEAR 5 /* Selects: 128 Kbit/sec 16-bit linear */
ian@0 1024 #define RECORD_MODE_8LINEAR 6 /* Selects: 64 Kbit/sec 8-bit signed linear */
ian@0 1025 #define RECORD_MODE_8LINEAR_WSS 7 /* Selects: 64 Kbit/sec WSS 8-bit unsigned linear */
ian@0 1026
ian@0 1027 enum SLIC_STATES {
ian@0 1028 PLD_SLIC_STATE_OC = 0,
ian@0 1029 PLD_SLIC_STATE_RINGING,
ian@0 1030 PLD_SLIC_STATE_ACTIVE,
ian@0 1031 PLD_SLIC_STATE_OHT,
ian@0 1032 PLD_SLIC_STATE_TIPOPEN,
ian@0 1033 PLD_SLIC_STATE_STANDBY,
ian@0 1034 PLD_SLIC_STATE_APR,
ian@0 1035 PLD_SLIC_STATE_OHTPR
ian@0 1036 };
ian@0 1037
ian@0 1038 enum SCI_CONTROL {
ian@0 1039 SCI_End = 0,
ian@0 1040 SCI_Enable_DAA,
ian@0 1041 SCI_Enable_Mixer,
ian@0 1042 SCI_Enable_EEPROM
ian@0 1043 };
ian@0 1044
ian@0 1045 enum Mode {
ian@0 1046 T63, T53, T48, T40
ian@0 1047 };
ian@0 1048 enum Dir {
ian@0 1049 V3_TO_V4, V4_TO_V3, V4_TO_V5, V5_TO_V4
ian@0 1050 };
ian@0 1051
ian@0 1052 typedef struct Proc_Info_Tag {
ian@0 1053 enum Mode convert_mode;
ian@0 1054 enum Dir convert_dir;
ian@0 1055 int Prev_Frame_Type;
ian@0 1056 int Current_Frame_Type;
ian@0 1057 } Proc_Info_Type;
ian@0 1058
ian@0 1059 enum PREVAL {
ian@0 1060 NORMAL = 0,
ian@0 1061 NOPOST,
ian@0 1062 POSTONLY,
ian@0 1063 PREERROR
ian@0 1064 };
ian@0 1065
ian@0 1066 enum IXJ_EXTENSIONS {
ian@0 1067 G729LOADER = 0,
ian@0 1068 TS85LOADER,
ian@0 1069 PRE_READ,
ian@0 1070 POST_READ,
ian@0 1071 PRE_WRITE,
ian@0 1072 POST_WRITE,
ian@0 1073 PRE_IOCTL,
ian@0 1074 POST_IOCTL
ian@0 1075 };
ian@0 1076
ian@0 1077 typedef struct {
ian@0 1078 char enable;
ian@0 1079 char en_filter;
ian@0 1080 unsigned int filter;
ian@0 1081 unsigned int state; /* State 0 when cadence has not started. */
ian@0 1082
ian@0 1083 unsigned int on1; /* State 1 */
ian@0 1084
ian@0 1085 unsigned long on1min; /* State 1 - 10% + jiffies */
ian@0 1086 unsigned long on1dot; /* State 1 + jiffies */
ian@0 1087
ian@0 1088 unsigned long on1max; /* State 1 + 10% + jiffies */
ian@0 1089
ian@0 1090 unsigned int off1; /* State 2 */
ian@0 1091
ian@0 1092 unsigned long off1min;
ian@0 1093 unsigned long off1dot; /* State 2 + jiffies */
ian@0 1094 unsigned long off1max;
ian@0 1095 unsigned int on2; /* State 3 */
ian@0 1096
ian@0 1097 unsigned long on2min;
ian@0 1098 unsigned long on2dot;
ian@0 1099 unsigned long on2max;
ian@0 1100 unsigned int off2; /* State 4 */
ian@0 1101
ian@0 1102 unsigned long off2min;
ian@0 1103 unsigned long off2dot; /* State 4 + jiffies */
ian@0 1104 unsigned long off2max;
ian@0 1105 unsigned int on3; /* State 5 */
ian@0 1106
ian@0 1107 unsigned long on3min;
ian@0 1108 unsigned long on3dot;
ian@0 1109 unsigned long on3max;
ian@0 1110 unsigned int off3; /* State 6 */
ian@0 1111
ian@0 1112 unsigned long off3min;
ian@0 1113 unsigned long off3dot; /* State 6 + jiffies */
ian@0 1114 unsigned long off3max;
ian@0 1115 } IXJ_CADENCE_F;
ian@0 1116
ian@0 1117 typedef struct {
ian@0 1118 unsigned int busytone:1;
ian@0 1119 unsigned int dialtone:1;
ian@0 1120 unsigned int ringback:1;
ian@0 1121 unsigned int ringing:1;
ian@0 1122 unsigned int playing:1;
ian@0 1123 unsigned int recording:1;
ian@0 1124 unsigned int cringing:1;
ian@0 1125 unsigned int play_first_frame:1;
ian@0 1126 unsigned int pstn_present:1;
ian@0 1127 unsigned int pstn_ringing:1;
ian@0 1128 unsigned int pots_correct:1;
ian@0 1129 unsigned int pots_pstn:1;
ian@0 1130 unsigned int g729_loaded:1;
ian@0 1131 unsigned int ts85_loaded:1;
ian@0 1132 unsigned int dtmf_oob:1; /* DTMF Out-Of-Band */
ian@0 1133
ian@0 1134 unsigned int pcmciascp:1; /* SmartCABLE Present */
ian@0 1135
ian@0 1136 unsigned int pcmciasct:2; /* SmartCABLE Type */
ian@0 1137
ian@0 1138 unsigned int pcmciastate:3; /* SmartCABLE Init State */
ian@0 1139
ian@0 1140 unsigned int inwrite:1; /* Currently writing */
ian@0 1141
ian@0 1142 unsigned int inread:1; /* Currently reading */
ian@0 1143
ian@0 1144 unsigned int incheck:1; /* Currently checking the SmartCABLE */
ian@0 1145
ian@0 1146 unsigned int cidplay:1; /* Currently playing Caller ID */
ian@0 1147
ian@0 1148 unsigned int cidring:1; /* This is the ring for Caller ID */
ian@0 1149
ian@0 1150 unsigned int cidsent:1; /* Caller ID has been sent */
ian@0 1151
ian@0 1152 unsigned int cidcw_ack:1; /* Caller ID CW ACK (from CPE) */
ian@0 1153 unsigned int firstring:1; /* First ring cadence is complete */
ian@0 1154 unsigned int pstncheck:1; /* Currently checking the PSTN Line */
ian@0 1155 unsigned int pstn_rmr:1;
ian@0 1156 unsigned int x:3; /* unsed bits */
ian@0 1157
ian@0 1158 } IXJ_FLAGS;
ian@0 1159
ian@0 1160 /******************************************************************************
ian@0 1161 *
ian@0 1162 * This structure holds the state of all of the Quicknet cards
ian@0 1163 *
ian@0 1164 ******************************************************************************/
ian@0 1165
ian@0 1166 typedef struct {
ian@0 1167 int elements_used;
ian@0 1168 IXJ_CADENCE_TERM termination;
ian@0 1169 IXJ_CADENCE_ELEMENT *ce;
ian@0 1170 } ixj_cadence;
ian@0 1171
ian@0 1172 typedef struct {
ian@0 1173 struct phone_device p;
ian@0 1174 struct timer_list timer;
ian@0 1175 unsigned int board;
ian@0 1176 unsigned int DSPbase;
ian@0 1177 unsigned int XILINXbase;
ian@0 1178 unsigned int serial;
ian@0 1179 atomic_t DSPWrite;
ian@0 1180 struct phone_capability caplist[30];
ian@0 1181 unsigned int caps;
ian@0 1182 struct pnp_dev *dev;
ian@0 1183 unsigned int cardtype;
ian@0 1184 unsigned int rec_codec;
ian@0 1185 unsigned int cid_rec_codec;
ian@0 1186 unsigned int cid_rec_volume;
ian@0 1187 unsigned char cid_rec_flag;
ian@0 1188 signed char rec_mode;
ian@0 1189 unsigned int play_codec;
ian@0 1190 unsigned int cid_play_codec;
ian@0 1191 unsigned int cid_play_volume;
ian@0 1192 unsigned char cid_play_flag;
ian@0 1193 signed char play_mode;
ian@0 1194 IXJ_FLAGS flags;
ian@0 1195 unsigned long busyflags;
ian@0 1196 unsigned int rec_frame_size;
ian@0 1197 unsigned int play_frame_size;
ian@0 1198 unsigned int cid_play_frame_size;
ian@0 1199 unsigned int cid_base_frame_size;
ian@0 1200 unsigned long cidcw_wait;
ian@0 1201 int aec_level;
ian@0 1202 int cid_play_aec_level;
ian@0 1203 int readers, writers;
ian@0 1204 wait_queue_head_t poll_q;
ian@0 1205 wait_queue_head_t read_q;
ian@0 1206 char *read_buffer, *read_buffer_end;
ian@0 1207 char *read_convert_buffer;
ian@0 1208 size_t read_buffer_size;
ian@0 1209 unsigned int read_buffer_ready;
ian@0 1210 wait_queue_head_t write_q;
ian@0 1211 char *write_buffer, *write_buffer_end;
ian@0 1212 char *write_convert_buffer;
ian@0 1213 size_t write_buffer_size;
ian@0 1214 unsigned int write_buffers_empty;
ian@0 1215 unsigned long drybuffer;
ian@0 1216 char *write_buffer_rp, *write_buffer_wp;
ian@0 1217 char dtmfbuffer[80];
ian@0 1218 char dtmf_current;
ian@0 1219 int dtmf_wp, dtmf_rp, dtmf_state, dtmf_proc;
ian@0 1220 int tone_off_time, tone_on_time;
ian@0 1221 struct fasync_struct *async_queue;
ian@0 1222 unsigned long tone_start_jif;
ian@0 1223 char tone_index;
ian@0 1224 char tone_state;
ian@0 1225 char maxrings;
ian@0 1226 ixj_cadence *cadence_t;
ian@0 1227 ixj_cadence *cadence_r;
ian@0 1228 int tone_cadence_state;
ian@0 1229 IXJ_CADENCE_F cadence_f[6];
ian@0 1230 DTMF dtmf;
ian@0 1231 CPTF cptf;
ian@0 1232 BYTES dsp;
ian@0 1233 BYTES ver;
ian@0 1234 BYTES scr;
ian@0 1235 BYTES ssr;
ian@0 1236 BYTES baseframe;
ian@0 1237 HSR hsr;
ian@0 1238 GPIO gpio;
ian@0 1239 PLD_SCRR pld_scrr;
ian@0 1240 PLD_SCRW pld_scrw;
ian@0 1241 PLD_SLICW pld_slicw;
ian@0 1242 PLD_SLICR pld_slicr;
ian@0 1243 PLD_CLOCK pld_clock;
ian@0 1244 PCMCIA_CR1 pccr1;
ian@0 1245 PCMCIA_CR2 pccr2;
ian@0 1246 PCMCIA_SCCR psccr;
ian@0 1247 PCMCIA_SLIC pslic;
ian@0 1248 char pscdd;
ian@0 1249 Si3C1 sic1;
ian@0 1250 Si3C2 sic2;
ian@0 1251 Si3RXG sirxg;
ian@0 1252 Si3ADC siadc;
ian@0 1253 Si3DAC sidac;
ian@0 1254 Si3STAT sistat;
ian@0 1255 Si3AATT siaatt;
ian@0 1256 MIX mix;
ian@0 1257 unsigned short ring_cadence;
ian@0 1258 int ring_cadence_t;
ian@0 1259 unsigned long ring_cadence_jif;
ian@0 1260 unsigned long checkwait;
ian@0 1261 int intercom;
ian@0 1262 int m_hook;
ian@0 1263 int r_hook;
ian@0 1264 int p_hook;
ian@0 1265 char pstn_envelope;
ian@0 1266 char pstn_cid_intr;
ian@0 1267 unsigned char fskz;
ian@0 1268 unsigned char fskphase;
ian@0 1269 unsigned char fskcnt;
ian@0 1270 unsigned int cidsize;
ian@0 1271 unsigned int cidcnt;
ian@0 1272 unsigned long pstn_cid_received;
ian@0 1273 PHONE_CID cid;
ian@0 1274 PHONE_CID cid_send;
ian@0 1275 unsigned long pstn_ring_int;
ian@0 1276 unsigned long pstn_ring_start;
ian@0 1277 unsigned long pstn_ring_stop;
ian@0 1278 unsigned long pstn_winkstart;
ian@0 1279 unsigned long pstn_last_rmr;
ian@0 1280 unsigned long pstn_prev_rmr;
ian@0 1281 unsigned long pots_winkstart;
ian@0 1282 unsigned int winktime;
ian@0 1283 unsigned long flash_end;
ian@0 1284 char port;
ian@0 1285 char hookstate;
ian@0 1286 union telephony_exception ex;
ian@0 1287 union telephony_exception ex_sig;
ian@0 1288 int ixj_signals[35];
ian@0 1289 IXJ_SIGDEF sigdef;
ian@0 1290 char daa_mode;
ian@0 1291 char daa_country;
ian@0 1292 unsigned long pstn_sleeptil;
ian@0 1293 DAA_REGS m_DAAShadowRegs;
ian@0 1294 Proc_Info_Type Info_read;
ian@0 1295 Proc_Info_Type Info_write;
ian@0 1296 unsigned short frame_count;
ian@0 1297 unsigned int filter_hist[4];
ian@0 1298 unsigned char filter_en[4];
ian@0 1299 unsigned short proc_load;
ian@0 1300 unsigned long framesread;
ian@0 1301 unsigned long frameswritten;
ian@0 1302 unsigned long read_wait;
ian@0 1303 unsigned long write_wait;
ian@0 1304 unsigned long timerchecks;
ian@0 1305 unsigned long txreadycheck;
ian@0 1306 unsigned long rxreadycheck;
ian@0 1307 unsigned long statuswait;
ian@0 1308 unsigned long statuswaitfail;
ian@0 1309 unsigned long pcontrolwait;
ian@0 1310 unsigned long pcontrolwaitfail;
ian@0 1311 unsigned long iscontrolready;
ian@0 1312 unsigned long iscontrolreadyfail;
ian@0 1313 unsigned long pstnstatecheck;
ian@0 1314 #ifdef IXJ_DYN_ALLOC
ian@0 1315 short *fskdata;
ian@0 1316 #else
ian@0 1317 short fskdata[8000];
ian@0 1318 #endif
ian@0 1319 int fsksize;
ian@0 1320 int fskdcnt;
ian@0 1321 } IXJ;
ian@0 1322
ian@0 1323 typedef int (*IXJ_REGFUNC) (IXJ * j, unsigned long arg);
ian@0 1324
ian@0 1325 extern IXJ *ixj_pcmcia_probe(unsigned long, unsigned long);
ian@0 1326