annotate Documentation/pcieaer-howto.txt @ 897:329ea0ccb344

balloon: try harder to balloon up under memory pressure.

Currently if the balloon driver is unable to increase the guest's
reservation it assumes the failure was due to reaching its full
allocation, gives up on the ballooning operation and records the limit
it reached as the "hard limit". The driver will not try again until
the target is set again (even to the same value).

However it is possible that ballooning has in fact failed due to
memory pressure in the host and therefore it is desirable to keep
attempting to reach the target in case memory becomes available. The
most likely scenario is that some guests are ballooning down while
others are ballooning up and therefore there is temporary memory
pressure while things stabilise. You would not expect a well behaved
toolstack to ask a domain to balloon to more than its allocation nor
would you expect it to deliberately over-commit memory by setting
balloon targets which exceed the total host memory.

This patch drops the concept of a hard limit and causes the balloon
driver to retry increasing the reservation on a timer in the same
manner as when decreasing the reservation.

Also if we partially succeed in increasing the reservation
(i.e. receive less pages than we asked for) then we may as well keep
those pages rather than returning them to Xen.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jun 05 14:01:20 2009 +0100 (2009-06-05)
parents 69e10455038e
rev   line source
keir@731 1 The PCI Express Advanced Error Reporting Driver Guide HOWTO
keir@731 2 T. Long Nguyen <tom.l.nguyen@intel.com>
keir@731 3 Yanmin Zhang <yanmin.zhang@intel.com>
keir@731 4 07/29/2006
keir@731 5
keir@731 6
keir@731 7 1. Overview
keir@731 8
keir@731 9 1.1 About this guide
keir@731 10
keir@731 11 This guide describes the basics of the PCI Express Advanced Error
keir@731 12 Reporting (AER) driver and provides information on how to use it, as
keir@731 13 well as how to enable the drivers of endpoint devices to conform with
keir@731 14 PCI Express AER driver.
keir@731 15
keir@731 16 1.2 Copyright Intel Corporation 2006.
keir@731 17
keir@731 18 1.3 What is the PCI Express AER Driver?
keir@731 19
keir@731 20 PCI Express error signaling can occur on the PCI Express link itself
keir@731 21 or on behalf of transactions initiated on the link. PCI Express
keir@731 22 defines two error reporting paradigms: the baseline capability and
keir@731 23 the Advanced Error Reporting capability. The baseline capability is
keir@731 24 required of all PCI Express components providing a minimum defined
keir@731 25 set of error reporting requirements. Advanced Error Reporting
keir@731 26 capability is implemented with a PCI Express advanced error reporting
keir@731 27 extended capability structure providing more robust error reporting.
keir@731 28
keir@731 29 The PCI Express AER driver provides the infrastructure to support PCI
keir@731 30 Express Advanced Error Reporting capability. The PCI Express AER
keir@731 31 driver provides three basic functions:
keir@731 32
keir@731 33 - Gathers the comprehensive error information if errors occurred.
keir@731 34 - Reports error to the users.
keir@731 35 - Performs error recovery actions.
keir@731 36
keir@731 37 AER driver only attaches root ports which support PCI-Express AER
keir@731 38 capability.
keir@731 39
keir@731 40
keir@731 41 2. User Guide
keir@731 42
keir@731 43 2.1 Include the PCI Express AER Root Driver into the Linux Kernel
keir@731 44
keir@731 45 The PCI Express AER Root driver is a Root Port service driver attached
keir@731 46 to the PCI Express Port Bus driver. If a user wants to use it, the driver
keir@731 47 has to be compiled. Option CONFIG_PCIEAER supports this capability. It
keir@731 48 depends on CONFIG_PCIEPORTBUS, so pls. set CONFIG_PCIEPORTBUS=y and
keir@731 49 CONFIG_PCIEAER = y.
keir@731 50
keir@731 51 2.2 Load PCI Express AER Root Driver
keir@731 52 There is a case where a system has AER support in BIOS. Enabling the AER
keir@731 53 Root driver and having AER support in BIOS may result unpredictable
keir@731 54 behavior. To avoid this conflict, a successful load of the AER Root driver
keir@731 55 requires ACPI _OSC support in the BIOS to allow the AER Root driver to
keir@731 56 request for native control of AER. See the PCI FW 3.0 Specification for
keir@731 57 details regarding OSC usage. Currently, lots of firmwares don't provide
keir@731 58 _OSC support while they use PCI Express. To support such firmwares,
keir@731 59 forceload, a parameter of type bool, could enable AER to continue to
keir@731 60 be initiated although firmwares have no _OSC support. To enable the
keir@731 61 walkaround, pls. add aerdriver.forceload=y to kernel boot parameter line
keir@731 62 when booting kernel. Note that forceload=n by default.
keir@731 63
keir@731 64 2.3 AER error output
keir@731 65 When a PCI-E AER error is captured, an error message will be outputed to
keir@731 66 console. If it's a correctable error, it is outputed as a warning.
keir@731 67 Otherwise, it is printed as an error. So users could choose different
keir@731 68 log level to filter out correctable error messages.
keir@731 69
keir@731 70 Below shows an example.
keir@731 71 +------ PCI-Express Device Error -----+
keir@731 72 Error Severity : Uncorrected (Fatal)
keir@731 73 PCIE Bus Error type : Transaction Layer
keir@731 74 Unsupported Request : First
keir@731 75 Requester ID : 0500
keir@731 76 VendorID=8086h, DeviceID=0329h, Bus=05h, Device=00h, Function=00h
keir@731 77 TLB Header:
keir@731 78 04000001 00200a03 05010000 00050100
keir@731 79
keir@731 80 In the example, 'Requester ID' means the ID of the device who sends
keir@731 81 the error message to root port. Pls. refer to pci express specs for
keir@731 82 other fields.
keir@731 83
keir@731 84
keir@731 85 3. Developer Guide
keir@731 86
keir@731 87 To enable AER aware support requires a software driver to configure
keir@731 88 the AER capability structure within its device and to provide callbacks.
keir@731 89
keir@731 90 To support AER better, developers need understand how AER does work
keir@731 91 firstly.
keir@731 92
keir@731 93 PCI Express errors are classified into two types: correctable errors
keir@731 94 and uncorrectable errors. This classification is based on the impacts
keir@731 95 of those errors, which may result in degraded performance or function
keir@731 96 failure.
keir@731 97
keir@731 98 Correctable errors pose no impacts on the functionality of the
keir@731 99 interface. The PCI Express protocol can recover without any software
keir@731 100 intervention or any loss of data. These errors are detected and
keir@731 101 corrected by hardware. Unlike correctable errors, uncorrectable
keir@731 102 errors impact functionality of the interface. Uncorrectable errors
keir@731 103 can cause a particular transaction or a particular PCI Express link
keir@731 104 to be unreliable. Depending on those error conditions, uncorrectable
keir@731 105 errors are further classified into non-fatal errors and fatal errors.
keir@731 106 Non-fatal errors cause the particular transaction to be unreliable,
keir@731 107 but the PCI Express link itself is fully functional. Fatal errors, on
keir@731 108 the other hand, cause the link to be unreliable.
keir@731 109
keir@731 110 When AER is enabled, a PCI Express device will automatically send an
keir@731 111 error message to the PCIE root port above it when the device captures
keir@731 112 an error. The Root Port, upon receiving an error reporting message,
keir@731 113 internally processes and logs the error message in its PCI Express
keir@731 114 capability structure. Error information being logged includes storing
keir@731 115 the error reporting agent's requestor ID into the Error Source
keir@731 116 Identification Registers and setting the error bits of the Root Error
keir@731 117 Status Register accordingly. If AER error reporting is enabled in Root
keir@731 118 Error Command Register, the Root Port generates an interrupt if an
keir@731 119 error is detected.
keir@731 120
keir@731 121 Note that the errors as described above are related to the PCI Express
keir@731 122 hierarchy and links. These errors do not include any device specific
keir@731 123 errors because device specific errors will still get sent directly to
keir@731 124 the device driver.
keir@731 125
keir@731 126 3.1 Configure the AER capability structure
keir@731 127
keir@731 128 AER aware drivers of PCI Express component need change the device
keir@731 129 control registers to enable AER. They also could change AER registers,
keir@731 130 including mask and severity registers. Helper function
keir@731 131 pci_enable_pcie_error_reporting could be used to enable AER. See
keir@731 132 section 3.3.
keir@731 133
keir@731 134 3.2. Provide callbacks
keir@731 135
keir@731 136 3.2.1 callback reset_link to reset pci express link
keir@731 137
keir@731 138 This callback is used to reset the pci express physical link when a
keir@731 139 fatal error happens. The root port aer service driver provides a
keir@731 140 default reset_link function, but different upstream ports might
keir@731 141 have different specifications to reset pci express link, so all
keir@731 142 upstream ports should provide their own reset_link functions.
keir@731 143
keir@731 144 In struct pcie_port_service_driver, a new pointer, reset_link, is
keir@731 145 added.
keir@731 146
keir@731 147 pci_ers_result_t (*reset_link) (struct pci_dev *dev);
keir@731 148
keir@731 149 Section provides more detailed info on when to call
keir@731 150 reset_link.
keir@731 151
keir@731 152 3.2.2 PCI error-recovery callbacks
keir@731 153
keir@731 154 The PCI Express AER Root driver uses error callbacks to coordinate
keir@731 155 with downstream device drivers associated with a hierarchy in question
keir@731 156 when performing error recovery actions.
keir@731 157
keir@731 158 Data struct pci_driver has a pointer, err_handler, to point to
keir@731 159 pci_error_handlers who consists of a couple of callback function
keir@731 160 pointers. AER driver follows the rules defined in
keir@731 161 pci-error-recovery.txt except pci express specific parts (e.g.
keir@731 162 reset_link). Pls. refer to pci-error-recovery.txt for detailed
keir@731 163 definitions of the callbacks.
keir@731 164
keir@731 165 Below sections specify when to call the error callback functions.
keir@731 166
keir@731 167 Correctable errors
keir@731 168
keir@731 169 Correctable errors pose no impacts on the functionality of
keir@731 170 the interface. The PCI Express protocol can recover without any
keir@731 171 software intervention or any loss of data. These errors do not
keir@731 172 require any recovery actions. The AER driver clears the device's
keir@731 173 correctable error status register accordingly and logs these errors.
keir@731 174
keir@731 175 Non-correctable (non-fatal and fatal) errors
keir@731 176
keir@731 177 If an error message indicates a non-fatal error, performing link reset
keir@731 178 at upstream is not required. The AER driver calls error_detected(dev,
keir@731 179 pci_channel_io_normal) to all drivers associated within a hierarchy in
keir@731 180 question. for example,
keir@731 181 EndPoint<==>DownstreamPort B<==>UpstreamPort A<==>RootPort.
keir@731 182 If Upstream port A captures an AER error, the hierarchy consists of
keir@731 183 Downstream port B and EndPoint.
keir@731 184
keir@731 185 A driver may return PCI_ERS_RESULT_CAN_RECOVER,
keir@731 187 whether it can recover or the AER driver calls mmio_enabled as next.
keir@731 188
keir@731 189 If an error message indicates a fatal error, kernel will broadcast
keir@731 190 error_detected(dev, pci_channel_io_frozen) to all drivers within
keir@731 191 a hierarchy in question. Then, performing link reset at upstream is
keir@731 192 necessary. As different kinds of devices might use different approaches
keir@731 193 to reset link, AER port service driver is required to provide the
keir@731 194 function to reset link. Firstly, kernel looks for if the upstream
keir@731 195 component has an aer driver. If it has, kernel uses the reset_link
keir@731 196 callback of the aer driver. If the upstream component has no aer driver
keir@731 197 and the port is downstream port, we will use the aer driver of the
keir@731 198 root port who reports the AER error. As for upstream ports,
keir@731 199 they should provide their own aer service drivers with reset_link
keir@731 200 function. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER and
keir@731 201 reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes
keir@731 202 to mmio_enabled.
keir@731 203
keir@731 204 3.3 helper functions
keir@731 205
keir@731 206 3.3.1 int pci_find_aer_capability(struct pci_dev *dev);
keir@731 207 pci_find_aer_capability locates the PCI Express AER capability
keir@731 208 in the device configuration space. If the device doesn't support
keir@731 209 PCI-Express AER, the function returns 0.
keir@731 210
keir@731 211 3.3.2 int pci_enable_pcie_error_reporting(struct pci_dev *dev);
keir@731 212 pci_enable_pcie_error_reporting enables the device to send error
keir@731 213 messages to root port when an error is detected. Note that devices
keir@731 214 don't enable the error reporting by default, so device drivers need
keir@731 215 call this function to enable it.
keir@731 216
keir@731 217 3.3.3 int pci_disable_pcie_error_reporting(struct pci_dev *dev);
keir@731 218 pci_disable_pcie_error_reporting disables the device to send error
keir@731 219 messages to root port when an error is detected.
keir@731 220
keir@731 221 3.3.4 int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
keir@731 222 pci_cleanup_aer_uncorrect_error_status cleanups the uncorrectable
keir@731 223 error status register.
keir@731 224
keir@731 225 3.4 Frequent Asked Questions
keir@731 226
keir@731 227 Q: What happens if a PCI Express device driver does not provide an
keir@731 228 error recovery handler (pci_driver->err_handler is equal to NULL)?
keir@731 229
keir@731 230 A: The devices attached with the driver won't be recovered. If the
keir@731 231 error is fatal, kernel will print out warning messages. Please refer
keir@731 232 to section 3 for more information.
keir@731 233
keir@731 234 Q: What happens if an upstream port service driver does not provide
keir@731 235 callback reset_link?
keir@731 236
keir@731 237 A: Fatal error recovery will fail if the errors are reported by the
keir@731 238 upstream ports who are attached by the service driver.
keir@731 239
keir@731 240 Q: How does this infrastructure deal with driver that is not PCI
keir@731 241 Express aware?
keir@731 242
keir@731 243 A: This infrastructure calls the error callback functions of the
keir@731 244 driver when an error happens. But if the driver is not aware of
keir@731 245 PCI Express, the device might not report its own errors to root
keir@731 246 port.
keir@731 247
keir@731 248 Q: What modifications will that driver need to make it compatible
keir@731 249 with the PCI Express AER Root driver?
keir@731 250
keir@731 251 A: It could call the helper functions to enable AER in devices and
keir@731 252 cleanup uncorrectable status register. Pls. refer to section 3.3.
keir@731 253