direct-io.hg

changeset 12504:f555a90bcc37

[HVM] Reworked interrupt distribution logic.

TODO:
1. Fix IO-APIC ID to not conflict with LAPIC IDS.
2. Fix i8259 device model (seems to work already though!).
3. Add INTSRC overrides in MPBIOS and ACPI tables so
that PCI legacy IRQ routing always ends up at an
IO-APIC input with level trigger. Restricting link
routing to {5,6,10,11} and setting overrides for all
four of those would work.

Signed-off-by: Keir Fraser <keir@xensource.com>
author kfraser@localhost.localdomain
date Tue Nov 21 19:22:25 2006 +0000 (2006-11-21)
parents b80f00215bba
children fc11c91e5371
files tools/firmware/hvmloader/acpi/acpi2_0.h tools/firmware/hvmloader/acpi/dsdt.asl tools/firmware/hvmloader/acpi/dsdt.c tools/firmware/hvmloader/acpi/gen.c tools/firmware/hvmloader/hvmloader.c tools/firmware/hvmloader/mp_tables.c tools/firmware/rombios/rombios.c tools/ioemu/Makefile.target tools/ioemu/target-i386-dm/i8259-dm.c tools/ioemu/target-i386-dm/piix_pci-dm.c tools/libxc/xc_misc.c tools/libxc/xenctrl.h xen/arch/x86/hvm/Makefile xen/arch/x86/hvm/hvm.c xen/arch/x86/hvm/i8259.c xen/arch/x86/hvm/irq.c xen/arch/x86/hvm/rtc.c xen/arch/x86/hvm/svm/intr.c xen/arch/x86/hvm/vioapic.c xen/arch/x86/hvm/vlapic.c xen/arch/x86/hvm/vmx/io.c xen/include/asm-x86/hvm/domain.h xen/include/asm-x86/hvm/io.h xen/include/asm-x86/hvm/irq.h xen/include/asm-x86/hvm/vioapic.h xen/include/asm-x86/hvm/vpic.h xen/include/public/hvm/hvm_op.h
line diff
     1.1 --- a/tools/firmware/hvmloader/acpi/acpi2_0.h	Tue Nov 21 17:34:17 2006 +0000
     1.2 +++ b/tools/firmware/hvmloader/acpi/acpi2_0.h	Tue Nov 21 19:22:25 2006 +0000
     1.3 @@ -327,7 +327,6 @@ struct acpi_20_madt {
     1.4  #pragma pack ()
     1.5  
     1.6  #define ACPI_PHYSICAL_ADDRESS 0xEA000
     1.7 -#define ACPI_TABLE_SIZE (4*1024)
     1.8  
     1.9  void AcpiBuildTable(uint8_t *buf);
    1.10  
     2.1 --- a/tools/firmware/hvmloader/acpi/dsdt.asl	Tue Nov 21 17:34:17 2006 +0000
     2.2 +++ b/tools/firmware/hvmloader/acpi/dsdt.asl	Tue Nov 21 19:22:25 2006 +0000
     2.3 @@ -1,24 +1,21 @@
     2.4 -//**********************************************************************//
     2.5 -//*
     2.6 -//* Copyright (c) 2004, Intel Corporation.
     2.7 -//*
     2.8 -//* This program is free software; you can redistribute it and/or modify it
     2.9 -//* under the terms and conditions of the GNU General Public License,
    2.10 -//* version 2, as published by the Free Software Foundation.
    2.11 -//*
    2.12 -//* This program is distributed in the hope it will be useful, but WITHOUT
    2.13 -//* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    2.14 -//* FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
    2.15 -//* more details.
    2.16 -//*
    2.17 -//* You should have received a copy of the GNU General Public License along with
    2.18 -//* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
    2.19 -//* Place - Suite 330, Boston, MA 02111-1307 USA.
    2.20 -
    2.21 -//**
    2.22 -//**  DSDT for Xen with Qemu device model
    2.23 -//**
    2.24 -//**
    2.25 +/******************************************************************************
    2.26 + * DSDT for Xen with Qemu device model
    2.27 + *
    2.28 + * Copyright (c) 2004, Intel Corporation.
    2.29 + *
    2.30 + * This program is free software; you can redistribute it and/or modify it
    2.31 + * under the terms and conditions of the GNU General Public License,
    2.32 + * version 2, as published by the Free Software Foundation.
    2.33 + *
    2.34 + * This program is distributed in the hope it will be useful, but WITHOUT
    2.35 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    2.36 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
    2.37 + * more details.
    2.38 + *
    2.39 + * You should have received a copy of the GNU General Public License along with
    2.40 + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
    2.41 + * Place - Suite 330, Boston, MA 02111-1307 USA.
    2.42 + */
    2.43  
    2.44  DefinitionBlock ("DSDT.aml", "DSDT", 1, "INTEL","int-xen", 2006)
    2.45  {
    2.46 @@ -36,11 +33,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, 
    2.47          Processor (CPU1, 0x01, 0x00000000, 0x00) {}
    2.48          Processor (CPU2, 0x02, 0x00000000, 0x00) {}
    2.49          Processor (CPU3, 0x03, 0x00000000, 0x00) {}
    2.50 -
    2.51      }
    2.52  
    2.53 -/* Poweroff support - ties in with qemu emulation */
    2.54 -
    2.55 +    /* Poweroff support - ties in with qemu emulation */
    2.56      Name (\_S5, Package (0x04)
    2.57      {
    2.58          0x07,
    2.59 @@ -49,318 +44,476 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, 
    2.60          0x00
    2.61      })
    2.62  
    2.63 -
    2.64      Name(PICD, 0)
    2.65 +    Method(_PIC, 1)
    2.66 +    {
    2.67 +        Store(Arg0, PICD) 
    2.68 +    }
    2.69  
    2.70 -    Method(_PIC, 1) { 
    2.71 - 
    2.72 -    Store(Arg0, PICD) 
    2.73 -    }
    2.74      Scope (\_SB)
    2.75      {
    2.76 -       /* Fix HCT test for 0x400 pci memory - need to report low 640 MB mem as motherboard resource            */
    2.77 +        /* Fix HCT test for 0x400 pci memory:
    2.78 +         * - need to report low 640 MB mem as motherboard resource
    2.79 +         */
    2.80  
    2.81 -       Device(MEM0) {
    2.82 +       Device(MEM0)
    2.83 +       {
    2.84             Name(_HID, EISAID("PNP0C02"))
    2.85             Name(_CRS, ResourceTemplate() {
    2.86 -           QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
    2.87 +               QWordMemory(
    2.88 +                    ResourceConsumer, PosDecode, MinFixed,
    2.89 +                    MaxFixed, Cacheable, ReadWrite,
    2.90                      0x00000000,
    2.91                      0x00000000,
    2.92                      0x0009ffff,
    2.93                      0x00000000,
    2.94                      0x000a0000)
    2.95 -           }
    2.96 -           )
    2.97 +           })
    2.98         }
    2.99  
   2.100         Device (PCI0)
   2.101 -        {
   2.102 +       {
   2.103             Name (_HID, EisaId ("PNP0A03"))
   2.104             Name (_UID, 0x00)
   2.105             Name (_ADR, 0x00)
   2.106             Name (_BBN, 0x00)
   2.107             OperationRegion (PIRP, PCI_Config, 0x3c, 0x10)
   2.108             Field(PIRP, ByteAcc, NoLock, Preserve){        
   2.109 -          IRQ3,3,
   2.110 -          IRQ5,5,
   2.111 -          IRQ7,7,
   2.112 -          IRQ9,9,
   2.113 -          IRQA,10,
   2.114 -          IRQB,11
   2.115 -         }
   2.116 +               IRQ3, 3,
   2.117 +               IRQ5, 5,
   2.118 +               IRQ7, 7,
   2.119 +               IRQ9, 9,
   2.120 +               IRQA, 10,
   2.121 +               IRQB, 11
   2.122 +           }
   2.123   
   2.124 -            Method (_CRS, 0, NotSerialized)
   2.125 -            {
   2.126 -          
   2.127 +           Method (_CRS, 0, NotSerialized)
   2.128 +           {
   2.129                 Name (PRT0, ResourceTemplate ()
   2.130 -                {
   2.131 -         /* bus number is from 0 - 255*/
   2.132 -                    WordBusNumber (ResourceConsumer, MinFixed, MaxFixed, SubDecode,
   2.133 +               {
   2.134 +                   /* bus number is from 0 - 255*/
   2.135 +                   WordBusNumber(
   2.136 +                        ResourceConsumer, MinFixed, MaxFixed, SubDecode,
   2.137                          0x0000,
   2.138                          0x0000,
   2.139                          0x00FF,
   2.140                          0x0000,
   2.141                          0x0100)
   2.142                      IO (Decode16, 0x0CF8, 0x0CF8, 0x01, 0x08)
   2.143 -                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
   2.144 +                    WordIO(
   2.145 +                        ResourceProducer, MinFixed, MaxFixed, PosDecode,
   2.146 +                        EntireRange,
   2.147                          0x0000,
   2.148                          0x0000,
   2.149                          0x0CF7,
   2.150                          0x0000,
   2.151                          0x0CF8)
   2.152 -                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
   2.153 +                    WordIO(
   2.154 +                        ResourceProducer, MinFixed, MaxFixed, PosDecode,
   2.155 +                        EntireRange,
   2.156                          0x0000,
   2.157                          0x0D00,
   2.158                          0xFFFF,
   2.159                          0x0000,
   2.160                          0xF300)
   2.161  
   2.162 -                /* reserve memory for pci devices */
   2.163 -
   2.164 -                    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
   2.165 +                    /* reserve memory for pci devices */
   2.166 +                    DWordMemory(
   2.167 +                        ResourceProducer, PosDecode, MinFixed, MaxFixed,
   2.168 +                        Cacheable, ReadWrite,
   2.169                          0x00000000,
   2.170                          0x000A0000,
   2.171                          0x000BFFFF,
   2.172                          0x00000000,
   2.173                          0x00020000)
   2.174  
   2.175 -                    DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
   2.176 +                    DWordMemory(
   2.177 +                        ResourceConsumer, PosDecode, MinFixed, MaxFixed,
   2.178 +                        Cacheable, ReadWrite,
   2.179                          0x00000000,
   2.180                          0xF0000000,
   2.181                          0xF4FFFFFF,
   2.182                          0x00000000,
   2.183                          0x05000000)
   2.184 -
   2.185                  })
   2.186                  Return (PRT0)
   2.187              }
   2.188 -       Name(BUFA, ResourceTemplate() {
   2.189 -                IRQ(Level, ActiveLow, Shared) {
   2.190 -                        3,4,5,6,7,10,11,12,14,15} 
   2.191 -                }) 
   2.192 -
   2.193 -                Name(BUFB, Buffer(){
   2.194 -                0x23, 0x00, 0x00, 0x18,
   2.195 -                0x79, 0})
   2.196 -
   2.197 -                CreateWordField(BUFB, 0x01, IRQV)
   2.198  
   2.199 -                Name(BUFC, Buffer(){
   2.200 -                5, 7, 10, 11
   2.201 -                 })
   2.202 -                
   2.203 -                CreateByteField(BUFC, 0x01, PIQA)
   2.204 -                CreateByteField(BUFC, 0x01, PIQB)
   2.205 -                CreateByteField(BUFC, 0x01, PIQC)
   2.206 -                CreateByteField(BUFC, 0x01, PIQD)
   2.207 -                
   2.208 -                Device(LNKA)    {
   2.209 -                Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link
   2.210 +            Name(BUFA, ResourceTemplate() {
   2.211 +                IRQ(Level, ActiveLow, Shared) {
   2.212 +                    3,4,5,6,7,10,11,12,14,15
   2.213 +                }
   2.214 +            })
   2.215 +
   2.216 +            Name(BUFB, Buffer() {
   2.217 +                0x23, 0x00, 0x00, 0x18, 0x79, 0
   2.218 +            })
   2.219 +
   2.220 +            CreateWordField(BUFB, 0x01, IRQV)
   2.221 +
   2.222 +            Device(LNKA) {
   2.223 +                Name(_HID, EISAID("PNP0C0F")) /* PCI interrupt link */
   2.224                  Name(_UID, 1)
   2.225 +
   2.226                  Method(_STA, 0) {
   2.227 -                               And(PIRA, 0x80, Local0)
   2.228 -                        If(LEqual(Local0, 0x80)) {
   2.229 -                                Return(0x09)   
   2.230 -                                }
   2.231 -                        Else {
   2.232 -                                Return(0x0B) 
   2.233 -                                }
   2.234 -                        }
   2.235 +                    And(PIRA, 0x80, Local0)
   2.236 +                    If(LEqual(Local0, 0x80)) {
   2.237 +                        Return(0x09)   
   2.238 +                    } Else {
   2.239 +                        Return(0x0B) 
   2.240 +                    }
   2.241 +                }
   2.242  
   2.243                  Method(_PRS) {
   2.244 -
   2.245 -                        Return(BUFA)
   2.246 -                } // Method(_PRS)
   2.247 +                    Return(BUFA)
   2.248 +                }
   2.249  
   2.250                  Method(_DIS) {
   2.251 -                               Or(PIRA, 0x80, PIRA)
   2.252 +                    Or(PIRA, 0x80, PIRA)
   2.253                  }
   2.254  
   2.255                  Method(_CRS) {
   2.256 -                        And(PIRB, 0x0f, Local0) 
   2.257 -                        ShiftLeft(0x1, Local0, IRQV) 
   2.258 -                        Return(BUFB) 
   2.259 -                } 
   2.260 +                    And(PIRA, 0x0f, Local0)
   2.261 +                    ShiftLeft(0x1, Local0, IRQV)
   2.262 +                    Return(BUFB)
   2.263 +                }
   2.264  
   2.265                  Method(_SRS, 1) {
   2.266 -                                CreateWordField(ARG0, 0x01, IRQ1) 
   2.267 -                        FindSetRightBit(IRQ1, Local0) 
   2.268 -                        Decrement(Local0) 
   2.269 -                        Store(Local0, PIRA)
   2.270 -                 } // Method(_SRS)
   2.271 -        }
   2.272 +                    CreateWordField(ARG0, 0x01, IRQ1)
   2.273 +                    FindSetRightBit(IRQ1, Local0)
   2.274 +                    Decrement(Local0)
   2.275 +                    Store(Local0, PIRA)
   2.276 +                }
   2.277 +            }
   2.278  
   2.279 -        Device(LNKB){
   2.280 -                Name(_HID, EISAID("PNP0C0F"))  
   2.281 +            Device(LNKB) {
   2.282 +                Name(_HID, EISAID("PNP0C0F")) /* PCI interrupt link */
   2.283                  Name(_UID, 2)
   2.284 +
   2.285                  Method(_STA, 0) {
   2.286 -                               And(PIRB, 0x80, Local0)
   2.287 -                        If(LEqual(Local0, 0x80)) {
   2.288 -                                Return(0x09) 
   2.289 -                                }
   2.290 -                        Else {
   2.291 -                                Return(0x0B) 
   2.292 -                                }
   2.293 -                        }
   2.294 +                    And(PIRB, 0x80, Local0)
   2.295 +                    If(LEqual(Local0, 0x80)) {
   2.296 +                        Return(0x09) 
   2.297 +                    } Else {
   2.298 +                        Return(0x0B) 
   2.299 +                    }
   2.300 +                }
   2.301  
   2.302                  Method(_PRS) {
   2.303 -                                Return(BUFA) 
   2.304 -                } // Method(_PRS)
   2.305 +                    Return(BUFA) 
   2.306 +                }
   2.307  
   2.308                  Method(_DIS) {
   2.309 -
   2.310 -                               Or(PIRB, 0x80, PIRB)
   2.311 +                    Or(PIRB, 0x80, PIRB)
   2.312                  }
   2.313  
   2.314                  Method(_CRS) {
   2.315 -                        And(PIRB, 0x0f, Local0) 
   2.316 -                        ShiftLeft(0x1, Local0, IRQV) 
   2.317 -                        Return(BUFB) 
   2.318 -                } // Method(_CRS)
   2.319 +                    And(PIRB, 0x0f, Local0) 
   2.320 +                    ShiftLeft(0x1, Local0, IRQV) 
   2.321 +                    Return(BUFB) 
   2.322 +                }
   2.323  
   2.324                  Method(_SRS, 1) {
   2.325 -                        CreateWordField(ARG0, 0x01, IRQ1) 
   2.326 -                        FindSetRightBit(IRQ1, Local0) 
   2.327 -                        Decrement(Local0)
   2.328 -                        Store(Local0, PIRB) 
   2.329 -                 } // Method(_SRS)
   2.330 -        }
   2.331 +                    CreateWordField(ARG0, 0x01, IRQ1) 
   2.332 +                    FindSetRightBit(IRQ1, Local0) 
   2.333 +                    Decrement(Local0)
   2.334 +                    Store(Local0, PIRB) 
   2.335 +                }
   2.336 +            }
   2.337  
   2.338 -        Device(LNKC){
   2.339 -                Name(_HID, EISAID("PNP0C0F")) // PCI interrupt link
   2.340 +            Device(LNKC) {
   2.341 +                Name(_HID, EISAID("PNP0C0F")) /* PCI interrupt link */
   2.342                  Name(_UID, 3)
   2.343 +
   2.344                  Method(_STA, 0) {
   2.345 -                        And(PIRC, 0x80, Local0)
   2.346 -                        If(LEqual(Local0, 0x80)) {
   2.347 -                                Return(0x09) 
   2.348 -                        }
   2.349 -                        Else {
   2.350 -                                Return(0x0B)
   2.351 -                        }
   2.352 +                    And(PIRC, 0x80, Local0)
   2.353 +                    If(LEqual(Local0, 0x80)) {
   2.354 +                        Return(0x09) 
   2.355 +                    } Else {
   2.356 +                        Return(0x0B)
   2.357 +                    }
   2.358                  }
   2.359  
   2.360                  Method(_PRS) { 
   2.361 -                        Return(BUFA)
   2.362 -                } // Method(_PRS)
   2.363 -
   2.364 -                Method(_DIS) {
   2.365 -
   2.366 -                               Or(PIRC, 0x80, PIRC)
   2.367 +                    Return(BUFA)
   2.368                  }
   2.369  
   2.370 -                Method(_CRS) {
   2.371 -                        And(PIRC, 0x0f, Local0) 
   2.372 -                        ShiftLeft(0x1, Local0, IRQV) 
   2.373 -                        Return(BUFB) 
   2.374 -                } // Method(_CRS)
   2.375 -
   2.376 -                Method(_SRS, 1) {
   2.377 -                                CreateWordField(ARG0, 0x01, IRQ1) 
   2.378 -                        FindSetRightBit(IRQ1, Local0) 
   2.379 -                        Decrement(Local0) 
   2.380 -                        Store(Local0, PIRC)
   2.381 -                 } // Method(_SRS)
   2.382 -        }
   2.383 -
   2.384 -        Device(LNKD) {
   2.385 -                Name(_HID, EISAID("PNP0C0F"))  
   2.386 -                Name(_UID, 4)
   2.387 -                Method(_STA, 0) {
   2.388 -                               And(PIRD, 0x80, Local0)
   2.389 -                        If(LEqual(Local0, 0x80)) {
   2.390 -                                Return(0x09) 
   2.391 -                        }
   2.392 -                        Else {
   2.393 -                                Return(0x0B) 
   2.394 -                        }
   2.395 -                }
   2.396 -
   2.397 -                Method(_PRS) { 
   2.398 -                        Return(BUFA) 
   2.399 -                } // Method(_PRS)
   2.400 -
   2.401                  Method(_DIS) {
   2.402 -                               Or(PIRD, 0x80, PIRD)
   2.403 +                    Or(PIRC, 0x80, PIRC)
   2.404                  }
   2.405  
   2.406                  Method(_CRS) {
   2.407 -                        And(PIRD, 0x0f, Local0) 
   2.408 -                        ShiftLeft(0x1, Local0, IRQV) 
   2.409 -                        Return(BUFB) 
   2.410 -                } // Method(_CRS)
   2.411 +                    And(PIRC, 0x0f, Local0) 
   2.412 +                    ShiftLeft(0x1, Local0, IRQV) 
   2.413 +                    Return(BUFB) 
   2.414 +                }
   2.415  
   2.416                  Method(_SRS, 1) {
   2.417 -                                CreateWordField(ARG0, 0x01, IRQ1) 
   2.418 -                        FindSetRightBit(IRQ1, Local0) 
   2.419 -                        Decrement(Local0) 
   2.420 -                        Store(Local0, PIRD) 
   2.421 -                 } // Method(_SRS)
   2.422 -        }
   2.423 -        Method(_PRT,0) {
   2.424 -               If(PICD) {Return(PRTA)}  
   2.425 -               Return (PRTP)  
   2.426 -               } // end _PRT
   2.427 +                    CreateWordField(ARG0, 0x01, IRQ1) 
   2.428 +                    FindSetRightBit(IRQ1, Local0) 
   2.429 +                    Decrement(Local0) 
   2.430 +                    Store(Local0, PIRC)
   2.431 +                }
   2.432 +            }
   2.433  
   2.434 -        Name(PRTP, Package() {
   2.435 -                        // Slot 1, INTA - INTD
   2.436 -                        Package(){0x0000ffff, 0, \_SB.PCI0.LNKA, 0},
   2.437 -                        Package(){0x0000ffff, 1, \_SB.PCI0.LNKB, 0},
   2.438 -                        Package(){0x0000ffff, 2, \_SB.PCI0.LNKC, 0},
   2.439 -                        Package(){0x0000ffff, 3, \_SB.PCI0.LNKD, 0},
   2.440 +            Device(LNKD) {
   2.441 +                Name(_HID, EISAID("PNP0C0F")) /* PCI interrupt link */
   2.442 +                Name(_UID, 4)
   2.443  
   2.444 -                        // Slot 2, INTA - INTD
   2.445 -                        Package(){0x0001ffff, 0, \_SB.PCI0.LNKB, 0},
   2.446 -                        Package(){0x0001ffff, 1, \_SB.PCI0.LNKC, 0},
   2.447 -                        Package(){0x0001ffff, 2, \_SB.PCI0.LNKD, 0},
   2.448 -                        Package(){0x0001ffff, 3, \_SB.PCI0.LNKA, 0},
   2.449 +                Method(_STA, 0) {
   2.450 +                    And(PIRD, 0x80, Local0)
   2.451 +                    If(LEqual(Local0, 0x80)) {
   2.452 +                        Return(0x09) 
   2.453 +                    } Else {
   2.454 +                        Return(0x0B) 
   2.455 +                    }
   2.456 +                }
   2.457 +
   2.458 +                Method(_PRS) { 
   2.459 +                    Return(BUFA) 
   2.460 +                }
   2.461 +
   2.462 +                Method(_DIS) {
   2.463 +                    Or(PIRD, 0x80, PIRD)
   2.464 +                }
   2.465 +
   2.466 +                Method(_CRS) {
   2.467 +                    And(PIRD, 0x0f, Local0) 
   2.468 +                    ShiftLeft(0x1, Local0, IRQV) 
   2.469 +                    Return(BUFB) 
   2.470 +                }
   2.471 +
   2.472 +                Method(_SRS, 1) {
   2.473 +                    CreateWordField(ARG0, 0x01, IRQ1) 
   2.474 +                    FindSetRightBit(IRQ1, Local0) 
   2.475 +                    Decrement(Local0) 
   2.476 +                    Store(Local0, PIRD) 
   2.477 +                }
   2.478 +            }
   2.479 +
   2.480 +            Method(_PRT,0) {
   2.481 +                If(PICD) {
   2.482 +                    Return(PRTA)
   2.483 +                }  
   2.484 +                Return (PRTP)  
   2.485 +            }
   2.486 +
   2.487 +            Name(PRTP, Package() {
   2.488 +                /* Device 0, INTA - INTD */
   2.489 +                Package(){0x0000ffff, 0, \_SB.PCI0.LNKA, 0},
   2.490 +                Package(){0x0000ffff, 1, \_SB.PCI0.LNKB, 0},
   2.491 +                Package(){0x0000ffff, 2, \_SB.PCI0.LNKC, 0},
   2.492 +                Package(){0x0000ffff, 3, \_SB.PCI0.LNKD, 0},
   2.493 +
   2.494 +                /* Device 1, INTA - INTD */
   2.495 +                Package(){0x0001ffff, 0, \_SB.PCI0.LNKB, 0},
   2.496 +                Package(){0x0001ffff, 1, \_SB.PCI0.LNKC, 0},
   2.497 +                Package(){0x0001ffff, 2, \_SB.PCI0.LNKD, 0},
   2.498 +                Package(){0x0001ffff, 3, \_SB.PCI0.LNKA, 0},
   2.499                          
   2.500 -                        // Slot 3, INTA - INTD
   2.501 -                        Package(){0x0002ffff, 0, \_SB.PCI0.LNKC, 0},
   2.502 -                        Package(){0x0002ffff, 1, \_SB.PCI0.LNKD, 0},
   2.503 -                        Package(){0x0002ffff, 2, \_SB.PCI0.LNKA, 0},
   2.504 -                        Package(){0x0002ffff, 3, \_SB.PCI0.LNKB, 0},
   2.505 -                        
   2.506 -                        // Slot 4, INTA - INTD
   2.507 -                        Package(){0x0003ffff, 0, \_SB.PCI0.LNKD, 0},
   2.508 -                        Package(){0x0003ffff, 1, \_SB.PCI0.LNKA, 0},
   2.509 -                        Package(){0x0003ffff, 2, \_SB.PCI0.LNKB, 0},
   2.510 -                        Package(){0x0003ffff, 3, \_SB.PCI0.LNKC, 0},
   2.511 +                /* Device 2, INTA - INTD */
   2.512 +                Package(){0x0002ffff, 0, \_SB.PCI0.LNKC, 0},
   2.513 +                Package(){0x0002ffff, 1, \_SB.PCI0.LNKD, 0},
   2.514 +                Package(){0x0002ffff, 2, \_SB.PCI0.LNKA, 0},
   2.515 +                Package(){0x0002ffff, 3, \_SB.PCI0.LNKB, 0},
   2.516                          
   2.517 -                        // Slot 5, INTA - INTD
   2.518 -                        Package(){0x0004ffff, 0, \_SB.PCI0.LNKA, 0},
   2.519 -                        Package(){0x0004ffff, 1, \_SB.PCI0.LNKB, 0},
   2.520 -                        Package(){0x0004ffff, 2, \_SB.PCI0.LNKC, 0},
   2.521 -                        Package(){0x0004ffff, 3, \_SB.PCI0.LNKD, 0},
   2.522 -                        }
   2.523 -            )
   2.524 -        Name(PRTA, Package(){
   2.525 -                        Package(){0x0001ffff, 0, 0, 5},  // Device 1, INTA
   2.526 -                        Package(){0x0002ffff, 0, 0, 7},  // Device 2, INTA
   2.527 -                        Package(){0x0003ffff, 0, 0, 10}, // Device 3, INTA
   2.528 -                        Package(){0x0004ffff, 0, 0, 11}, // Device 4, INTA
   2.529 -                        }
   2.530 -            )
   2.531 +                /* Device 3, INTA - INTD */
   2.532 +                Package(){0x0003ffff, 0, \_SB.PCI0.LNKD, 0},
   2.533 +                Package(){0x0003ffff, 1, \_SB.PCI0.LNKA, 0},
   2.534 +                Package(){0x0003ffff, 2, \_SB.PCI0.LNKB, 0},
   2.535 +                Package(){0x0003ffff, 3, \_SB.PCI0.LNKC, 0},
   2.536 +                        
   2.537 +                /* Device 4, INTA - INTD */
   2.538 +                Package(){0x0004ffff, 0, \_SB.PCI0.LNKA, 0},
   2.539 +                Package(){0x0004ffff, 1, \_SB.PCI0.LNKB, 0},
   2.540 +                Package(){0x0004ffff, 2, \_SB.PCI0.LNKC, 0},
   2.541 +                Package(){0x0004ffff, 3, \_SB.PCI0.LNKD, 0},
   2.542 +                        
   2.543 +                /* Device 5, INTA - INTD */
   2.544 +                Package(){0x0005ffff, 0, \_SB.PCI0.LNKB, 0},
   2.545 +                Package(){0x0005ffff, 1, \_SB.PCI0.LNKC, 0},
   2.546 +                Package(){0x0005ffff, 2, \_SB.PCI0.LNKD, 0},
   2.547 +                Package(){0x0005ffff, 3, \_SB.PCI0.LNKA, 0},
   2.548 +                        
   2.549 +                /* Device 6, INTA - INTD */
   2.550 +                Package(){0x0006ffff, 0, \_SB.PCI0.LNKC, 0},
   2.551 +                Package(){0x0006ffff, 1, \_SB.PCI0.LNKD, 0},
   2.552 +                Package(){0x0006ffff, 2, \_SB.PCI0.LNKA, 0},
   2.553 +                Package(){0x0006ffff, 3, \_SB.PCI0.LNKB, 0},
   2.554 +                        
   2.555 +                /* Device 7, INTA - INTD */
   2.556 +                Package(){0x0007ffff, 0, \_SB.PCI0.LNKD, 0},
   2.557 +                Package(){0x0007ffff, 1, \_SB.PCI0.LNKA, 0},
   2.558 +                Package(){0x0007ffff, 2, \_SB.PCI0.LNKB, 0},
   2.559 +                Package(){0x0007ffff, 3, \_SB.PCI0.LNKC, 0},
   2.560 +                        
   2.561 +                /* Device 8, INTA - INTD */
   2.562 +                Package(){0x0008ffff, 0, \_SB.PCI0.LNKA, 0},
   2.563 +                Package(){0x0008ffff, 1, \_SB.PCI0.LNKB, 0},
   2.564 +                Package(){0x0008ffff, 2, \_SB.PCI0.LNKC, 0},
   2.565 +                Package(){0x0008ffff, 3, \_SB.PCI0.LNKD, 0},
   2.566 +                        
   2.567 +                /* Device 9, INTA - INTD */
   2.568 +                Package(){0x0009ffff, 0, \_SB.PCI0.LNKB, 0},
   2.569 +                Package(){0x0009ffff, 1, \_SB.PCI0.LNKC, 0},
   2.570 +                Package(){0x0009ffff, 2, \_SB.PCI0.LNKD, 0},
   2.571 +                Package(){0x0009ffff, 3, \_SB.PCI0.LNKA, 0},
   2.572 +                        
   2.573 +                /* Device 10, INTA - INTD */
   2.574 +                Package(){0x000affff, 0, \_SB.PCI0.LNKC, 0},
   2.575 +                Package(){0x000affff, 1, \_SB.PCI0.LNKD, 0},
   2.576 +                Package(){0x000affff, 2, \_SB.PCI0.LNKA, 0},
   2.577 +                Package(){0x000affff, 3, \_SB.PCI0.LNKB, 0},
   2.578 +                        
   2.579 +                /* Device 11, INTA - INTD */
   2.580 +                Package(){0x000bffff, 0, \_SB.PCI0.LNKD, 0},
   2.581 +                Package(){0x000bffff, 1, \_SB.PCI0.LNKA, 0},
   2.582 +                Package(){0x000bffff, 2, \_SB.PCI0.LNKB, 0},
   2.583 +                Package(){0x000bffff, 3, \_SB.PCI0.LNKC, 0},
   2.584 +                        
   2.585 +                /* Device 12, INTA - INTD */
   2.586 +                Package(){0x000cffff, 0, \_SB.PCI0.LNKA, 0},
   2.587 +                Package(){0x000cffff, 1, \_SB.PCI0.LNKB, 0},
   2.588 +                Package(){0x000cffff, 2, \_SB.PCI0.LNKC, 0},
   2.589 +                Package(){0x000cffff, 3, \_SB.PCI0.LNKD, 0},
   2.590 +                        
   2.591 +                /* Device 13, INTA - INTD */
   2.592 +                Package(){0x000dffff, 0, \_SB.PCI0.LNKB, 0},
   2.593 +                Package(){0x000dffff, 1, \_SB.PCI0.LNKC, 0},
   2.594 +                Package(){0x000dffff, 2, \_SB.PCI0.LNKD, 0},
   2.595 +                Package(){0x000dffff, 3, \_SB.PCI0.LNKA, 0},
   2.596 +                        
   2.597 +                /* Device 14, INTA - INTD */
   2.598 +                Package(){0x000effff, 0, \_SB.PCI0.LNKC, 0},
   2.599 +                Package(){0x000effff, 1, \_SB.PCI0.LNKD, 0},
   2.600 +                Package(){0x000effff, 2, \_SB.PCI0.LNKA, 0},
   2.601 +                Package(){0x000effff, 3, \_SB.PCI0.LNKB, 0},
   2.602 +                        
   2.603 +                /* Device 15, INTA - INTD */
   2.604 +                Package(){0x000fffff, 0, \_SB.PCI0.LNKD, 0},
   2.605 +                Package(){0x000fffff, 1, \_SB.PCI0.LNKA, 0},
   2.606 +                Package(){0x000fffff, 2, \_SB.PCI0.LNKB, 0},
   2.607 +                Package(){0x000fffff, 3, \_SB.PCI0.LNKC, 0},
   2.608 +            })
   2.609 +
   2.610 +            Name(PRTA, Package() {
   2.611 +                /* Device 0, INTA - INTD */
   2.612 +                Package(){0x0000ffff, 0, 0, 16},
   2.613 +                Package(){0x0000ffff, 1, 0, 17},
   2.614 +                Package(){0x0000ffff, 2, 0, 18},
   2.615 +                Package(){0x0000ffff, 3, 0, 19},
   2.616 +
   2.617 +                /* Device 1, INTA - INTD */
   2.618 +                Package(){0x0001ffff, 0, 0, 20},
   2.619 +                Package(){0x0001ffff, 1, 0, 21},
   2.620 +                Package(){0x0001ffff, 2, 0, 22},
   2.621 +                Package(){0x0001ffff, 3, 0, 23},
   2.622 +
   2.623 +                /* Device 2, INTA - INTD */
   2.624 +                Package(){0x0002ffff, 0, 0, 24},
   2.625 +                Package(){0x0002ffff, 1, 0, 25},
   2.626 +                Package(){0x0002ffff, 2, 0, 26},
   2.627 +                Package(){0x0002ffff, 3, 0, 27},
   2.628 +
   2.629 +                /* Device 3, INTA - INTD */
   2.630 +                Package(){0x0003ffff, 0, 0, 28},
   2.631 +                Package(){0x0003ffff, 1, 0, 29},
   2.632 +                Package(){0x0003ffff, 2, 0, 30},
   2.633 +                Package(){0x0003ffff, 3, 0, 31},
   2.634 +
   2.635 +                /* Device 4, INTA - INTD */
   2.636 +                Package(){0x0004ffff, 0, 0, 32},
   2.637 +                Package(){0x0004ffff, 1, 0, 33},
   2.638 +                Package(){0x0004ffff, 2, 0, 34},
   2.639 +                Package(){0x0004ffff, 3, 0, 35},
   2.640 +
   2.641 +                /* Device 5, INTA - INTD */
   2.642 +                Package(){0x0005ffff, 0, 0, 36},
   2.643 +                Package(){0x0005ffff, 1, 0, 37},
   2.644 +                Package(){0x0005ffff, 2, 0, 38},
   2.645 +                Package(){0x0005ffff, 3, 0, 39},
   2.646 +
   2.647 +                /* Device 6, INTA - INTD */
   2.648 +                Package(){0x0006ffff, 0, 0, 40},
   2.649 +                Package(){0x0006ffff, 1, 0, 41},
   2.650 +                Package(){0x0006ffff, 2, 0, 42},
   2.651 +                Package(){0x0006ffff, 3, 0, 43},
   2.652 +
   2.653 +                /* Device 7, INTA - INTD */
   2.654 +                Package(){0x0007ffff, 0, 0, 44},
   2.655 +                Package(){0x0007ffff, 1, 0, 45},
   2.656 +                Package(){0x0007ffff, 2, 0, 46},
   2.657 +                Package(){0x0007ffff, 3, 0, 47},
   2.658 +
   2.659 +                /* Device 8, INTA - INTD */
   2.660 +                Package(){0x0008ffff, 0, 0, 17},
   2.661 +                Package(){0x0008ffff, 1, 0, 18},
   2.662 +                Package(){0x0008ffff, 2, 0, 19},
   2.663 +                Package(){0x0008ffff, 3, 0, 20},
   2.664 +
   2.665 +                /* Device 9, INTA - INTD */
   2.666 +                Package(){0x0009ffff, 0, 0, 21},
   2.667 +                Package(){0x0009ffff, 1, 0, 22},
   2.668 +                Package(){0x0009ffff, 2, 0, 23},
   2.669 +                Package(){0x0009ffff, 3, 0, 24},
   2.670 +
   2.671 +                /* Device 10, INTA - INTD */
   2.672 +                Package(){0x000affff, 0, 0, 25},
   2.673 +                Package(){0x000affff, 1, 0, 26},
   2.674 +                Package(){0x000affff, 2, 0, 27},
   2.675 +                Package(){0x000affff, 3, 0, 28},
   2.676 +
   2.677 +                /* Device 11, INTA - INTD */
   2.678 +                Package(){0x000bffff, 0, 0, 29},
   2.679 +                Package(){0x000bffff, 1, 0, 30},
   2.680 +                Package(){0x000bffff, 2, 0, 31},
   2.681 +                Package(){0x000bffff, 3, 0, 32},
   2.682 +
   2.683 +                /* Device 12, INTA - INTD */
   2.684 +                Package(){0x000cffff, 0, 0, 33},
   2.685 +                Package(){0x000cffff, 1, 0, 34},
   2.686 +                Package(){0x000cffff, 2, 0, 35},
   2.687 +                Package(){0x000cffff, 3, 0, 36},
   2.688 +
   2.689 +                /* Device 13, INTA - INTD */
   2.690 +                Package(){0x000dffff, 0, 0, 37},
   2.691 +                Package(){0x000dffff, 1, 0, 38},
   2.692 +                Package(){0x000dffff, 2, 0, 39},
   2.693 +                Package(){0x000dffff, 3, 0, 40},
   2.694 +
   2.695 +                /* Device 14, INTA - INTD */
   2.696 +                Package(){0x000effff, 0, 0, 41},
   2.697 +                Package(){0x000effff, 1, 0, 42},
   2.698 +                Package(){0x000effff, 2, 0, 43},
   2.699 +                Package(){0x000effff, 3, 0, 44},
   2.700 +
   2.701 +                /* Device 15, INTA - INTD */
   2.702 +                Package(){0x000fffff, 0, 0, 45},
   2.703 +                Package(){0x000fffff, 1, 0, 46},
   2.704 +                Package(){0x000fffff, 2, 0, 47},
   2.705 +                Package(){0x000fffff, 3, 0, 16},
   2.706 +            })
   2.707              
   2.708              Device (ISA)
   2.709              {
   2.710 -                Name (_ADR, 0x00000000) /* device id, PCI bus num, ... */
   2.711 - 
   2.712 -            OperationRegion(PIRQ, PCI_Config, 0x60, 0x4)
   2.713 -                        Scope(\) {
   2.714 -                                 Field (\_SB.PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) {
   2.715 -                                        PIRA, 8,
   2.716 -                                        PIRB, 8,
   2.717 -                                        PIRC, 8,
   2.718 -                                        PIRD, 8
   2.719 -                                        }
   2.720 -                                 }
   2.721 +                Name (_ADR, 0x00010000) /* device 1, fn 0 */
   2.722 +
   2.723 +                OperationRegion(PIRQ, PCI_Config, 0x60, 0x4)
   2.724 +                Scope(\) {
   2.725 +                    Field (\_SB.PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) {
   2.726 +                        PIRA, 8,
   2.727 +                        PIRB, 8,
   2.728 +                        PIRC, 8,
   2.729 +                        PIRD, 8
   2.730 +                    }
   2.731 +                }
   2.732                  Device (SYSR)
   2.733                  {
   2.734                      Name (_HID, EisaId ("PNP0C02"))
   2.735                      Name (_UID, 0x01)
   2.736                      Name (CRS, ResourceTemplate ()
   2.737                      {
   2.738 -               /* TODO: list hidden resources */
   2.739 +                        /* TODO: list hidden resources */
   2.740                          IO (Decode16, 0x0010, 0x0010, 0x00, 0x10)
   2.741                          IO (Decode16, 0x0022, 0x0022, 0x00, 0x0C)
   2.742                          IO (Decode16, 0x0030, 0x0030, 0x00, 0x10)
   2.743 @@ -525,4 +678,3 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, 
   2.744          }
   2.745      }
   2.746  }
   2.747 -
     3.1 --- a/tools/firmware/hvmloader/acpi/dsdt.c	Tue Nov 21 17:34:17 2006 +0000
     3.2 +++ b/tools/firmware/hvmloader/acpi/dsdt.c	Tue Nov 21 19:22:25 2006 +0000
     3.3 @@ -5,15 +5,15 @@
     3.4   * Copyright (C) 2000 - 2005 Intel Corporation
     3.5   * Supports ACPI Specification Revision 3.0
     3.6   * 
     3.7 - * Compilation of "dsdt.asl" - Fri Nov 17 10:00:20 2006
     3.8 + * Compilation of "dsdt.asl" - Tue Nov 21 17:20:04 2006
     3.9   * 
    3.10   * C source code output
    3.11   *
    3.12   */
    3.13  unsigned char AmlCode[] = 
    3.14  {
    3.15 -    0x44,0x53,0x44,0x54,0xF4,0x08,0x00,0x00,  /* 00000000    "DSDT...." */
    3.16 -    0x01,0x22,0x49,0x4E,0x54,0x45,0x4C,0x00,  /* 00000008    "."INTEL." */
    3.17 +    0x44,0x53,0x44,0x54,0x2A,0x0E,0x00,0x00,  /* 00000000    "DSDT*..." */
    3.18 +    0x01,0x18,0x49,0x4E,0x54,0x45,0x4C,0x00,  /* 00000008    "..INTEL." */
    3.19      0x69,0x6E,0x74,0x2D,0x78,0x65,0x6E,0x00,  /* 00000010    "int-xen." */
    3.20      0xD6,0x07,0x00,0x00,0x49,0x4E,0x54,0x4C,  /* 00000018    "....INTL" */
    3.21      0x13,0x05,0x05,0x20,0x08,0x50,0x4D,0x42,  /* 00000020    "... .PMB" */
    3.22 @@ -34,7 +34,7 @@ unsigned char AmlCode[] =
    3.23      0x12,0x08,0x04,0x0A,0x07,0x0A,0x07,0x00,  /* 00000098    "........" */
    3.24      0x00,0x08,0x50,0x49,0x43,0x44,0x00,0x14,  /* 000000A0    "..PICD.." */
    3.25      0x0C,0x5F,0x50,0x49,0x43,0x01,0x70,0x68,  /* 000000A8    "._PIC.ph" */
    3.26 -    0x50,0x49,0x43,0x44,0x10,0x4F,0x83,0x5F,  /* 000000B0    "PICD.O._" */
    3.27 +    0x50,0x49,0x43,0x44,0x10,0x45,0xD7,0x5F,  /* 000000B0    "PICD.E._" */
    3.28      0x53,0x42,0x5F,0x5B,0x82,0x49,0x04,0x4D,  /* 000000B8    "SB_[.I.M" */
    3.29      0x45,0x4D,0x30,0x08,0x5F,0x48,0x49,0x44,  /* 000000C0    "EM0._HID" */
    3.30      0x0C,0x41,0xD0,0x0C,0x02,0x08,0x5F,0x43,  /* 000000C8    ".A...._C" */
    3.31 @@ -45,7 +45,7 @@ unsigned char AmlCode[] =
    3.32      0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 000000F0    "........" */
    3.33      0x00,0x00,0x00,0x00,0x00,0x00,0x0A,0x00,  /* 000000F8    "........" */
    3.34      0x00,0x00,0x00,0x00,0x79,0x00,0x5B,0x82,  /* 00000100    "....y.[." */
    3.35 -    0x4C,0x7E,0x50,0x43,0x49,0x30,0x08,0x5F,  /* 00000108    "L~PCI0._" */
    3.36 +    0x42,0xD2,0x50,0x43,0x49,0x30,0x08,0x5F,  /* 00000108    "B.PCI0._" */
    3.37      0x48,0x49,0x44,0x0C,0x41,0xD0,0x0A,0x03,  /* 00000110    "HID.A..." */
    3.38      0x08,0x5F,0x55,0x49,0x44,0x00,0x08,0x5F,  /* 00000118    "._UID.._" */
    3.39      0x41,0x44,0x52,0x00,0x08,0x5F,0x42,0x42,  /* 00000120    "ADR.._BB" */
    3.40 @@ -77,227 +77,394 @@ unsigned char AmlCode[] =
    3.41      0x42,0x55,0x46,0x42,0x11,0x09,0x0A,0x06,  /* 000001F0    "BUFB...." */
    3.42      0x23,0x00,0x00,0x18,0x79,0x00,0x8B,0x42,  /* 000001F8    "#...y..B" */
    3.43      0x55,0x46,0x42,0x01,0x49,0x52,0x51,0x56,  /* 00000200    "UFB.IRQV" */
    3.44 -    0x08,0x42,0x55,0x46,0x43,0x11,0x07,0x0A,  /* 00000208    ".BUFC..." */
    3.45 -    0x04,0x05,0x07,0x0A,0x0B,0x8C,0x42,0x55,  /* 00000210    "......BU" */
    3.46 -    0x46,0x43,0x01,0x50,0x49,0x51,0x41,0x8C,  /* 00000218    "FC.PIQA." */
    3.47 -    0x42,0x55,0x46,0x43,0x01,0x50,0x49,0x51,  /* 00000220    "BUFC.PIQ" */
    3.48 -    0x42,0x8C,0x42,0x55,0x46,0x43,0x01,0x50,  /* 00000228    "B.BUFC.P" */
    3.49 -    0x49,0x51,0x43,0x8C,0x42,0x55,0x46,0x43,  /* 00000230    "IQC.BUFC" */
    3.50 -    0x01,0x50,0x49,0x51,0x44,0x5B,0x82,0x48,  /* 00000238    ".PIQD[.H" */
    3.51 -    0x08,0x4C,0x4E,0x4B,0x41,0x08,0x5F,0x48,  /* 00000240    ".LNKA._H" */
    3.52 -    0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,  /* 00000248    "ID.A...." */
    3.53 -    0x5F,0x55,0x49,0x44,0x01,0x14,0x1C,0x5F,  /* 00000250    "_UID..._" */
    3.54 -    0x53,0x54,0x41,0x00,0x7B,0x50,0x49,0x52,  /* 00000258    "STA.{PIR" */
    3.55 -    0x41,0x0A,0x80,0x60,0xA0,0x08,0x93,0x60,  /* 00000260    "A..`...`" */
    3.56 -    0x0A,0x80,0xA4,0x0A,0x09,0xA1,0x04,0xA4,  /* 00000268    "........" */
    3.57 -    0x0A,0x0B,0x14,0x0B,0x5F,0x50,0x52,0x53,  /* 00000270    "...._PRS" */
    3.58 -    0x00,0xA4,0x42,0x55,0x46,0x41,0x14,0x11,  /* 00000278    "..BUFA.." */
    3.59 -    0x5F,0x44,0x49,0x53,0x00,0x7D,0x50,0x49,  /* 00000280    "_DIS.}PI" */
    3.60 -    0x52,0x41,0x0A,0x80,0x50,0x49,0x52,0x41,  /* 00000288    "RA..PIRA" */
    3.61 -    0x14,0x1A,0x5F,0x43,0x52,0x53,0x00,0x7B,  /* 00000290    ".._CRS.{" */
    3.62 -    0x50,0x49,0x52,0x42,0x0A,0x0F,0x60,0x79,  /* 00000298    "PIRB..`y" */
    3.63 -    0x01,0x60,0x49,0x52,0x51,0x56,0xA4,0x42,  /* 000002A0    ".`IRQV.B" */
    3.64 -    0x55,0x46,0x42,0x14,0x1B,0x5F,0x53,0x52,  /* 000002A8    "UFB.._SR" */
    3.65 -    0x53,0x01,0x8B,0x68,0x01,0x49,0x52,0x51,  /* 000002B0    "S..h.IRQ" */
    3.66 -    0x31,0x82,0x49,0x52,0x51,0x31,0x60,0x76,  /* 000002B8    "1.IRQ1`v" */
    3.67 -    0x60,0x70,0x60,0x50,0x49,0x52,0x41,0x5B,  /* 000002C0    "`p`PIRA[" */
    3.68 -    0x82,0x49,0x08,0x4C,0x4E,0x4B,0x42,0x08,  /* 000002C8    ".I.LNKB." */
    3.69 -    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,  /* 000002D0    "_HID.A.." */
    3.70 -    0x0F,0x08,0x5F,0x55,0x49,0x44,0x0A,0x02,  /* 000002D8    ".._UID.." */
    3.71 -    0x14,0x1C,0x5F,0x53,0x54,0x41,0x00,0x7B,  /* 000002E0    ".._STA.{" */
    3.72 -    0x50,0x49,0x52,0x42,0x0A,0x80,0x60,0xA0,  /* 000002E8    "PIRB..`." */
    3.73 -    0x08,0x93,0x60,0x0A,0x80,0xA4,0x0A,0x09,  /* 000002F0    "..`....." */
    3.74 -    0xA1,0x04,0xA4,0x0A,0x0B,0x14,0x0B,0x5F,  /* 000002F8    "......._" */
    3.75 -    0x50,0x52,0x53,0x00,0xA4,0x42,0x55,0x46,  /* 00000300    "PRS..BUF" */
    3.76 -    0x41,0x14,0x11,0x5F,0x44,0x49,0x53,0x00,  /* 00000308    "A.._DIS." */
    3.77 -    0x7D,0x50,0x49,0x52,0x42,0x0A,0x80,0x50,  /* 00000310    "}PIRB..P" */
    3.78 -    0x49,0x52,0x42,0x14,0x1A,0x5F,0x43,0x52,  /* 00000318    "IRB.._CR" */
    3.79 -    0x53,0x00,0x7B,0x50,0x49,0x52,0x42,0x0A,  /* 00000320    "S.{PIRB." */
    3.80 -    0x0F,0x60,0x79,0x01,0x60,0x49,0x52,0x51,  /* 00000328    ".`y.`IRQ" */
    3.81 -    0x56,0xA4,0x42,0x55,0x46,0x42,0x14,0x1B,  /* 00000330    "V.BUFB.." */
    3.82 -    0x5F,0x53,0x52,0x53,0x01,0x8B,0x68,0x01,  /* 00000338    "_SRS..h." */
    3.83 -    0x49,0x52,0x51,0x31,0x82,0x49,0x52,0x51,  /* 00000340    "IRQ1.IRQ" */
    3.84 -    0x31,0x60,0x76,0x60,0x70,0x60,0x50,0x49,  /* 00000348    "1`v`p`PI" */
    3.85 -    0x52,0x42,0x5B,0x82,0x49,0x08,0x4C,0x4E,  /* 00000350    "RB[.I.LN" */
    3.86 -    0x4B,0x43,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000358    "KC._HID." */
    3.87 -    0x41,0xD0,0x0C,0x0F,0x08,0x5F,0x55,0x49,  /* 00000360    "A...._UI" */
    3.88 -    0x44,0x0A,0x03,0x14,0x1C,0x5F,0x53,0x54,  /* 00000368    "D...._ST" */
    3.89 -    0x41,0x00,0x7B,0x50,0x49,0x52,0x43,0x0A,  /* 00000370    "A.{PIRC." */
    3.90 -    0x80,0x60,0xA0,0x08,0x93,0x60,0x0A,0x80,  /* 00000378    ".`...`.." */
    3.91 -    0xA4,0x0A,0x09,0xA1,0x04,0xA4,0x0A,0x0B,  /* 00000380    "........" */
    3.92 -    0x14,0x0B,0x5F,0x50,0x52,0x53,0x00,0xA4,  /* 00000388    ".._PRS.." */
    3.93 -    0x42,0x55,0x46,0x41,0x14,0x11,0x5F,0x44,  /* 00000390    "BUFA.._D" */
    3.94 -    0x49,0x53,0x00,0x7D,0x50,0x49,0x52,0x43,  /* 00000398    "IS.}PIRC" */
    3.95 -    0x0A,0x80,0x50,0x49,0x52,0x43,0x14,0x1A,  /* 000003A0    "..PIRC.." */
    3.96 -    0x5F,0x43,0x52,0x53,0x00,0x7B,0x50,0x49,  /* 000003A8    "_CRS.{PI" */
    3.97 -    0x52,0x43,0x0A,0x0F,0x60,0x79,0x01,0x60,  /* 000003B0    "RC..`y.`" */
    3.98 -    0x49,0x52,0x51,0x56,0xA4,0x42,0x55,0x46,  /* 000003B8    "IRQV.BUF" */
    3.99 -    0x42,0x14,0x1B,0x5F,0x53,0x52,0x53,0x01,  /* 000003C0    "B.._SRS." */
   3.100 -    0x8B,0x68,0x01,0x49,0x52,0x51,0x31,0x82,  /* 000003C8    ".h.IRQ1." */
   3.101 -    0x49,0x52,0x51,0x31,0x60,0x76,0x60,0x70,  /* 000003D0    "IRQ1`v`p" */
   3.102 -    0x60,0x50,0x49,0x52,0x43,0x5B,0x82,0x49,  /* 000003D8    "`PIRC[.I" */
   3.103 -    0x08,0x4C,0x4E,0x4B,0x44,0x08,0x5F,0x48,  /* 000003E0    ".LNKD._H" */
   3.104 -    0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,  /* 000003E8    "ID.A...." */
   3.105 -    0x5F,0x55,0x49,0x44,0x0A,0x04,0x14,0x1C,  /* 000003F0    "_UID...." */
   3.106 -    0x5F,0x53,0x54,0x41,0x00,0x7B,0x50,0x49,  /* 000003F8    "_STA.{PI" */
   3.107 -    0x52,0x44,0x0A,0x80,0x60,0xA0,0x08,0x93,  /* 00000400    "RD..`..." */
   3.108 -    0x60,0x0A,0x80,0xA4,0x0A,0x09,0xA1,0x04,  /* 00000408    "`......." */
   3.109 -    0xA4,0x0A,0x0B,0x14,0x0B,0x5F,0x50,0x52,  /* 00000410    "....._PR" */
   3.110 -    0x53,0x00,0xA4,0x42,0x55,0x46,0x41,0x14,  /* 00000418    "S..BUFA." */
   3.111 -    0x11,0x5F,0x44,0x49,0x53,0x00,0x7D,0x50,  /* 00000420    "._DIS.}P" */
   3.112 -    0x49,0x52,0x44,0x0A,0x80,0x50,0x49,0x52,  /* 00000428    "IRD..PIR" */
   3.113 -    0x44,0x14,0x1A,0x5F,0x43,0x52,0x53,0x00,  /* 00000430    "D.._CRS." */
   3.114 -    0x7B,0x50,0x49,0x52,0x44,0x0A,0x0F,0x60,  /* 00000438    "{PIRD..`" */
   3.115 -    0x79,0x01,0x60,0x49,0x52,0x51,0x56,0xA4,  /* 00000440    "y.`IRQV." */
   3.116 -    0x42,0x55,0x46,0x42,0x14,0x1B,0x5F,0x53,  /* 00000448    "BUFB.._S" */
   3.117 -    0x52,0x53,0x01,0x8B,0x68,0x01,0x49,0x52,  /* 00000450    "RS..h.IR" */
   3.118 -    0x51,0x31,0x82,0x49,0x52,0x51,0x31,0x60,  /* 00000458    "Q1.IRQ1`" */
   3.119 -    0x76,0x60,0x70,0x60,0x50,0x49,0x52,0x44,  /* 00000460    "v`p`PIRD" */
   3.120 -    0x14,0x16,0x5F,0x50,0x52,0x54,0x00,0xA0,  /* 00000468    ".._PRT.." */
   3.121 -    0x0A,0x50,0x49,0x43,0x44,0xA4,0x50,0x52,  /* 00000470    ".PICD.PR" */
   3.122 -    0x54,0x41,0xA4,0x50,0x52,0x54,0x50,0x08,  /* 00000478    "TA.PRTP." */
   3.123 -    0x50,0x52,0x54,0x50,0x12,0x4D,0x11,0x14,  /* 00000480    "PRTP.M.." */
   3.124 -    0x12,0x0B,0x04,0x0B,0xFF,0xFF,0x00,0x4C,  /* 00000488    ".......L" */
   3.125 -    0x4E,0x4B,0x41,0x00,0x12,0x0B,0x04,0x0B,  /* 00000490    "NKA....." */
   3.126 -    0xFF,0xFF,0x01,0x4C,0x4E,0x4B,0x42,0x00,  /* 00000498    "...LNKB." */
   3.127 -    0x12,0x0C,0x04,0x0B,0xFF,0xFF,0x0A,0x02,  /* 000004A0    "........" */
   3.128 -    0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0C,0x04,  /* 000004A8    "LNKC...." */
   3.129 -    0x0B,0xFF,0xFF,0x0A,0x03,0x4C,0x4E,0x4B,  /* 000004B0    ".....LNK" */
   3.130 -    0x44,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 000004B8    "D......." */
   3.131 -    0x01,0x00,0x00,0x4C,0x4E,0x4B,0x42,0x00,  /* 000004C0    "...LNKB." */
   3.132 -    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 000004C8    "........" */
   3.133 -    0x01,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 000004D0    ".LNKC..." */
   3.134 -    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,  /* 000004D8    "........" */
   3.135 -    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0E,0x04,  /* 000004E0    "LNKD...." */
   3.136 -    0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x03,0x4C,  /* 000004E8    ".......L" */
   3.137 -    0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,  /* 000004F0    "NKA....." */
   3.138 -    0xFF,0xFF,0x02,0x00,0x00,0x4C,0x4E,0x4B,  /* 000004F8    ".....LNK" */
   3.139 -    0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000500    "C......." */
   3.140 -    0x02,0x00,0x01,0x4C,0x4E,0x4B,0x44,0x00,  /* 00000508    "...LNKD." */
   3.141 -    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x02,0x00,  /* 00000510    "........" */
   3.142 -    0x0A,0x02,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 00000518    "..LNKA.." */
   3.143 -    0x0E,0x04,0x0C,0xFF,0xFF,0x02,0x00,0x0A,  /* 00000520    "........" */
   3.144 -    0x03,0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0D,  /* 00000528    ".LNKB..." */
   3.145 -    0x04,0x0C,0xFF,0xFF,0x03,0x00,0x00,0x4C,  /* 00000530    ".......L" */
   3.146 -    0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,0x0C,  /* 00000538    "NKD....." */
   3.147 -    0xFF,0xFF,0x03,0x00,0x01,0x4C,0x4E,0x4B,  /* 00000540    ".....LNK" */
   3.148 -    0x41,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 00000548    "A......." */
   3.149 -    0x03,0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x42,  /* 00000550    "....LNKB" */
   3.150 -    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x03,  /* 00000558    "........" */
   3.151 -    0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000560    "...LNKC." */
   3.152 -    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x04,0x00,  /* 00000568    "........" */
   3.153 -    0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,  /* 00000570    ".LNKA..." */
   3.154 -    0x04,0x0C,0xFF,0xFF,0x04,0x00,0x01,0x4C,  /* 00000578    ".......L" */
   3.155 -    0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,  /* 00000580    "NKB....." */
   3.156 -    0xFF,0xFF,0x04,0x00,0x0A,0x02,0x4C,0x4E,  /* 00000588    "......LN" */
   3.157 -    0x4B,0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000590    "KC......" */
   3.158 -    0xFF,0x04,0x00,0x0A,0x03,0x4C,0x4E,0x4B,  /* 00000598    ".....LNK" */
   3.159 -    0x44,0x00,0x08,0x50,0x52,0x54,0x41,0x12,  /* 000005A0    "D..PRTA." */
   3.160 -    0x32,0x04,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 000005A8    "2......." */
   3.161 -    0x01,0x00,0x00,0x00,0x0A,0x05,0x12,0x0B,  /* 000005B0    "........" */
   3.162 -    0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,0x00,  /* 000005B8    "........" */
   3.163 -    0x0A,0x07,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 000005C0    "........" */
   3.164 -    0x03,0x00,0x00,0x00,0x0A,0x0A,0x12,0x0B,  /* 000005C8    "........" */
   3.165 -    0x04,0x0C,0xFF,0xFF,0x04,0x00,0x00,0x00,  /* 000005D0    "........" */
   3.166 -    0x0A,0x0B,0x5B,0x82,0x48,0x31,0x49,0x53,  /* 000005D8    "..[.H1IS" */
   3.167 -    0x41,0x5F,0x08,0x5F,0x41,0x44,0x52,0x00,  /* 000005E0    "A_._ADR." */
   3.168 -    0x5B,0x80,0x50,0x49,0x52,0x51,0x02,0x0A,  /* 000005E8    "[.PIRQ.." */
   3.169 -    0x60,0x0A,0x04,0x10,0x2E,0x5C,0x00,0x5B,  /* 000005F0    "`....\.[" */
   3.170 -    0x81,0x29,0x5C,0x2F,0x04,0x5F,0x53,0x42,  /* 000005F8    ".)\/._SB" */
   3.171 -    0x5F,0x50,0x43,0x49,0x30,0x49,0x53,0x41,  /* 00000600    "_PCI0ISA" */
   3.172 -    0x5F,0x50,0x49,0x52,0x51,0x01,0x50,0x49,  /* 00000608    "_PIRQ.PI" */
   3.173 -    0x52,0x41,0x08,0x50,0x49,0x52,0x42,0x08,  /* 00000610    "RA.PIRB." */
   3.174 -    0x50,0x49,0x52,0x43,0x08,0x50,0x49,0x52,  /* 00000618    "PIRC.PIR" */
   3.175 -    0x44,0x08,0x5B,0x82,0x46,0x0B,0x53,0x59,  /* 00000620    "D.[.F.SY" */
   3.176 -    0x53,0x52,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000628    "SR._HID." */
   3.177 -    0x41,0xD0,0x0C,0x02,0x08,0x5F,0x55,0x49,  /* 00000630    "A...._UI" */
   3.178 -    0x44,0x01,0x08,0x43,0x52,0x53,0x5F,0x11,  /* 00000638    "D..CRS_." */
   3.179 -    0x4E,0x08,0x0A,0x8A,0x47,0x01,0x10,0x00,  /* 00000640    "N...G..." */
   3.180 -    0x10,0x00,0x00,0x10,0x47,0x01,0x22,0x00,  /* 00000648    "....G."." */
   3.181 -    0x22,0x00,0x00,0x0C,0x47,0x01,0x30,0x00,  /* 00000650    ""...G.0." */
   3.182 -    0x30,0x00,0x00,0x10,0x47,0x01,0x44,0x00,  /* 00000658    "0...G.D." */
   3.183 -    0x44,0x00,0x00,0x1C,0x47,0x01,0x62,0x00,  /* 00000660    "D...G.b." */
   3.184 -    0x62,0x00,0x00,0x02,0x47,0x01,0x65,0x00,  /* 00000668    "b...G.e." */
   3.185 -    0x65,0x00,0x00,0x0B,0x47,0x01,0x72,0x00,  /* 00000670    "e...G.r." */
   3.186 -    0x72,0x00,0x00,0x0E,0x47,0x01,0x80,0x00,  /* 00000678    "r...G..." */
   3.187 -    0x80,0x00,0x00,0x01,0x47,0x01,0x84,0x00,  /* 00000680    "....G..." */
   3.188 -    0x84,0x00,0x00,0x03,0x47,0x01,0x88,0x00,  /* 00000688    "....G..." */
   3.189 -    0x88,0x00,0x00,0x01,0x47,0x01,0x8C,0x00,  /* 00000690    "....G..." */
   3.190 -    0x8C,0x00,0x00,0x03,0x47,0x01,0x90,0x00,  /* 00000698    "....G..." */
   3.191 -    0x90,0x00,0x00,0x10,0x47,0x01,0xA2,0x00,  /* 000006A0    "....G..." */
   3.192 -    0xA2,0x00,0x00,0x1C,0x47,0x01,0xE0,0x00,  /* 000006A8    "....G..." */
   3.193 -    0xE0,0x00,0x00,0x10,0x47,0x01,0xA0,0x08,  /* 000006B0    "....G..." */
   3.194 -    0xA0,0x08,0x00,0x04,0x47,0x01,0xC0,0x0C,  /* 000006B8    "....G..." */
   3.195 -    0xC0,0x0C,0x00,0x10,0x47,0x01,0xD0,0x04,  /* 000006C0    "....G..." */
   3.196 -    0xD0,0x04,0x00,0x02,0x79,0x00,0x14,0x0B,  /* 000006C8    "....y..." */
   3.197 -    0x5F,0x43,0x52,0x53,0x00,0xA4,0x43,0x52,  /* 000006D0    "_CRS..CR" */
   3.198 -    0x53,0x5F,0x5B,0x82,0x2B,0x50,0x49,0x43,  /* 000006D8    "S_[.+PIC" */
   3.199 -    0x5F,0x08,0x5F,0x48,0x49,0x44,0x0B,0x41,  /* 000006E0    "_._HID.A" */
   3.200 -    0xD0,0x08,0x5F,0x43,0x52,0x53,0x11,0x18,  /* 000006E8    ".._CRS.." */
   3.201 -    0x0A,0x15,0x47,0x01,0x20,0x00,0x20,0x00,  /* 000006F0    "..G. . ." */
   3.202 -    0x01,0x02,0x47,0x01,0xA0,0x00,0xA0,0x00,  /* 000006F8    "..G....." */
   3.203 -    0x01,0x02,0x22,0x04,0x00,0x79,0x00,0x5B,  /* 00000700    ".."..y.[" */
   3.204 -    0x82,0x47,0x05,0x44,0x4D,0x41,0x30,0x08,  /* 00000708    ".G.DMA0." */
   3.205 -    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x02,  /* 00000710    "_HID.A.." */
   3.206 -    0x00,0x08,0x5F,0x43,0x52,0x53,0x11,0x41,  /* 00000718    ".._CRS.A" */
   3.207 -    0x04,0x0A,0x3D,0x2A,0x10,0x04,0x47,0x01,  /* 00000720    "..=*..G." */
   3.208 -    0x00,0x00,0x00,0x00,0x00,0x10,0x47,0x01,  /* 00000728    "......G." */
   3.209 -    0x81,0x00,0x81,0x00,0x00,0x03,0x47,0x01,  /* 00000730    "......G." */
   3.210 -    0x87,0x00,0x87,0x00,0x00,0x01,0x47,0x01,  /* 00000738    "......G." */
   3.211 -    0x89,0x00,0x89,0x00,0x00,0x03,0x47,0x01,  /* 00000740    "......G." */
   3.212 -    0x8F,0x00,0x8F,0x00,0x00,0x01,0x47,0x01,  /* 00000748    "......G." */
   3.213 -    0xC0,0x00,0xC0,0x00,0x00,0x20,0x47,0x01,  /* 00000750    "..... G." */
   3.214 -    0x80,0x04,0x80,0x04,0x00,0x10,0x79,0x00,  /* 00000758    "......y." */
   3.215 -    0x5B,0x82,0x25,0x54,0x4D,0x52,0x5F,0x08,  /* 00000760    "[.%TMR_." */
   3.216 -    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x01,  /* 00000768    "_HID.A.." */
   3.217 -    0x00,0x08,0x5F,0x43,0x52,0x53,0x11,0x10,  /* 00000770    ".._CRS.." */
   3.218 -    0x0A,0x0D,0x47,0x01,0x40,0x00,0x40,0x00,  /* 00000778    "..G.@.@." */
   3.219 -    0x00,0x04,0x22,0x01,0x00,0x79,0x00,0x5B,  /* 00000780    ".."..y.[" */
   3.220 -    0x82,0x25,0x52,0x54,0x43,0x5F,0x08,0x5F,  /* 00000788    ".%RTC_._" */
   3.221 -    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0B,0x00,  /* 00000790    "HID.A..." */
   3.222 -    0x08,0x5F,0x43,0x52,0x53,0x11,0x10,0x0A,  /* 00000798    "._CRS..." */
   3.223 -    0x0D,0x47,0x01,0x70,0x00,0x70,0x00,0x00,  /* 000007A0    ".G.p.p.." */
   3.224 -    0x02,0x22,0x00,0x01,0x79,0x00,0x5B,0x82,  /* 000007A8    "."..y.[." */
   3.225 -    0x22,0x53,0x50,0x4B,0x52,0x08,0x5F,0x48,  /* 000007B0    ""SPKR._H" */
   3.226 -    0x49,0x44,0x0C,0x41,0xD0,0x08,0x00,0x08,  /* 000007B8    "ID.A...." */
   3.227 -    0x5F,0x43,0x52,0x53,0x11,0x0D,0x0A,0x0A,  /* 000007C0    "_CRS...." */
   3.228 -    0x47,0x01,0x61,0x00,0x61,0x00,0x00,0x01,  /* 000007C8    "G.a.a..." */
   3.229 -    0x79,0x00,0x5B,0x82,0x31,0x50,0x53,0x32,  /* 000007D0    "y.[.1PS2" */
   3.230 -    0x4D,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 000007D8    "M._HID.A" */
   3.231 -    0xD0,0x0F,0x13,0x08,0x5F,0x43,0x49,0x44,  /* 000007E0    "...._CID" */
   3.232 -    0x0C,0x41,0xD0,0x0F,0x13,0x14,0x09,0x5F,  /* 000007E8    ".A....._" */
   3.233 -    0x53,0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,  /* 000007F0    "STA....." */
   3.234 -    0x5F,0x43,0x52,0x53,0x11,0x08,0x0A,0x05,  /* 000007F8    "_CRS...." */
   3.235 -    0x22,0x00,0x10,0x79,0x00,0x5B,0x82,0x42,  /* 00000800    ""..y.[.B" */
   3.236 -    0x04,0x50,0x53,0x32,0x4B,0x08,0x5F,0x48,  /* 00000808    ".PS2K._H" */
   3.237 -    0x49,0x44,0x0C,0x41,0xD0,0x03,0x03,0x08,  /* 00000810    "ID.A...." */
   3.238 -    0x5F,0x43,0x49,0x44,0x0C,0x41,0xD0,0x03,  /* 00000818    "_CID.A.." */
   3.239 -    0x0B,0x14,0x09,0x5F,0x53,0x54,0x41,0x00,  /* 00000820    "..._STA." */
   3.240 -    0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53,  /* 00000828    "...._CRS" */
   3.241 -    0x11,0x18,0x0A,0x15,0x47,0x01,0x60,0x00,  /* 00000830    "....G.`." */
   3.242 -    0x60,0x00,0x00,0x01,0x47,0x01,0x64,0x00,  /* 00000838    "`...G.d." */
   3.243 -    0x64,0x00,0x00,0x01,0x22,0x02,0x00,0x79,  /* 00000840    "d..."..y" */
   3.244 -    0x00,0x5B,0x82,0x3A,0x46,0x44,0x43,0x30,  /* 00000848    ".[.:FDC0" */
   3.245 -    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000850    "._HID.A." */
   3.246 -    0x07,0x00,0x14,0x09,0x5F,0x53,0x54,0x41,  /* 00000858    "...._STA" */
   3.247 -    0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,  /* 00000860    "....._CR" */
   3.248 -    0x53,0x11,0x1B,0x0A,0x18,0x47,0x01,0xF0,  /* 00000868    "S....G.." */
   3.249 -    0x03,0xF0,0x03,0x01,0x06,0x47,0x01,0xF7,  /* 00000870    ".....G.." */
   3.250 -    0x03,0xF7,0x03,0x01,0x01,0x22,0x40,0x00,  /* 00000878    "....."@." */
   3.251 -    0x2A,0x04,0x00,0x79,0x00,0x5B,0x82,0x35,  /* 00000880    "*..y.[.5" */
   3.252 -    0x55,0x41,0x52,0x31,0x08,0x5F,0x48,0x49,  /* 00000888    "UAR1._HI" */
   3.253 -    0x44,0x0C,0x41,0xD0,0x05,0x01,0x08,0x5F,  /* 00000890    "D.A...._" */
   3.254 -    0x55,0x49,0x44,0x01,0x14,0x09,0x5F,0x53,  /* 00000898    "UID..._S" */
   3.255 -    0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,0x5F,  /* 000008A0    "TA....._" */
   3.256 -    0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,  /* 000008A8    "CRS....G" */
   3.257 -    0x01,0xF8,0x03,0xF8,0x03,0x01,0x08,0x22,  /* 000008B0    "......."" */
   3.258 -    0x10,0x00,0x79,0x00,0x5B,0x82,0x36,0x4C,  /* 000008B8    "..y.[.6L" */
   3.259 -    0x54,0x50,0x31,0x08,0x5F,0x48,0x49,0x44,  /* 000008C0    "TP1._HID" */
   3.260 -    0x0C,0x41,0xD0,0x04,0x00,0x08,0x5F,0x55,  /* 000008C8    ".A...._U" */
   3.261 -    0x49,0x44,0x0A,0x02,0x14,0x09,0x5F,0x53,  /* 000008D0    "ID...._S" */
   3.262 -    0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,0x5F,  /* 000008D8    "TA....._" */
   3.263 -    0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,  /* 000008E0    "CRS....G" */
   3.264 -    0x01,0x78,0x03,0x78,0x03,0x08,0x08,0x22,  /* 000008E8    ".x.x..."" */
   3.265 -    0x80,0x00,0x79,0x00,
   3.266 +    0x5B,0x82,0x48,0x08,0x4C,0x4E,0x4B,0x41,  /* 00000208    "[.H.LNKA" */
   3.267 +    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000210    "._HID.A." */
   3.268 +    0x0C,0x0F,0x08,0x5F,0x55,0x49,0x44,0x01,  /* 00000218    "..._UID." */
   3.269 +    0x14,0x1C,0x5F,0x53,0x54,0x41,0x00,0x7B,  /* 00000220    ".._STA.{" */
   3.270 +    0x50,0x49,0x52,0x41,0x0A,0x80,0x60,0xA0,  /* 00000228    "PIRA..`." */
   3.271 +    0x08,0x93,0x60,0x0A,0x80,0xA4,0x0A,0x09,  /* 00000230    "..`....." */
   3.272 +    0xA1,0x04,0xA4,0x0A,0x0B,0x14,0x0B,0x5F,  /* 00000238    "......._" */
   3.273 +    0x50,0x52,0x53,0x00,0xA4,0x42,0x55,0x46,  /* 00000240    "PRS..BUF" */
   3.274 +    0x41,0x14,0x11,0x5F,0x44,0x49,0x53,0x00,  /* 00000248    "A.._DIS." */
   3.275 +    0x7D,0x50,0x49,0x52,0x41,0x0A,0x80,0x50,  /* 00000250    "}PIRA..P" */
   3.276 +    0x49,0x52,0x41,0x14,0x1A,0x5F,0x43,0x52,  /* 00000258    "IRA.._CR" */
   3.277 +    0x53,0x00,0x7B,0x50,0x49,0x52,0x41,0x0A,  /* 00000260    "S.{PIRA." */
   3.278 +    0x0F,0x60,0x79,0x01,0x60,0x49,0x52,0x51,  /* 00000268    ".`y.`IRQ" */
   3.279 +    0x56,0xA4,0x42,0x55,0x46,0x42,0x14,0x1B,  /* 00000270    "V.BUFB.." */
   3.280 +    0x5F,0x53,0x52,0x53,0x01,0x8B,0x68,0x01,  /* 00000278    "_SRS..h." */
   3.281 +    0x49,0x52,0x51,0x31,0x82,0x49,0x52,0x51,  /* 00000280    "IRQ1.IRQ" */
   3.282 +    0x31,0x60,0x76,0x60,0x70,0x60,0x50,0x49,  /* 00000288    "1`v`p`PI" */
   3.283 +    0x52,0x41,0x5B,0x82,0x49,0x08,0x4C,0x4E,  /* 00000290    "RA[.I.LN" */
   3.284 +    0x4B,0x42,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000298    "KB._HID." */
   3.285 +    0x41,0xD0,0x0C,0x0F,0x08,0x5F,0x55,0x49,  /* 000002A0    "A...._UI" */
   3.286 +    0x44,0x0A,0x02,0x14,0x1C,0x5F,0x53,0x54,  /* 000002A8    "D...._ST" */
   3.287 +    0x41,0x00,0x7B,0x50,0x49,0x52,0x42,0x0A,  /* 000002B0    "A.{PIRB." */
   3.288 +    0x80,0x60,0xA0,0x08,0x93,0x60,0x0A,0x80,  /* 000002B8    ".`...`.." */
   3.289 +    0xA4,0x0A,0x09,0xA1,0x04,0xA4,0x0A,0x0B,  /* 000002C0    "........" */
   3.290 +    0x14,0x0B,0x5F,0x50,0x52,0x53,0x00,0xA4,  /* 000002C8    ".._PRS.." */
   3.291 +    0x42,0x55,0x46,0x41,0x14,0x11,0x5F,0x44,  /* 000002D0    "BUFA.._D" */
   3.292 +    0x49,0x53,0x00,0x7D,0x50,0x49,0x52,0x42,  /* 000002D8    "IS.}PIRB" */
   3.293 +    0x0A,0x80,0x50,0x49,0x52,0x42,0x14,0x1A,  /* 000002E0    "..PIRB.." */
   3.294 +    0x5F,0x43,0x52,0x53,0x00,0x7B,0x50,0x49,  /* 000002E8    "_CRS.{PI" */
   3.295 +    0x52,0x42,0x0A,0x0F,0x60,0x79,0x01,0x60,  /* 000002F0    "RB..`y.`" */
   3.296 +    0x49,0x52,0x51,0x56,0xA4,0x42,0x55,0x46,  /* 000002F8    "IRQV.BUF" */
   3.297 +    0x42,0x14,0x1B,0x5F,0x53,0x52,0x53,0x01,  /* 00000300    "B.._SRS." */
   3.298 +    0x8B,0x68,0x01,0x49,0x52,0x51,0x31,0x82,  /* 00000308    ".h.IRQ1." */
   3.299 +    0x49,0x52,0x51,0x31,0x60,0x76,0x60,0x70,  /* 00000310    "IRQ1`v`p" */
   3.300 +    0x60,0x50,0x49,0x52,0x42,0x5B,0x82,0x49,  /* 00000318    "`PIRB[.I" */
   3.301 +    0x08,0x4C,0x4E,0x4B,0x43,0x08,0x5F,0x48,  /* 00000320    ".LNKC._H" */
   3.302 +    0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,  /* 00000328    "ID.A...." */
   3.303 +    0x5F,0x55,0x49,0x44,0x0A,0x03,0x14,0x1C,  /* 00000330    "_UID...." */
   3.304 +    0x5F,0x53,0x54,0x41,0x00,0x7B,0x50,0x49,  /* 00000338    "_STA.{PI" */
   3.305 +    0x52,0x43,0x0A,0x80,0x60,0xA0,0x08,0x93,  /* 00000340    "RC..`..." */
   3.306 +    0x60,0x0A,0x80,0xA4,0x0A,0x09,0xA1,0x04,  /* 00000348    "`......." */
   3.307 +    0xA4,0x0A,0x0B,0x14,0x0B,0x5F,0x50,0x52,  /* 00000350    "....._PR" */
   3.308 +    0x53,0x00,0xA4,0x42,0x55,0x46,0x41,0x14,  /* 00000358    "S..BUFA." */
   3.309 +    0x11,0x5F,0x44,0x49,0x53,0x00,0x7D,0x50,  /* 00000360    "._DIS.}P" */
   3.310 +    0x49,0x52,0x43,0x0A,0x80,0x50,0x49,0x52,  /* 00000368    "IRC..PIR" */
   3.311 +    0x43,0x14,0x1A,0x5F,0x43,0x52,0x53,0x00,  /* 00000370    "C.._CRS." */
   3.312 +    0x7B,0x50,0x49,0x52,0x43,0x0A,0x0F,0x60,  /* 00000378    "{PIRC..`" */
   3.313 +    0x79,0x01,0x60,0x49,0x52,0x51,0x56,0xA4,  /* 00000380    "y.`IRQV." */
   3.314 +    0x42,0x55,0x46,0x42,0x14,0x1B,0x5F,0x53,  /* 00000388    "BUFB.._S" */
   3.315 +    0x52,0x53,0x01,0x8B,0x68,0x01,0x49,0x52,  /* 00000390    "RS..h.IR" */
   3.316 +    0x51,0x31,0x82,0x49,0x52,0x51,0x31,0x60,  /* 00000398    "Q1.IRQ1`" */
   3.317 +    0x76,0x60,0x70,0x60,0x50,0x49,0x52,0x43,  /* 000003A0    "v`p`PIRC" */
   3.318 +    0x5B,0x82,0x49,0x08,0x4C,0x4E,0x4B,0x44,  /* 000003A8    "[.I.LNKD" */
   3.319 +    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 000003B0    "._HID.A." */
   3.320 +    0x0C,0x0F,0x08,0x5F,0x55,0x49,0x44,0x0A,  /* 000003B8    "..._UID." */
   3.321 +    0x04,0x14,0x1C,0x5F,0x53,0x54,0x41,0x00,  /* 000003C0    "..._STA." */
   3.322 +    0x7B,0x50,0x49,0x52,0x44,0x0A,0x80,0x60,  /* 000003C8    "{PIRD..`" */
   3.323 +    0xA0,0x08,0x93,0x60,0x0A,0x80,0xA4,0x0A,  /* 000003D0    "...`...." */
   3.324 +    0x09,0xA1,0x04,0xA4,0x0A,0x0B,0x14,0x0B,  /* 000003D8    "........" */
   3.325 +    0x5F,0x50,0x52,0x53,0x00,0xA4,0x42,0x55,  /* 000003E0    "_PRS..BU" */
   3.326 +    0x46,0x41,0x14,0x11,0x5F,0x44,0x49,0x53,  /* 000003E8    "FA.._DIS" */
   3.327 +    0x00,0x7D,0x50,0x49,0x52,0x44,0x0A,0x80,  /* 000003F0    ".}PIRD.." */
   3.328 +    0x50,0x49,0x52,0x44,0x14,0x1A,0x5F,0x43,  /* 000003F8    "PIRD.._C" */
   3.329 +    0x52,0x53,0x00,0x7B,0x50,0x49,0x52,0x44,  /* 00000400    "RS.{PIRD" */
   3.330 +    0x0A,0x0F,0x60,0x79,0x01,0x60,0x49,0x52,  /* 00000408    "..`y.`IR" */
   3.331 +    0x51,0x56,0xA4,0x42,0x55,0x46,0x42,0x14,  /* 00000410    "QV.BUFB." */
   3.332 +    0x1B,0x5F,0x53,0x52,0x53,0x01,0x8B,0x68,  /* 00000418    "._SRS..h" */
   3.333 +    0x01,0x49,0x52,0x51,0x31,0x82,0x49,0x52,  /* 00000420    ".IRQ1.IR" */
   3.334 +    0x51,0x31,0x60,0x76,0x60,0x70,0x60,0x50,  /* 00000428    "Q1`v`p`P" */
   3.335 +    0x49,0x52,0x44,0x14,0x16,0x5F,0x50,0x52,  /* 00000430    "IRD.._PR" */
   3.336 +    0x54,0x00,0xA0,0x0A,0x50,0x49,0x43,0x44,  /* 00000438    "T...PICD" */
   3.337 +    0xA4,0x50,0x52,0x54,0x41,0xA4,0x50,0x52,  /* 00000440    ".PRTA.PR" */
   3.338 +    0x54,0x50,0x08,0x50,0x52,0x54,0x50,0x12,  /* 00000448    "TP.PRTP." */
   3.339 +    0x4B,0x39,0x40,0x12,0x0B,0x04,0x0B,0xFF,  /* 00000450    "K9@....." */
   3.340 +    0xFF,0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 00000458    "..LNKA.." */
   3.341 +    0x0B,0x04,0x0B,0xFF,0xFF,0x01,0x4C,0x4E,  /* 00000460    "......LN" */
   3.342 +    0x4B,0x42,0x00,0x12,0x0C,0x04,0x0B,0xFF,  /* 00000468    "KB......" */
   3.343 +    0xFF,0x0A,0x02,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000470    "...LNKC." */
   3.344 +    0x12,0x0C,0x04,0x0B,0xFF,0xFF,0x0A,0x03,  /* 00000478    "........" */
   3.345 +    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,  /* 00000480    "LNKD...." */
   3.346 +    0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,0x4E,  /* 00000488    "......LN" */
   3.347 +    0x4B,0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000490    "KB......" */
   3.348 +    0xFF,0x01,0x00,0x01,0x4C,0x4E,0x4B,0x43,  /* 00000498    "....LNKC" */
   3.349 +    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,  /* 000004A0    "........" */
   3.350 +    0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,  /* 000004A8    "...LNKD." */
   3.351 +    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,0x00,  /* 000004B0    "........" */
   3.352 +    0x0A,0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 000004B8    "..LNKA.." */
   3.353 +    0x0D,0x04,0x0C,0xFF,0xFF,0x02,0x00,0x00,  /* 000004C0    "........" */
   3.354 +    0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0D,0x04,  /* 000004C8    "LNKC...." */
   3.355 +    0x0C,0xFF,0xFF,0x02,0x00,0x01,0x4C,0x4E,  /* 000004D0    "......LN" */
   3.356 +    0x4B,0x44,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 000004D8    "KD......" */
   3.357 +    0xFF,0x02,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 000004E0    ".....LNK" */
   3.358 +    0x41,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 000004E8    "A......." */
   3.359 +    0x02,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x42,  /* 000004F0    "....LNKB" */
   3.360 +    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x03,  /* 000004F8    "........" */
   3.361 +    0x00,0x00,0x4C,0x4E,0x4B,0x44,0x00,0x12,  /* 00000500    "..LNKD.." */
   3.362 +    0x0D,0x04,0x0C,0xFF,0xFF,0x03,0x00,0x01,  /* 00000508    "........" */
   3.363 +    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0E,0x04,  /* 00000510    "LNKA...." */
   3.364 +    0x0C,0xFF,0xFF,0x03,0x00,0x0A,0x02,0x4C,  /* 00000518    ".......L" */
   3.365 +    0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,  /* 00000520    "NKB....." */
   3.366 +    0xFF,0xFF,0x03,0x00,0x0A,0x03,0x4C,0x4E,  /* 00000528    "......LN" */
   3.367 +    0x4B,0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000530    "KC......" */
   3.368 +    0xFF,0x04,0x00,0x00,0x4C,0x4E,0x4B,0x41,  /* 00000538    "....LNKA" */
   3.369 +    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x04,  /* 00000540    "........" */
   3.370 +    0x00,0x01,0x4C,0x4E,0x4B,0x42,0x00,0x12,  /* 00000548    "..LNKB.." */
   3.371 +    0x0E,0x04,0x0C,0xFF,0xFF,0x04,0x00,0x0A,  /* 00000550    "........" */
   3.372 +    0x02,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 00000558    ".LNKC..." */
   3.373 +    0x04,0x0C,0xFF,0xFF,0x04,0x00,0x0A,0x03,  /* 00000560    "........" */
   3.374 +    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,  /* 00000568    "LNKD...." */
   3.375 +    0x0C,0xFF,0xFF,0x05,0x00,0x00,0x4C,0x4E,  /* 00000570    "......LN" */
   3.376 +    0x4B,0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000578    "KB......" */
   3.377 +    0xFF,0x05,0x00,0x01,0x4C,0x4E,0x4B,0x43,  /* 00000580    "....LNKC" */
   3.378 +    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x05,  /* 00000588    "........" */
   3.379 +    0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,  /* 00000590    "...LNKD." */
   3.380 +    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x05,0x00,  /* 00000598    "........" */
   3.381 +    0x0A,0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 000005A0    "..LNKA.." */
   3.382 +    0x0D,0x04,0x0C,0xFF,0xFF,0x06,0x00,0x00,  /* 000005A8    "........" */
   3.383 +    0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0D,0x04,  /* 000005B0    "LNKC...." */
   3.384 +    0x0C,0xFF,0xFF,0x06,0x00,0x01,0x4C,0x4E,  /* 000005B8    "......LN" */
   3.385 +    0x4B,0x44,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 000005C0    "KD......" */
   3.386 +    0xFF,0x06,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 000005C8    ".....LNK" */
   3.387 +    0x41,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 000005D0    "A......." */
   3.388 +    0x06,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x42,  /* 000005D8    "....LNKB" */
   3.389 +    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x07,  /* 000005E0    "........" */
   3.390 +    0x00,0x00,0x4C,0x4E,0x4B,0x44,0x00,0x12,  /* 000005E8    "..LNKD.." */
   3.391 +    0x0D,0x04,0x0C,0xFF,0xFF,0x07,0x00,0x01,  /* 000005F0    "........" */
   3.392 +    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0E,0x04,  /* 000005F8    "LNKA...." */
   3.393 +    0x0C,0xFF,0xFF,0x07,0x00,0x0A,0x02,0x4C,  /* 00000600    ".......L" */
   3.394 +    0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,  /* 00000608    "NKB....." */
   3.395 +    0xFF,0xFF,0x07,0x00,0x0A,0x03,0x4C,0x4E,  /* 00000610    "......LN" */
   3.396 +    0x4B,0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000618    "KC......" */
   3.397 +    0xFF,0x08,0x00,0x00,0x4C,0x4E,0x4B,0x41,  /* 00000620    "....LNKA" */
   3.398 +    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x08,  /* 00000628    "........" */
   3.399 +    0x00,0x01,0x4C,0x4E,0x4B,0x42,0x00,0x12,  /* 00000630    "..LNKB.." */
   3.400 +    0x0E,0x04,0x0C,0xFF,0xFF,0x08,0x00,0x0A,  /* 00000638    "........" */
   3.401 +    0x02,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 00000640    ".LNKC..." */
   3.402 +    0x04,0x0C,0xFF,0xFF,0x08,0x00,0x0A,0x03,  /* 00000648    "........" */
   3.403 +    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,  /* 00000650    "LNKD...." */
   3.404 +    0x0C,0xFF,0xFF,0x09,0x00,0x00,0x4C,0x4E,  /* 00000658    "......LN" */
   3.405 +    0x4B,0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000660    "KB......" */
   3.406 +    0xFF,0x09,0x00,0x01,0x4C,0x4E,0x4B,0x43,  /* 00000668    "....LNKC" */
   3.407 +    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x09,  /* 00000670    "........" */
   3.408 +    0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,  /* 00000678    "...LNKD." */
   3.409 +    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x09,0x00,  /* 00000680    "........" */
   3.410 +    0x0A,0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 00000688    "..LNKA.." */
   3.411 +    0x0D,0x04,0x0C,0xFF,0xFF,0x0A,0x00,0x00,  /* 00000690    "........" */
   3.412 +    0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0D,0x04,  /* 00000698    "LNKC...." */
   3.413 +    0x0C,0xFF,0xFF,0x0A,0x00,0x01,0x4C,0x4E,  /* 000006A0    "......LN" */
   3.414 +    0x4B,0x44,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 000006A8    "KD......" */
   3.415 +    0xFF,0x0A,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 000006B0    ".....LNK" */
   3.416 +    0x41,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 000006B8    "A......." */
   3.417 +    0x0A,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x42,  /* 000006C0    "....LNKB" */
   3.418 +    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x0B,  /* 000006C8    "........" */
   3.419 +    0x00,0x00,0x4C,0x4E,0x4B,0x44,0x00,0x12,  /* 000006D0    "..LNKD.." */
   3.420 +    0x0D,0x04,0x0C,0xFF,0xFF,0x0B,0x00,0x01,  /* 000006D8    "........" */
   3.421 +    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0E,0x04,  /* 000006E0    "LNKA...." */
   3.422 +    0x0C,0xFF,0xFF,0x0B,0x00,0x0A,0x02,0x4C,  /* 000006E8    ".......L" */
   3.423 +    0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,  /* 000006F0    "NKB....." */
   3.424 +    0xFF,0xFF,0x0B,0x00,0x0A,0x03,0x4C,0x4E,  /* 000006F8    "......LN" */
   3.425 +    0x4B,0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000700    "KC......" */
   3.426 +    0xFF,0x0C,0x00,0x00,0x4C,0x4E,0x4B,0x41,  /* 00000708    "....LNKA" */
   3.427 +    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x0C,  /* 00000710    "........" */
   3.428 +    0x00,0x01,0x4C,0x4E,0x4B,0x42,0x00,0x12,  /* 00000718    "..LNKB.." */
   3.429 +    0x0E,0x04,0x0C,0xFF,0xFF,0x0C,0x00,0x0A,  /* 00000720    "........" */
   3.430 +    0x02,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 00000728    ".LNKC..." */
   3.431 +    0x04,0x0C,0xFF,0xFF,0x0C,0x00,0x0A,0x03,  /* 00000730    "........" */
   3.432 +    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,  /* 00000738    "LNKD...." */
   3.433 +    0x0C,0xFF,0xFF,0x0D,0x00,0x00,0x4C,0x4E,  /* 00000740    "......LN" */
   3.434 +    0x4B,0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,  /* 00000748    "KB......" */
   3.435 +    0xFF,0x0D,0x00,0x01,0x4C,0x4E,0x4B,0x43,  /* 00000750    "....LNKC" */
   3.436 +    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x0D,  /* 00000758    "........" */
   3.437 +    0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,  /* 00000760    "...LNKD." */
   3.438 +    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x0D,0x00,  /* 00000768    "........" */
   3.439 +    0x0A,0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,  /* 00000770    "..LNKA.." */
   3.440 +    0x0D,0x04,0x0C,0xFF,0xFF,0x0E,0x00,0x00,  /* 00000778    "........" */
   3.441 +    0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0D,0x04,  /* 00000780    "LNKC...." */
   3.442 +    0x0C,0xFF,0xFF,0x0E,0x00,0x01,0x4C,0x4E,  /* 00000788    "......LN" */
   3.443 +    0x4B,0x44,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000790    "KD......" */
   3.444 +    0xFF,0x0E,0x00,0x0A,0x02,0x4C,0x4E,0x4B,  /* 00000798    ".....LNK" */
   3.445 +    0x41,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 000007A0    "A......." */
   3.446 +    0x0E,0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x42,  /* 000007A8    "....LNKB" */
   3.447 +    0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x0F,  /* 000007B0    "........" */
   3.448 +    0x00,0x00,0x4C,0x4E,0x4B,0x44,0x00,0x12,  /* 000007B8    "..LNKD.." */
   3.449 +    0x0D,0x04,0x0C,0xFF,0xFF,0x0F,0x00,0x01,  /* 000007C0    "........" */
   3.450 +    0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0E,0x04,  /* 000007C8    "LNKA...." */
   3.451 +    0x0C,0xFF,0xFF,0x0F,0x00,0x0A,0x02,0x4C,  /* 000007D0    ".......L" */
   3.452 +    0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,  /* 000007D8    "NKB....." */
   3.453 +    0xFF,0xFF,0x0F,0x00,0x0A,0x03,0x4C,0x4E,  /* 000007E0    "......LN" */
   3.454 +    0x4B,0x43,0x00,0x08,0x50,0x52,0x54,0x41,  /* 000007E8    "KC..PRTA" */
   3.455 +    0x12,0x4B,0x31,0x40,0x12,0x09,0x04,0x0B,  /* 000007F0    ".K1@...." */
   3.456 +    0xFF,0xFF,0x00,0x00,0x0A,0x10,0x12,0x09,  /* 000007F8    "........" */
   3.457 +    0x04,0x0B,0xFF,0xFF,0x01,0x00,0x0A,0x11,  /* 00000800    "........" */
   3.458 +    0x12,0x0A,0x04,0x0B,0xFF,0xFF,0x0A,0x02,  /* 00000808    "........" */
   3.459 +    0x00,0x0A,0x12,0x12,0x0A,0x04,0x0B,0xFF,  /* 00000810    "........" */
   3.460 +    0xFF,0x0A,0x03,0x00,0x0A,0x13,0x12,0x0B,  /* 00000818    "........" */
   3.461 +    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,0x00,  /* 00000820    "........" */
   3.462 +    0x0A,0x14,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 00000828    "........" */
   3.463 +    0x01,0x00,0x01,0x00,0x0A,0x15,0x12,0x0C,  /* 00000830    "........" */
   3.464 +    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x0A,0x02,  /* 00000838    "........" */
   3.465 +    0x00,0x0A,0x16,0x12,0x0C,0x04,0x0C,0xFF,  /* 00000840    "........" */
   3.466 +    0xFF,0x01,0x00,0x0A,0x03,0x00,0x0A,0x17,  /* 00000848    "........" */
   3.467 +    0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x02,0x00,  /* 00000850    "........" */
   3.468 +    0x00,0x00,0x0A,0x18,0x12,0x0B,0x04,0x0C,  /* 00000858    "........" */
   3.469 +    0xFF,0xFF,0x02,0x00,0x01,0x00,0x0A,0x19,  /* 00000860    "........" */
   3.470 +    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x02,0x00,  /* 00000868    "........" */
   3.471 +    0x0A,0x02,0x00,0x0A,0x1A,0x12,0x0C,0x04,  /* 00000870    "........" */
   3.472 +    0x0C,0xFF,0xFF,0x02,0x00,0x0A,0x03,0x00,  /* 00000878    "........" */
   3.473 +    0x0A,0x1B,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 00000880    "........" */
   3.474 +    0x03,0x00,0x00,0x00,0x0A,0x1C,0x12,0x0B,  /* 00000888    "........" */
   3.475 +    0x04,0x0C,0xFF,0xFF,0x03,0x00,0x01,0x00,  /* 00000890    "........" */
   3.476 +    0x0A,0x1D,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 00000898    "........" */
   3.477 +    0x03,0x00,0x0A,0x02,0x00,0x0A,0x1E,0x12,  /* 000008A0    "........" */
   3.478 +    0x0C,0x04,0x0C,0xFF,0xFF,0x03,0x00,0x0A,  /* 000008A8    "........" */
   3.479 +    0x03,0x00,0x0A,0x1F,0x12,0x0B,0x04,0x0C,  /* 000008B0    "........" */
   3.480 +    0xFF,0xFF,0x04,0x00,0x00,0x00,0x0A,0x20,  /* 000008B8    "....... " */
   3.481 +    0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x04,0x00,  /* 000008C0    "........" */
   3.482 +    0x01,0x00,0x0A,0x21,0x12,0x0C,0x04,0x0C,  /* 000008C8    "...!...." */
   3.483 +    0xFF,0xFF,0x04,0x00,0x0A,0x02,0x00,0x0A,  /* 000008D0    "........" */
   3.484 +    0x22,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x04,  /* 000008D8    ""......." */
   3.485 +    0x00,0x0A,0x03,0x00,0x0A,0x23,0x12,0x0B,  /* 000008E0    ".....#.." */
   3.486 +    0x04,0x0C,0xFF,0xFF,0x05,0x00,0x00,0x00,  /* 000008E8    "........" */
   3.487 +    0x0A,0x24,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 000008F0    ".$......" */
   3.488 +    0x05,0x00,0x01,0x00,0x0A,0x25,0x12,0x0C,  /* 000008F8    ".....%.." */
   3.489 +    0x04,0x0C,0xFF,0xFF,0x05,0x00,0x0A,0x02,  /* 00000900    "........" */
   3.490 +    0x00,0x0A,0x26,0x12,0x0C,0x04,0x0C,0xFF,  /* 00000908    "..&....." */
   3.491 +    0xFF,0x05,0x00,0x0A,0x03,0x00,0x0A,0x27,  /* 00000910    ".......'" */
   3.492 +    0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x06,0x00,  /* 00000918    "........" */
   3.493 +    0x00,0x00,0x0A,0x28,0x12,0x0B,0x04,0x0C,  /* 00000920    "...(...." */
   3.494 +    0xFF,0xFF,0x06,0x00,0x01,0x00,0x0A,0x29,  /* 00000928    ".......)" */
   3.495 +    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x06,0x00,  /* 00000930    "........" */
   3.496 +    0x0A,0x02,0x00,0x0A,0x2A,0x12,0x0C,0x04,  /* 00000938    "....*..." */
   3.497 +    0x0C,0xFF,0xFF,0x06,0x00,0x0A,0x03,0x00,  /* 00000940    "........" */
   3.498 +    0x0A,0x2B,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 00000948    ".+......" */
   3.499 +    0x07,0x00,0x00,0x00,0x0A,0x2C,0x12,0x0B,  /* 00000950    ".....,.." */
   3.500 +    0x04,0x0C,0xFF,0xFF,0x07,0x00,0x01,0x00,  /* 00000958    "........" */
   3.501 +    0x0A,0x2D,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 00000960    ".-......" */
   3.502 +    0x07,0x00,0x0A,0x02,0x00,0x0A,0x2E,0x12,  /* 00000968    "........" */
   3.503 +    0x0C,0x04,0x0C,0xFF,0xFF,0x07,0x00,0x0A,  /* 00000970    "........" */
   3.504 +    0x03,0x00,0x0A,0x2F,0x12,0x0B,0x04,0x0C,  /* 00000978    ".../...." */
   3.505 +    0xFF,0xFF,0x08,0x00,0x00,0x00,0x0A,0x11,  /* 00000980    "........" */
   3.506 +    0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x08,0x00,  /* 00000988    "........" */
   3.507 +    0x01,0x00,0x0A,0x12,0x12,0x0C,0x04,0x0C,  /* 00000990    "........" */
   3.508 +    0xFF,0xFF,0x08,0x00,0x0A,0x02,0x00,0x0A,  /* 00000998    "........" */
   3.509 +    0x13,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x08,  /* 000009A0    "........" */
   3.510 +    0x00,0x0A,0x03,0x00,0x0A,0x14,0x12,0x0B,  /* 000009A8    "........" */
   3.511 +    0x04,0x0C,0xFF,0xFF,0x09,0x00,0x00,0x00,  /* 000009B0    "........" */
   3.512 +    0x0A,0x15,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 000009B8    "........" */
   3.513 +    0x09,0x00,0x01,0x00,0x0A,0x16,0x12,0x0C,  /* 000009C0    "........" */
   3.514 +    0x04,0x0C,0xFF,0xFF,0x09,0x00,0x0A,0x02,  /* 000009C8    "........" */
   3.515 +    0x00,0x0A,0x17,0x12,0x0C,0x04,0x0C,0xFF,  /* 000009D0    "........" */
   3.516 +    0xFF,0x09,0x00,0x0A,0x03,0x00,0x0A,0x18,  /* 000009D8    "........" */
   3.517 +    0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x0A,0x00,  /* 000009E0    "........" */
   3.518 +    0x00,0x00,0x0A,0x19,0x12,0x0B,0x04,0x0C,  /* 000009E8    "........" */
   3.519 +    0xFF,0xFF,0x0A,0x00,0x01,0x00,0x0A,0x1A,  /* 000009F0    "........" */
   3.520 +    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x0A,0x00,  /* 000009F8    "........" */
   3.521 +    0x0A,0x02,0x00,0x0A,0x1B,0x12,0x0C,0x04,  /* 00000A00    "........" */
   3.522 +    0x0C,0xFF,0xFF,0x0A,0x00,0x0A,0x03,0x00,  /* 00000A08    "........" */
   3.523 +    0x0A,0x1C,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 00000A10    "........" */
   3.524 +    0x0B,0x00,0x00,0x00,0x0A,0x1D,0x12,0x0B,  /* 00000A18    "........" */
   3.525 +    0x04,0x0C,0xFF,0xFF,0x0B,0x00,0x01,0x00,  /* 00000A20    "........" */
   3.526 +    0x0A,0x1E,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 00000A28    "........" */
   3.527 +    0x0B,0x00,0x0A,0x02,0x00,0x0A,0x1F,0x12,  /* 00000A30    "........" */
   3.528 +    0x0C,0x04,0x0C,0xFF,0xFF,0x0B,0x00,0x0A,  /* 00000A38    "........" */
   3.529 +    0x03,0x00,0x0A,0x20,0x12,0x0B,0x04,0x0C,  /* 00000A40    "... ...." */
   3.530 +    0xFF,0xFF,0x0C,0x00,0x00,0x00,0x0A,0x21,  /* 00000A48    ".......!" */
   3.531 +    0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x0C,0x00,  /* 00000A50    "........" */
   3.532 +    0x01,0x00,0x0A,0x22,0x12,0x0C,0x04,0x0C,  /* 00000A58    "..."...." */
   3.533 +    0xFF,0xFF,0x0C,0x00,0x0A,0x02,0x00,0x0A,  /* 00000A60    "........" */
   3.534 +    0x23,0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x0C,  /* 00000A68    "#......." */
   3.535 +    0x00,0x0A,0x03,0x00,0x0A,0x24,0x12,0x0B,  /* 00000A70    ".....$.." */
   3.536 +    0x04,0x0C,0xFF,0xFF,0x0D,0x00,0x00,0x00,  /* 00000A78    "........" */
   3.537 +    0x0A,0x25,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 00000A80    ".%......" */
   3.538 +    0x0D,0x00,0x01,0x00,0x0A,0x26,0x12,0x0C,  /* 00000A88    ".....&.." */
   3.539 +    0x04,0x0C,0xFF,0xFF,0x0D,0x00,0x0A,0x02,  /* 00000A90    "........" */
   3.540 +    0x00,0x0A,0x27,0x12,0x0C,0x04,0x0C,0xFF,  /* 00000A98    "..'....." */
   3.541 +    0xFF,0x0D,0x00,0x0A,0x03,0x00,0x0A,0x28,  /* 00000AA0    ".......(" */
   3.542 +    0x12,0x0B,0x04,0x0C,0xFF,0xFF,0x0E,0x00,  /* 00000AA8    "........" */
   3.543 +    0x00,0x00,0x0A,0x29,0x12,0x0B,0x04,0x0C,  /* 00000AB0    "...)...." */
   3.544 +    0xFF,0xFF,0x0E,0x00,0x01,0x00,0x0A,0x2A,  /* 00000AB8    ".......*" */
   3.545 +    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x0E,0x00,  /* 00000AC0    "........" */
   3.546 +    0x0A,0x02,0x00,0x0A,0x2B,0x12,0x0C,0x04,  /* 00000AC8    "....+..." */
   3.547 +    0x0C,0xFF,0xFF,0x0E,0x00,0x0A,0x03,0x00,  /* 00000AD0    "........" */
   3.548 +    0x0A,0x2C,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 00000AD8    ".,......" */
   3.549 +    0x0F,0x00,0x00,0x00,0x0A,0x2D,0x12,0x0B,  /* 00000AE0    ".....-.." */
   3.550 +    0x04,0x0C,0xFF,0xFF,0x0F,0x00,0x01,0x00,  /* 00000AE8    "........" */
   3.551 +    0x0A,0x2E,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 00000AF0    "........" */
   3.552 +    0x0F,0x00,0x0A,0x02,0x00,0x0A,0x2F,0x12,  /* 00000AF8    "....../." */
   3.553 +    0x0C,0x04,0x0C,0xFF,0xFF,0x0F,0x00,0x0A,  /* 00000B00    "........" */
   3.554 +    0x03,0x00,0x0A,0x10,0x5B,0x82,0x4C,0x31,  /* 00000B08    "....[.L1" */
   3.555 +    0x49,0x53,0x41,0x5F,0x08,0x5F,0x41,0x44,  /* 00000B10    "ISA_._AD" */
   3.556 +    0x52,0x0C,0x00,0x00,0x01,0x00,0x5B,0x80,  /* 00000B18    "R.....[." */
   3.557 +    0x50,0x49,0x52,0x51,0x02,0x0A,0x60,0x0A,  /* 00000B20    "PIRQ..`." */
   3.558 +    0x04,0x10,0x2E,0x5C,0x00,0x5B,0x81,0x29,  /* 00000B28    "...\.[.)" */
   3.559 +    0x5C,0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,  /* 00000B30    "\/._SB_P" */
   3.560 +    0x43,0x49,0x30,0x49,0x53,0x41,0x5F,0x50,  /* 00000B38    "CI0ISA_P" */
   3.561 +    0x49,0x52,0x51,0x01,0x50,0x49,0x52,0x41,  /* 00000B40    "IRQ.PIRA" */
   3.562 +    0x08,0x50,0x49,0x52,0x42,0x08,0x50,0x49,  /* 00000B48    ".PIRB.PI" */
   3.563 +    0x52,0x43,0x08,0x50,0x49,0x52,0x44,0x08,  /* 00000B50    "RC.PIRD." */
   3.564 +    0x5B,0x82,0x46,0x0B,0x53,0x59,0x53,0x52,  /* 00000B58    "[.F.SYSR" */
   3.565 +    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000B60    "._HID.A." */
   3.566 +    0x0C,0x02,0x08,0x5F,0x55,0x49,0x44,0x01,  /* 00000B68    "..._UID." */
   3.567 +    0x08,0x43,0x52,0x53,0x5F,0x11,0x4E,0x08,  /* 00000B70    ".CRS_.N." */
   3.568 +    0x0A,0x8A,0x47,0x01,0x10,0x00,0x10,0x00,  /* 00000B78    "..G....." */
   3.569 +    0x00,0x10,0x47,0x01,0x22,0x00,0x22,0x00,  /* 00000B80    "..G."."." */
   3.570 +    0x00,0x0C,0x47,0x01,0x30,0x00,0x30,0x00,  /* 00000B88    "..G.0.0." */
   3.571 +    0x00,0x10,0x47,0x01,0x44,0x00,0x44,0x00,  /* 00000B90    "..G.D.D." */
   3.572 +    0x00,0x1C,0x47,0x01,0x62,0x00,0x62,0x00,  /* 00000B98    "..G.b.b." */
   3.573 +    0x00,0x02,0x47,0x01,0x65,0x00,0x65,0x00,  /* 00000BA0    "..G.e.e." */
   3.574 +    0x00,0x0B,0x47,0x01,0x72,0x00,0x72,0x00,  /* 00000BA8    "..G.r.r." */
   3.575 +    0x00,0x0E,0x47,0x01,0x80,0x00,0x80,0x00,  /* 00000BB0    "..G....." */
   3.576 +    0x00,0x01,0x47,0x01,0x84,0x00,0x84,0x00,  /* 00000BB8    "..G....." */
   3.577 +    0x00,0x03,0x47,0x01,0x88,0x00,0x88,0x00,  /* 00000BC0    "..G....." */
   3.578 +    0x00,0x01,0x47,0x01,0x8C,0x00,0x8C,0x00,  /* 00000BC8    "..G....." */
   3.579 +    0x00,0x03,0x47,0x01,0x90,0x00,0x90,0x00,  /* 00000BD0    "..G....." */
   3.580 +    0x00,0x10,0x47,0x01,0xA2,0x00,0xA2,0x00,  /* 00000BD8    "..G....." */
   3.581 +    0x00,0x1C,0x47,0x01,0xE0,0x00,0xE0,0x00,  /* 00000BE0    "..G....." */
   3.582 +    0x00,0x10,0x47,0x01,0xA0,0x08,0xA0,0x08,  /* 00000BE8    "..G....." */
   3.583 +    0x00,0x04,0x47,0x01,0xC0,0x0C,0xC0,0x0C,  /* 00000BF0    "..G....." */
   3.584 +    0x00,0x10,0x47,0x01,0xD0,0x04,0xD0,0x04,  /* 00000BF8    "..G....." */
   3.585 +    0x00,0x02,0x79,0x00,0x14,0x0B,0x5F,0x43,  /* 00000C00    "..y..._C" */
   3.586 +    0x52,0x53,0x00,0xA4,0x43,0x52,0x53,0x5F,  /* 00000C08    "RS..CRS_" */
   3.587 +    0x5B,0x82,0x2B,0x50,0x49,0x43,0x5F,0x08,  /* 00000C10    "[.+PIC_." */
   3.588 +    0x5F,0x48,0x49,0x44,0x0B,0x41,0xD0,0x08,  /* 00000C18    "_HID.A.." */
   3.589 +    0x5F,0x43,0x52,0x53,0x11,0x18,0x0A,0x15,  /* 00000C20    "_CRS...." */
   3.590 +    0x47,0x01,0x20,0x00,0x20,0x00,0x01,0x02,  /* 00000C28    "G. . ..." */
   3.591 +    0x47,0x01,0xA0,0x00,0xA0,0x00,0x01,0x02,  /* 00000C30    "G......." */
   3.592 +    0x22,0x04,0x00,0x79,0x00,0x5B,0x82,0x47,  /* 00000C38    ""..y.[.G" */
   3.593 +    0x05,0x44,0x4D,0x41,0x30,0x08,0x5F,0x48,  /* 00000C40    ".DMA0._H" */
   3.594 +    0x49,0x44,0x0C,0x41,0xD0,0x02,0x00,0x08,  /* 00000C48    "ID.A...." */
   3.595 +    0x5F,0x43,0x52,0x53,0x11,0x41,0x04,0x0A,  /* 00000C50    "_CRS.A.." */
   3.596 +    0x3D,0x2A,0x10,0x04,0x47,0x01,0x00,0x00,  /* 00000C58    "=*..G..." */
   3.597 +    0x00,0x00,0x00,0x10,0x47,0x01,0x81,0x00,  /* 00000C60    "....G..." */
   3.598 +    0x81,0x00,0x00,0x03,0x47,0x01,0x87,0x00,  /* 00000C68    "....G..." */
   3.599 +    0x87,0x00,0x00,0x01,0x47,0x01,0x89,0x00,  /* 00000C70    "....G..." */
   3.600 +    0x89,0x00,0x00,0x03,0x47,0x01,0x8F,0x00,  /* 00000C78    "....G..." */
   3.601 +    0x8F,0x00,0x00,0x01,0x47,0x01,0xC0,0x00,  /* 00000C80    "....G..." */
   3.602 +    0xC0,0x00,0x00,0x20,0x47,0x01,0x80,0x04,  /* 00000C88    "... G..." */
   3.603 +    0x80,0x04,0x00,0x10,0x79,0x00,0x5B,0x82,  /* 00000C90    "....y.[." */
   3.604 +    0x25,0x54,0x4D,0x52,0x5F,0x08,0x5F,0x48,  /* 00000C98    "%TMR_._H" */
   3.605 +    0x49,0x44,0x0C,0x41,0xD0,0x01,0x00,0x08,  /* 00000CA0    "ID.A...." */
   3.606 +    0x5F,0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,  /* 00000CA8    "_CRS...." */
   3.607 +    0x47,0x01,0x40,0x00,0x40,0x00,0x00,0x04,  /* 00000CB0    "G.@.@..." */
   3.608 +    0x22,0x01,0x00,0x79,0x00,0x5B,0x82,0x25,  /* 00000CB8    ""..y.[.%" */
   3.609 +    0x52,0x54,0x43,0x5F,0x08,0x5F,0x48,0x49,  /* 00000CC0    "RTC_._HI" */
   3.610 +    0x44,0x0C,0x41,0xD0,0x0B,0x00,0x08,0x5F,  /* 00000CC8    "D.A...._" */
   3.611 +    0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,  /* 00000CD0    "CRS....G" */
   3.612 +    0x01,0x70,0x00,0x70,0x00,0x00,0x02,0x22,  /* 00000CD8    ".p.p..."" */
   3.613 +    0x00,0x01,0x79,0x00,0x5B,0x82,0x22,0x53,  /* 00000CE0    "..y.[."S" */
   3.614 +    0x50,0x4B,0x52,0x08,0x5F,0x48,0x49,0x44,  /* 00000CE8    "PKR._HID" */
   3.615 +    0x0C,0x41,0xD0,0x08,0x00,0x08,0x5F,0x43,  /* 00000CF0    ".A...._C" */
   3.616 +    0x52,0x53,0x11,0x0D,0x0A,0x0A,0x47,0x01,  /* 00000CF8    "RS....G." */
   3.617 +    0x61,0x00,0x61,0x00,0x00,0x01,0x79,0x00,  /* 00000D00    "a.a...y." */
   3.618 +    0x5B,0x82,0x31,0x50,0x53,0x32,0x4D,0x08,  /* 00000D08    "[.1PS2M." */
   3.619 +    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0F,  /* 00000D10    "_HID.A.." */
   3.620 +    0x13,0x08,0x5F,0x43,0x49,0x44,0x0C,0x41,  /* 00000D18    ".._CID.A" */
   3.621 +    0xD0,0x0F,0x13,0x14,0x09,0x5F,0x53,0x54,  /* 00000D20    "....._ST" */
   3.622 +    0x41,0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,  /* 00000D28    "A....._C" */
   3.623 +    0x52,0x53,0x11,0x08,0x0A,0x05,0x22,0x00,  /* 00000D30    "RS...."." */
   3.624 +    0x10,0x79,0x00,0x5B,0x82,0x42,0x04,0x50,  /* 00000D38    ".y.[.B.P" */
   3.625 +    0x53,0x32,0x4B,0x08,0x5F,0x48,0x49,0x44,  /* 00000D40    "S2K._HID" */
   3.626 +    0x0C,0x41,0xD0,0x03,0x03,0x08,0x5F,0x43,  /* 00000D48    ".A...._C" */
   3.627 +    0x49,0x44,0x0C,0x41,0xD0,0x03,0x0B,0x14,  /* 00000D50    "ID.A...." */
   3.628 +    0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A,  /* 00000D58    "._STA..." */
   3.629 +    0x0F,0x08,0x5F,0x43,0x52,0x53,0x11,0x18,  /* 00000D60    ".._CRS.." */
   3.630 +    0x0A,0x15,0x47,0x01,0x60,0x00,0x60,0x00,  /* 00000D68    "..G.`.`." */
   3.631 +    0x00,0x01,0x47,0x01,0x64,0x00,0x64,0x00,  /* 00000D70    "..G.d.d." */
   3.632 +    0x00,0x01,0x22,0x02,0x00,0x79,0x00,0x5B,  /* 00000D78    ".."..y.[" */
   3.633 +    0x82,0x3A,0x46,0x44,0x43,0x30,0x08,0x5F,  /* 00000D80    ".:FDC0._" */
   3.634 +    0x48,0x49,0x44,0x0C,0x41,0xD0,0x07,0x00,  /* 00000D88    "HID.A..." */
   3.635 +    0x14,0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,  /* 00000D90    ".._STA.." */
   3.636 +    0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53,0x11,  /* 00000D98    "..._CRS." */
   3.637 +    0x1B,0x0A,0x18,0x47,0x01,0xF0,0x03,0xF0,  /* 00000DA0    "...G...." */
   3.638 +    0x03,0x01,0x06,0x47,0x01,0xF7,0x03,0xF7,  /* 00000DA8    "...G...." */
   3.639 +    0x03,0x01,0x01,0x22,0x40,0x00,0x2A,0x04,  /* 00000DB0    "..."@.*." */
   3.640 +    0x00,0x79,0x00,0x5B,0x82,0x35,0x55,0x41,  /* 00000DB8    ".y.[.5UA" */
   3.641 +    0x52,0x31,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000DC0    "R1._HID." */
   3.642 +    0x41,0xD0,0x05,0x01,0x08,0x5F,0x55,0x49,  /* 00000DC8    "A...._UI" */
   3.643 +    0x44,0x01,0x14,0x09,0x5F,0x53,0x54,0x41,  /* 00000DD0    "D..._STA" */
   3.644 +    0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,  /* 00000DD8    "....._CR" */
   3.645 +    0x53,0x11,0x10,0x0A,0x0D,0x47,0x01,0xF8,  /* 00000DE0    "S....G.." */
   3.646 +    0x03,0xF8,0x03,0x01,0x08,0x22,0x10,0x00,  /* 00000DE8    ".....".." */
   3.647 +    0x79,0x00,0x5B,0x82,0x36,0x4C,0x54,0x50,  /* 00000DF0    "y.[.6LTP" */
   3.648 +    0x31,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00000DF8    "1._HID.A" */
   3.649 +    0xD0,0x04,0x00,0x08,0x5F,0x55,0x49,0x44,  /* 00000E00    "...._UID" */
   3.650 +    0x0A,0x02,0x14,0x09,0x5F,0x53,0x54,0x41,  /* 00000E08    "...._STA" */
   3.651 +    0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,  /* 00000E10    "....._CR" */
   3.652 +    0x53,0x11,0x10,0x0A,0x0D,0x47,0x01,0x78,  /* 00000E18    "S....G.x" */
   3.653 +    0x03,0x78,0x03,0x08,0x08,0x22,0x80,0x00,  /* 00000E20    ".x...".." */
   3.654 +    0x79,0x00,
   3.655  };
   3.656  int DsdtLen=sizeof(AmlCode);
     4.1 --- a/tools/firmware/hvmloader/acpi/gen.c	Tue Nov 21 17:34:17 2006 +0000
     4.2 +++ b/tools/firmware/hvmloader/acpi/gen.c	Tue Nov 21 19:22:25 2006 +0000
     4.3 @@ -24,6 +24,8 @@
     4.4  		"       generage acpitable and write to the binary \n"	\
     4.5  		"       filename - the binary name\n"
     4.6  
     4.7 +#define ACPI_TABLE_SIZE (8*1024)
     4.8 +
     4.9  int main(int argc, char **argv)
    4.10  {
    4.11  	char *filename;
     5.1 --- a/tools/firmware/hvmloader/hvmloader.c	Tue Nov 21 17:34:17 2006 +0000
     5.2 +++ b/tools/firmware/hvmloader/hvmloader.c	Tue Nov 21 19:22:25 2006 +0000
     5.3 @@ -175,7 +175,7 @@ main(void)
     5.4  	puts("Loading ROMBIOS ...\n");
     5.5  	memcpy((void *)ROMBIOS_PHYSICAL_ADDRESS, rombios, sizeof(rombios));
     5.6  
     5.7 -        create_mp_tables();
     5.8 +	create_mp_tables();
     5.9  	
    5.10  	if (cirrus_check()) {
    5.11  		puts("Loading Cirrus VGABIOS ...\n");
     6.1 --- a/tools/firmware/hvmloader/mp_tables.c	Tue Nov 21 17:34:17 2006 +0000
     6.2 +++ b/tools/firmware/hvmloader/mp_tables.c	Tue Nov 21 19:22:25 2006 +0000
     6.3 @@ -28,6 +28,7 @@
     6.4   * Place - Suite 330, Boston, MA 02111-1307 USA.
     6.5   */
     6.6  
     6.7 +#include <acpi_utils.h>
     6.8  
     6.9  /* FIXME find a header that already has types defined!!! */
    6.10  typedef unsigned char  uint8_t;
    6.11 @@ -77,20 +78,23 @@ typedef   signed long int64_t;
    6.12  
    6.13  #define BUS_TYPE_LENGTH        6
    6.14  #define BUS_TYPE_STR_ISA       "ISA   "
    6.15 +#define BUS_TYPE_STR_PCI       "PCI   "
    6.16 +
    6.17 +#define BUS_ID_ISA             0
    6.18 +#define BUS_ID_PCI             1
    6.19  
    6.20  #define LAPIC_BASE_ADDR        0xFEE00000
    6.21  
    6.22 +#define IOAPIC_ID              0
    6.23  #define IOAPIC_VERSION         0x11
    6.24  #define IOAPIC_BASE_ADDR       0xFEC00000
    6.25 -#define IOAPIC_FLAG_ENABLED   (1U << 0)
    6.26 +#define IOAPIC_FLAG_ENABLED    (1U << 0)
    6.27  
    6.28  #define INTR_TYPE_INT          0
    6.29  #define INTR_TYPE_NMI          1
    6.30  #define INTR_TYPE_SMI          2
    6.31  #define INTR_TYPE_EXTINT       3
    6.32  
    6.33 -#define INTR_FLAGS             0
    6.34 -
    6.35  #define INTR_MAX_NR            16
    6.36  
    6.37  #include "util.h"
    6.38 @@ -103,232 +107,206 @@ extern int get_vcpu_nr(void);  /* for th
    6.39  
    6.40  /* MP Floating Pointer Structure */
    6.41  struct mp_floating_pointer_struct {
    6.42 -	uint8_t signature[4];
    6.43 -	uint32_t mp_table;
    6.44 -	uint8_t length;
    6.45 -	uint8_t revision;
    6.46 -	uint8_t checksum;
    6.47 -	uint8_t feature[5];
    6.48 +    uint8_t signature[4];
    6.49 +    uint32_t mp_table;
    6.50 +    uint8_t length;
    6.51 +    uint8_t revision;
    6.52 +    uint8_t checksum;
    6.53 +    uint8_t feature[5];
    6.54  };
    6.55  
    6.56  /* MP Configuration Table */
    6.57  struct mp_config_table {
    6.58 -	uint8_t signature[4];
    6.59 -	uint16_t length;
    6.60 -	uint8_t revision;
    6.61 -	uint8_t checksum;
    6.62 -	uint8_t oem_id[8];
    6.63 -	uint8_t vendor_id[12];
    6.64 -	uint32_t oem_table;
    6.65 -	uint16_t oem_table_sz;
    6.66 -	uint16_t nr_entries;
    6.67 -	uint32_t lapic;
    6.68 -	uint16_t extended_length;
    6.69 -	uint8_t extended_checksum;
    6.70 -	uint8_t reserved;
    6.71 +    uint8_t signature[4];
    6.72 +    uint16_t length;
    6.73 +    uint8_t revision;
    6.74 +    uint8_t checksum;
    6.75 +    uint8_t oem_id[8];
    6.76 +    uint8_t vendor_id[12];
    6.77 +    uint32_t oem_table;
    6.78 +    uint16_t oem_table_sz;
    6.79 +    uint16_t nr_entries;
    6.80 +    uint32_t lapic;
    6.81 +    uint16_t extended_length;
    6.82 +    uint8_t extended_checksum;
    6.83 +    uint8_t reserved;
    6.84  };
    6.85  
    6.86  /* MP Processor Entry */
    6.87  struct mp_proc_entry {
    6.88 -	uint8_t type;
    6.89 -	uint8_t lapic_id;
    6.90 -	uint8_t lapic_version;
    6.91 -	uint8_t cpu_flags;
    6.92 -	uint32_t cpu_signature;
    6.93 -	uint32_t feature_flags;
    6.94 -	uint8_t reserved[8];
    6.95 +    uint8_t type;
    6.96 +    uint8_t lapic_id;
    6.97 +    uint8_t lapic_version;
    6.98 +    uint8_t cpu_flags;
    6.99 +    uint32_t cpu_signature;
   6.100 +    uint32_t feature_flags;
   6.101 +    uint8_t reserved[8];
   6.102  };
   6.103  
   6.104  /* MP Bus Entry */
   6.105  struct mp_bus_entry {
   6.106 -	uint8_t type;
   6.107 -	uint8_t bus_id;
   6.108 -	uint8_t bus_type_str[6];
   6.109 +    uint8_t type;
   6.110 +    uint8_t bus_id;
   6.111 +    uint8_t bus_type_str[6];
   6.112  };
   6.113  
   6.114  /* MP IOAPIC Entry */
   6.115  struct mp_ioapic_entry {
   6.116 -	uint8_t type;
   6.117 -	uint8_t ioapic_id;
   6.118 -	uint8_t ioapic_version;
   6.119 -	uint8_t ioapic_flags;
   6.120 -	uint32_t ioapic_addr;
   6.121 +    uint8_t type;
   6.122 +    uint8_t ioapic_id;
   6.123 +    uint8_t ioapic_version;
   6.124 +    uint8_t ioapic_flags;
   6.125 +    uint32_t ioapic_addr;
   6.126  };
   6.127  
   6.128  /* MP IO Interrupt Entry */
   6.129  struct mp_io_intr_entry {
   6.130 -	uint8_t type;
   6.131 -	uint8_t intr_type;
   6.132 -	uint16_t io_intr_flags;
   6.133 -	uint8_t src_bus_id;
   6.134 -	uint8_t src_bus_irq;
   6.135 -	uint8_t dst_ioapic_id;
   6.136 -	uint8_t dst_ioapic_intin;
   6.137 +    uint8_t type;
   6.138 +    uint8_t intr_type;
   6.139 +    uint16_t io_intr_flags;
   6.140 +    uint8_t src_bus_id;
   6.141 +    uint8_t src_bus_irq;
   6.142 +    uint8_t dst_ioapic_id;
   6.143 +    uint8_t dst_ioapic_intin;
   6.144  };
   6.145  
   6.146  /* MP Local Interrupt Entry */
   6.147  struct mp_local_intr_entry {
   6.148 -	uint8_t type;
   6.149 -	uint8_t intr_type;
   6.150 -	uint16_t local_intr_flags;
   6.151 -	uint8_t src_bus_id;
   6.152 -	uint8_t src_bus_irq;
   6.153 -	uint8_t dst_lapic_id;
   6.154 -	uint8_t dst_lapic_lintin;
   6.155 +    uint8_t type;
   6.156 +    uint8_t intr_type;
   6.157 +    uint16_t local_intr_flags;
   6.158 +    uint8_t src_bus_id;
   6.159 +    uint8_t src_bus_irq;
   6.160 +    uint8_t dst_lapic_id;
   6.161 +    uint8_t dst_lapic_lintin;
   6.162  };
   6.163  
   6.164  
   6.165 -/* 
   6.166 - * fill_mp_config_table - fills in the information for the MP config table
   6.167 - *    
   6.168 - * When calculating the length and nr_entries fields, keep in mind that there
   6.169 - * are always 18 non-processor entries and N processor entries
   6.170 - * 
   6.171 - *    N vcpu entries
   6.172 - *    1 bus entry 
   6.173 - *    1 IOAPIC entry 
   6.174 - * + 16 IO intr. entries
   6.175 - * ----------------------
   6.176 - * 18 + N total entries
   6.177 - */
   6.178 -void fill_mp_config_table(struct mp_config_table *mpct)
   6.179 +void fill_mp_config_table(struct mp_config_table *mpct, int length)
   6.180  {
   6.181 -	int vcpu_nr;
   6.182 -
   6.183 -	vcpu_nr = get_vcpu_nr();
   6.184 -
   6.185 -	/* fill in the MP configuration table signature, "PCMP" */
   6.186 -	mpct->signature[0] = 'P';
   6.187 -	mpct->signature[1] = 'C';
   6.188 -	mpct->signature[2] = 'M';
   6.189 -	mpct->signature[3] = 'P';
   6.190 -
   6.191 -	mpct->length =    sizeof(struct mp_config_table)
   6.192 -			+ vcpu_nr * sizeof(struct mp_proc_entry)
   6.193 -			+ sizeof(struct mp_ioapic_entry)
   6.194 -			+ sizeof(struct mp_bus_entry)
   6.195 -			+ 16 * sizeof(struct mp_local_intr_entry);
   6.196 -
   6.197 -	mpct->revision = 4;
   6.198 +    int vcpu_nr, i;
   6.199 +    uint8_t checksum;
   6.200  
   6.201 -	/* 
   6.202 -	 * We'll fill in the checksum later after all of the 
   6.203 -	 * entries have been created
   6.204 -	 */
   6.205 -	mpct->checksum = 0;
   6.206 -
   6.207 -	/* fill in the OEM ID string, "_HVMCPU_" */
   6.208 -	mpct->oem_id[0] = '_'; mpct->oem_id[3] = 'M'; mpct->oem_id[6] = 'U';
   6.209 -	mpct->oem_id[1] = 'H'; mpct->oem_id[4] = 'C'; mpct->oem_id[7] = '_';
   6.210 -	mpct->oem_id[2] = 'V'; mpct->oem_id[5] = 'P';
   6.211 -
   6.212 -	/* fill in the Vendor ID string, "XEN         " */
   6.213 -	mpct->vendor_id[0] = 'X'; mpct->vendor_id[6] =  ' ';
   6.214 -	mpct->vendor_id[1] = 'E'; mpct->vendor_id[7] =  ' ';
   6.215 -	mpct->vendor_id[2] = 'N'; mpct->vendor_id[8] =  ' ';
   6.216 -	mpct->vendor_id[3] = ' '; mpct->vendor_id[9] =  ' ';
   6.217 -	mpct->vendor_id[4] = ' '; mpct->vendor_id[10] = ' ';
   6.218 -	mpct->vendor_id[5] = ' '; mpct->vendor_id[11] = ' ';
   6.219 +    vcpu_nr = get_vcpu_nr();
   6.220  
   6.221 -	mpct->oem_table = 0;
   6.222 -	mpct->oem_table_sz = 0;
   6.223 -
   6.224 -	mpct->nr_entries = vcpu_nr + NR_NONPROC_ENTRIES;
   6.225 -
   6.226 -	mpct->lapic = LAPIC_BASE_ADDR;
   6.227 -	mpct->extended_length = 0;
   6.228 -	mpct->extended_checksum = 0;
   6.229 -}
   6.230 -
   6.231 +    /* fill in the MP configuration table signature, "PCMP" */
   6.232 +    mpct->signature[0] = 'P';
   6.233 +    mpct->signature[1] = 'C';
   6.234 +    mpct->signature[2] = 'M';
   6.235 +    mpct->signature[3] = 'P';
   6.236  
   6.237 -/* calculates the checksum for the MP configuration table */
   6.238 -void fill_mp_config_table_checksum(struct mp_config_table *mpct)
   6.239 -{
   6.240 -	int i;
   6.241 -	uint8_t checksum;
   6.242 +    mpct->length = length;
   6.243  
   6.244 -	checksum = 0;
   6.245 -	for (i = 0; i < mpct->length; ++i)
   6.246 -		checksum += ((uint8_t *)(mpct))[i];
   6.247 -	mpct->checksum = -checksum;
   6.248 +    mpct->revision = 4;
   6.249 +
   6.250 +    /* fill in the OEM ID string, "_HVMCPU_" */
   6.251 +    mpct->oem_id[0] = '_'; mpct->oem_id[3] = 'M'; mpct->oem_id[6] = 'U';
   6.252 +    mpct->oem_id[1] = 'H'; mpct->oem_id[4] = 'C'; mpct->oem_id[7] = '_';
   6.253 +    mpct->oem_id[2] = 'V'; mpct->oem_id[5] = 'P';
   6.254 +
   6.255 +    /* fill in the Vendor ID string, "XEN         " */
   6.256 +    mpct->vendor_id[0] = 'X'; mpct->vendor_id[6] =  ' ';
   6.257 +    mpct->vendor_id[1] = 'E'; mpct->vendor_id[7] =  ' ';
   6.258 +    mpct->vendor_id[2] = 'N'; mpct->vendor_id[8] =  ' ';
   6.259 +    mpct->vendor_id[3] = ' '; mpct->vendor_id[9] =  ' ';
   6.260 +    mpct->vendor_id[4] = ' '; mpct->vendor_id[10] = ' ';
   6.261 +    mpct->vendor_id[5] = ' '; mpct->vendor_id[11] = ' ';
   6.262 +
   6.263 +    mpct->oem_table = 0;
   6.264 +    mpct->oem_table_sz = 0;
   6.265 +
   6.266 +    mpct->nr_entries = vcpu_nr + NR_NONPROC_ENTRIES;
   6.267 +
   6.268 +    mpct->lapic = LAPIC_BASE_ADDR;
   6.269 +    mpct->extended_length = 0;
   6.270 +    mpct->extended_checksum = 0;
   6.271 +
   6.272 +    /* Finally, fill in the checksum. */
   6.273 +    mpct->checksum = checksum = 0;
   6.274 +    for ( i = 0; i < length; i++ )
   6.275 +        checksum += ((uint8_t *)(mpct))[i];
   6.276 +    mpct->checksum = -checksum;
   6.277  }
   6.278  
   6.279 -
   6.280  /* fills in an MP processor entry for VCPU 'vcpu_id' */
   6.281  void fill_mp_proc_entry(struct mp_proc_entry *mppe, int vcpu_id)
   6.282  {
   6.283 -	mppe->type = ENTRY_TYPE_PROCESSOR;
   6.284 -	mppe->lapic_id = vcpu_id;
   6.285 -	mppe->lapic_version = 0x11;
   6.286 -	mppe->cpu_flags = CPU_FLAG_ENABLED;
   6.287 -	if (vcpu_id == 0)
   6.288 -		mppe->cpu_flags |= CPU_FLAG_BSP;
   6.289 -	mppe->cpu_signature = CPU_SIGNATURE;
   6.290 -	mppe->feature_flags = CPU_FEATURES;
   6.291 +    mppe->type = ENTRY_TYPE_PROCESSOR;
   6.292 +    mppe->lapic_id = vcpu_id;
   6.293 +    mppe->lapic_version = 0x11;
   6.294 +    mppe->cpu_flags = CPU_FLAG_ENABLED;
   6.295 +    if ( vcpu_id == 0 )
   6.296 +        mppe->cpu_flags |= CPU_FLAG_BSP;
   6.297 +    mppe->cpu_signature = CPU_SIGNATURE;
   6.298 +    mppe->feature_flags = CPU_FEATURES;
   6.299  }
   6.300  
   6.301  
   6.302  /* fills in an MP bus entry of type 'type' and bus ID 'bus_id' */
   6.303  void fill_mp_bus_entry(struct mp_bus_entry *mpbe, int bus_id, const char *type)
   6.304  {
   6.305 -	int i;
   6.306 +    int i;
   6.307  
   6.308 -	mpbe->type = ENTRY_TYPE_BUS;
   6.309 -	mpbe->bus_id = bus_id;
   6.310 -	for (i = 0; i < BUS_TYPE_LENGTH; ++i)
   6.311 -		mpbe->bus_type_str[i] = type[i]; /* FIXME length check? */
   6.312 +    mpbe->type = ENTRY_TYPE_BUS;
   6.313 +    mpbe->bus_id = bus_id;
   6.314 +    for ( i = 0; i < BUS_TYPE_LENGTH; i++ )
   6.315 +        mpbe->bus_type_str[i] = type[i]; /* FIXME length check? */
   6.316  }
   6.317  
   6.318  
   6.319  /* fills in an MP IOAPIC entry for IOAPIC 'ioapic_id' */
   6.320  void fill_mp_ioapic_entry(struct mp_ioapic_entry *mpie, int ioapic_id)
   6.321  {
   6.322 -	mpie->type = ENTRY_TYPE_IOAPIC;
   6.323 -	mpie->ioapic_id = ioapic_id;
   6.324 -	mpie->ioapic_version = IOAPIC_VERSION;
   6.325 -	mpie->ioapic_flags = IOAPIC_FLAG_ENABLED;
   6.326 -	mpie->ioapic_addr = IOAPIC_BASE_ADDR;
   6.327 +    mpie->type = ENTRY_TYPE_IOAPIC;
   6.328 +    mpie->ioapic_id = ioapic_id;
   6.329 +    mpie->ioapic_version = IOAPIC_VERSION;
   6.330 +    mpie->ioapic_flags = IOAPIC_FLAG_ENABLED;
   6.331 +    mpie->ioapic_addr = IOAPIC_BASE_ADDR;
   6.332  }
   6.333  
   6.334  
   6.335  /* fills in an IO interrupt entry for IOAPIC 'ioapic_id' */
   6.336 -void fill_mp_io_intr_entry(struct mp_io_intr_entry *mpiie,
   6.337 -		int src_bus_irq, int ioapic_id, int dst_ioapic_intin)
   6.338 +void fill_mp_io_intr_entry(
   6.339 +    struct mp_io_intr_entry *mpiie,
   6.340 +    int src_bus_id, int src_bus_irq, int ioapic_id, int dst_ioapic_intin)
   6.341  {
   6.342 -	mpiie->type = ENTRY_TYPE_IO_INTR;
   6.343 -	mpiie->intr_type = INTR_TYPE_INT;
   6.344 -	mpiie->io_intr_flags = INTR_FLAGS;
   6.345 -	mpiie->src_bus_id = 0;
   6.346 -	mpiie->src_bus_irq = src_bus_irq;
   6.347 -	mpiie->dst_ioapic_id = ioapic_id;
   6.348 -	mpiie->dst_ioapic_intin = dst_ioapic_intin;
   6.349 +    mpiie->type = ENTRY_TYPE_IO_INTR;
   6.350 +    mpiie->intr_type = INTR_TYPE_INT;
   6.351 +    mpiie->io_intr_flags = 0;
   6.352 +    /* IRQs 10 and 11 are PCI, so level triggered and active low. */
   6.353 +    if ( (src_bus_irq == 10) || (src_bus_irq == 11) )
   6.354 +        mpiie->io_intr_flags = 0xf;
   6.355 +    mpiie->src_bus_id = src_bus_id;
   6.356 +    mpiie->src_bus_irq = src_bus_irq;
   6.357 +    mpiie->dst_ioapic_id = ioapic_id;
   6.358 +    mpiie->dst_ioapic_intin = dst_ioapic_intin;
   6.359  }
   6.360  
   6.361  
   6.362  /* fill in the mp floating processor structure */
   6.363  void fill_mpfps(struct mp_floating_pointer_struct *mpfps, uint32_t mpct)
   6.364  {
   6.365 -	int i;
   6.366 -	uint8_t checksum;
   6.367 +    int i;
   6.368 +    uint8_t checksum;
   6.369  
   6.370  
   6.371 -	mpfps->signature[0] = '_';
   6.372 -	mpfps->signature[1] = 'M';
   6.373 -	mpfps->signature[2] = 'P';
   6.374 -	mpfps->signature[3] = '_';
   6.375 +    mpfps->signature[0] = '_';
   6.376 +    mpfps->signature[1] = 'M';
   6.377 +    mpfps->signature[2] = 'P';
   6.378 +    mpfps->signature[3] = '_';
   6.379  
   6.380 -	mpfps->mp_table = mpct; 
   6.381 -	mpfps->length = 1;
   6.382 -	mpfps->revision = 4;
   6.383 -	mpfps->checksum = 0;
   6.384 -	for (i = 0; i < 5; ++i)
   6.385 -		mpfps->feature[i] = 0;
   6.386 +    mpfps->mp_table = mpct; 
   6.387 +    mpfps->length = 1;
   6.388 +    mpfps->revision = 4;
   6.389 +    mpfps->checksum = 0;
   6.390 +    for (i = 0; i < 5; ++i)
   6.391 +        mpfps->feature[i] = 0;
   6.392  
   6.393 -	/* compute the checksum for our new table */
   6.394 -	checksum = 0;
   6.395 -	for (i = 0; i < sizeof(struct mp_floating_pointer_struct); ++i)
   6.396 -		checksum += ((uint8_t *)(mpfps))[i];
   6.397 -	mpfps->checksum = -checksum;
   6.398 +    /* compute the checksum for our new table */
   6.399 +    checksum = 0;
   6.400 +    for ( i = 0; i < sizeof(struct mp_floating_pointer_struct); i++ )
   6.401 +        checksum += ((uint8_t *)(mpfps))[i];
   6.402 +    mpfps->checksum = -checksum;
   6.403  }
   6.404  
   6.405  
   6.406 @@ -340,88 +318,90 @@ void fill_mpfps(struct mp_floating_point
   6.407   */
   6.408  void* get_mp_table_start(void)
   6.409  {
   6.410 -	char *bios_mem;
   6.411 -	for (bios_mem = (char *)ROMBIOS_BEGIN; 
   6.412 -	     bios_mem != (char *)ROMBIOS_END; 
   6.413 -	     ++bios_mem)
   6.414 -		if (bios_mem[0] == '_' && bios_mem[1] == '_' &&
   6.415 -		    bios_mem[2] == '_' && bios_mem[3] == 'H' &&
   6.416 -		    bios_mem[4] == 'V' && bios_mem[5] == 'M' &&
   6.417 -		    bios_mem[6] == 'M' && bios_mem[7] == 'P')
   6.418 -			return bios_mem;
   6.419 +    char *bios_mem;
   6.420  
   6.421 -	return (void *)-1;
   6.422 +    for ( bios_mem = (char *)ROMBIOS_BEGIN; 
   6.423 +          bios_mem != (char *)ROMBIOS_END; 
   6.424 +          bios_mem++ )
   6.425 +    {
   6.426 +        if ( bios_mem[0] == '_' && bios_mem[1] == '_' &&
   6.427 +             bios_mem[2] == '_' && bios_mem[3] == 'H' &&
   6.428 +             bios_mem[4] == 'V' && bios_mem[5] == 'M' &&
   6.429 +             bios_mem[6] == 'M' && bios_mem[7] == 'P' )
   6.430 +            return bios_mem;
   6.431 +    }
   6.432 +
   6.433 +    return NULL;
   6.434  }
   6.435  
   6.436  
   6.437  /* recalculate the new ROMBIOS checksum after adding MP tables */
   6.438  void reset_bios_checksum(void)
   6.439  {
   6.440 -	uint32_t i;
   6.441 -	uint8_t checksum;
   6.442 +    uint32_t i;
   6.443 +    uint8_t checksum;
   6.444  
   6.445 -	checksum = 0;
   6.446 -	for (i = 0; i < ROMBIOS_MAXOFFSET; ++i)
   6.447 -		checksum += ((uint8_t *)(ROMBIOS_BEGIN))[i];
   6.448 -	
   6.449 -	*((uint8_t *)(ROMBIOS_BEGIN + ROMBIOS_MAXOFFSET)) = -checksum;
   6.450 +    checksum = 0;
   6.451 +    for (i = 0; i < ROMBIOS_MAXOFFSET; ++i)
   6.452 +        checksum += ((uint8_t *)(ROMBIOS_BEGIN))[i];
   6.453 +
   6.454 +    *((uint8_t *)(ROMBIOS_BEGIN + ROMBIOS_MAXOFFSET)) = -checksum;
   6.455  }
   6.456  
   6.457  
   6.458  /* create_mp_tables - creates MP tables for the guest based upon config data */
   6.459  void create_mp_tables(void)
   6.460  {
   6.461 -	void *mp_table_base;
   6.462 -	char *p;
   6.463 -	struct mp_config_table *mp_config_table;
   6.464 -	int vcpu_nr;
   6.465 -	int i;
   6.466 -
   6.467 -	vcpu_nr = get_vcpu_nr();
   6.468 -	
   6.469 -	puts("Creating MP tables ...\n");
   6.470 -
   6.471 -	/* find the 'safe' place in ROMBIOS for the MP tables */
   6.472 -	mp_table_base = get_mp_table_start();
   6.473 -	if (mp_table_base == (void *)-1) {
   6.474 -		puts("Couldn't find start point for MP tables\n");
   6.475 -		return;
   6.476 -	}
   6.477 -	p = mp_table_base;
   6.478 -
   6.479 -	fill_mp_config_table((struct mp_config_table *)p);
   6.480 -
   6.481 - 	/* save the location of the MP config table for a little later*/
   6.482 -	mp_config_table = (struct mp_config_table *)p;
   6.483 -	p += sizeof(struct mp_config_table);
   6.484 +    void *mp_table_base;
   6.485 +    char *p;
   6.486 +    int vcpu_nr, i, length;
   6.487  
   6.488 -	for (i = 0; i < vcpu_nr; ++i) {
   6.489 -		fill_mp_proc_entry((struct mp_proc_entry *)p, i);
   6.490 -		p += sizeof(struct mp_proc_entry);
   6.491 -	}
   6.492 -
   6.493 -	fill_mp_bus_entry((struct mp_bus_entry *)p, 0, BUS_TYPE_STR_ISA);
   6.494 -	p += sizeof(struct mp_bus_entry);
   6.495 -
   6.496 -	fill_mp_ioapic_entry((struct mp_ioapic_entry *)p, vcpu_nr);
   6.497 -	p += sizeof(struct mp_ioapic_entry);
   6.498 +    vcpu_nr = get_vcpu_nr();
   6.499  
   6.500 -	for (i = 0; i < INTR_MAX_NR; ++i) {
   6.501 -		fill_mp_io_intr_entry((struct mp_io_intr_entry *)p, 
   6.502 -				i, vcpu_nr, i);
   6.503 -		p += sizeof(struct mp_io_intr_entry);
   6.504 -	}
   6.505 +    puts("Creating MP tables ...\n");
   6.506  
   6.507 -	/* find the next 16-byte boundary to place the mp floating pointer */
   6.508 -	while ((unsigned long)p & 0xF)
   6.509 -		++p;
   6.510 -	
   6.511 -	fill_mpfps((struct mp_floating_pointer_struct *)p, 
   6.512 -			(uint32_t)mp_table_base);
   6.513 +    /* Find the 'safe' place in ROMBIOS for the MP tables. */
   6.514 +    mp_table_base = get_mp_table_start();
   6.515 +    if ( mp_table_base == NULL )
   6.516 +    {
   6.517 +        puts("Couldn't find start point for MP tables\n");
   6.518 +        return;
   6.519 +    }
   6.520  
   6.521 -	/* calculate the MP configuration table's checksum */
   6.522 -	fill_mp_config_table_checksum(mp_config_table);
   6.523 +    p = mp_table_base + sizeof(struct mp_config_table);
   6.524  
   6.525 -	/* finally, recalculate the ROMBIOS checksum */
   6.526 -	reset_bios_checksum();
   6.527 +    for ( i = 0; i < vcpu_nr; i++ )
   6.528 +    {
   6.529 +        fill_mp_proc_entry((struct mp_proc_entry *)p, i);
   6.530 +        p += sizeof(struct mp_proc_entry);
   6.531 +    }
   6.532 +
   6.533 +    fill_mp_bus_entry((struct mp_bus_entry *)p, BUS_ID_ISA, BUS_TYPE_STR_ISA);
   6.534 +    p += sizeof(struct mp_bus_entry);
   6.535 +
   6.536 +    fill_mp_bus_entry((struct mp_bus_entry *)p, BUS_ID_PCI, BUS_TYPE_STR_PCI);
   6.537 +    p += sizeof(struct mp_bus_entry);
   6.538 +
   6.539 +    fill_mp_ioapic_entry((struct mp_ioapic_entry *)p, IOAPIC_ID);
   6.540 +    p += sizeof(struct mp_ioapic_entry);
   6.541 +
   6.542 +    for ( i = 0; i < 16; i++ )
   6.543 +    {
   6.544 +        if ( i == 2 ) continue; /* skip the slave PIC connection */
   6.545 +        fill_mp_io_intr_entry((struct mp_io_intr_entry *)p, 
   6.546 +                              BUS_ID_ISA, i, IOAPIC_ID, i);
   6.547 +        p += sizeof(struct mp_io_intr_entry);
   6.548 +    }
   6.549 +
   6.550 +    length = p - (char *)mp_table_base;
   6.551 +
   6.552 +    /* find the next 16-byte boundary to place the mp floating pointer */
   6.553 +    while ( (unsigned long)p & 0xF )
   6.554 +        p++;
   6.555 +
   6.556 +    fill_mpfps((struct mp_floating_pointer_struct *)p, 
   6.557 +               (uint32_t)mp_table_base);
   6.558 +
   6.559 +    fill_mp_config_table((struct mp_config_table *)mp_table_base, length);
   6.560 +    reset_bios_checksum();
   6.561  }
     7.1 --- a/tools/firmware/rombios/rombios.c	Tue Nov 21 17:34:17 2006 +0000
     7.2 +++ b/tools/firmware/rombios/rombios.c	Tue Nov 21 19:22:25 2006 +0000
     7.3 @@ -9103,20 +9103,7 @@ pci_routing_table_structure:
     7.4    ;; first slot entry PCI-to-ISA (embedded)
     7.5    db 0 ;; pci bus number
     7.6    db 0x08 ;; pci device number (bit 7-3)
     7.7 -  db 0x60 ;; link value INTA#: pointer into PCI2ISA config space
     7.8 -  dw 0xdef8 ;; IRQ bitmap INTA# 
     7.9 -  db 0x61 ;; link value INTB#
    7.10 -  dw 0xdef8 ;; IRQ bitmap INTB# 
    7.11 -  db 0x62 ;; link value INTC#
    7.12 -  dw 0xdef8 ;; IRQ bitmap INTC# 
    7.13 -  db 0x63 ;; link value INTD#
    7.14 -  dw 0xdef8 ;; IRQ bitmap INTD#
    7.15 -  db 0 ;; physical slot (0 = embedded)
    7.16 -  db 0 ;; reserved
    7.17 -  ;; second slot entry: 1st PCI slot
    7.18 -  db 0 ;; pci bus number
    7.19 -  db 0x10 ;; pci device number (bit 7-3)
    7.20 -  db 0x61 ;; link value INTA#
    7.21 +  db 0x61 ;; link value INTA#: pointer into PCI2ISA config space
    7.22    dw 0xdef8 ;; IRQ bitmap INTA# 
    7.23    db 0x62 ;; link value INTB#
    7.24    dw 0xdef8 ;; IRQ bitmap INTB# 
    7.25 @@ -9124,11 +9111,11 @@ pci_routing_table_structure:
    7.26    dw 0xdef8 ;; IRQ bitmap INTC# 
    7.27    db 0x60 ;; link value INTD#
    7.28    dw 0xdef8 ;; IRQ bitmap INTD#
    7.29 -  db 1 ;; physical slot (0 = embedded)
    7.30 +  db 0 ;; physical slot (0 = embedded)
    7.31    db 0 ;; reserved
    7.32 -  ;; third slot entry: 2nd PCI slot
    7.33 +  ;; second slot entry: 1st PCI slot
    7.34    db 0 ;; pci bus number
    7.35 -  db 0x18 ;; pci device number (bit 7-3)
    7.36 +  db 0x10 ;; pci device number (bit 7-3)
    7.37    db 0x62 ;; link value INTA#
    7.38    dw 0xdef8 ;; IRQ bitmap INTA# 
    7.39    db 0x63 ;; link value INTB#
    7.40 @@ -9137,11 +9124,11 @@ pci_routing_table_structure:
    7.41    dw 0xdef8 ;; IRQ bitmap INTC# 
    7.42    db 0x61 ;; link value INTD#
    7.43    dw 0xdef8 ;; IRQ bitmap INTD#
    7.44 -  db 2 ;; physical slot (0 = embedded)
    7.45 +  db 1 ;; physical slot (0 = embedded)
    7.46    db 0 ;; reserved
    7.47 -  ;; 4th slot entry: 3rd PCI slot
    7.48 +  ;; third slot entry: 2nd PCI slot
    7.49    db 0 ;; pci bus number
    7.50 -  db 0x20 ;; pci device number (bit 7-3)
    7.51 +  db 0x18 ;; pci device number (bit 7-3)
    7.52    db 0x63 ;; link value INTA#
    7.53    dw 0xdef8 ;; IRQ bitmap INTA# 
    7.54    db 0x60 ;; link value INTB#
    7.55 @@ -9150,11 +9137,11 @@ pci_routing_table_structure:
    7.56    dw 0xdef8 ;; IRQ bitmap INTC# 
    7.57    db 0x62 ;; link value INTD#
    7.58    dw 0xdef8 ;; IRQ bitmap INTD#
    7.59 -  db 3 ;; physical slot (0 = embedded)
    7.60 +  db 2 ;; physical slot (0 = embedded)
    7.61    db 0 ;; reserved
    7.62 -  ;; 5th slot entry: 4rd PCI slot
    7.63 +  ;; 4th slot entry: 3rd PCI slot
    7.64    db 0 ;; pci bus number
    7.65 -  db 0x28 ;; pci device number (bit 7-3)
    7.66 +  db 0x20 ;; pci device number (bit 7-3)
    7.67    db 0x60 ;; link value INTA#
    7.68    dw 0xdef8 ;; IRQ bitmap INTA# 
    7.69    db 0x61 ;; link value INTB#
    7.70 @@ -9163,11 +9150,11 @@ pci_routing_table_structure:
    7.71    dw 0xdef8 ;; IRQ bitmap INTC# 
    7.72    db 0x63 ;; link value INTD#
    7.73    dw 0xdef8 ;; IRQ bitmap INTD#
    7.74 -  db 4 ;; physical slot (0 = embedded)
    7.75 +  db 3 ;; physical slot (0 = embedded)
    7.76    db 0 ;; reserved
    7.77 -  ;; 6th slot entry: 5rd PCI slot
    7.78 +  ;; 5th slot entry: 4rd PCI slot
    7.79    db 0 ;; pci bus number
    7.80 -  db 0x30 ;; pci device number (bit 7-3)
    7.81 +  db 0x28 ;; pci device number (bit 7-3)
    7.82    db 0x61 ;; link value INTA#
    7.83    dw 0xdef8 ;; IRQ bitmap INTA# 
    7.84    db 0x62 ;; link value INTB#
    7.85 @@ -9176,6 +9163,19 @@ pci_routing_table_structure:
    7.86    dw 0xdef8 ;; IRQ bitmap INTC# 
    7.87    db 0x60 ;; link value INTD#
    7.88    dw 0xdef8 ;; IRQ bitmap INTD#
    7.89 +  db 4 ;; physical slot (0 = embedded)
    7.90 +  db 0 ;; reserved
    7.91 +  ;; 6th slot entry: 5rd PCI slot
    7.92 +  db 0 ;; pci bus number
    7.93 +  db 0x30 ;; pci device number (bit 7-3)
    7.94 +  db 0x62 ;; link value INTA#
    7.95 +  dw 0xdef8 ;; IRQ bitmap INTA# 
    7.96 +  db 0x63 ;; link value INTB#
    7.97 +  dw 0xdef8 ;; IRQ bitmap INTB# 
    7.98 +  db 0x60 ;; link value INTC#
    7.99 +  dw 0xdef8 ;; IRQ bitmap INTC# 
   7.100 +  db 0x61 ;; link value INTD#
   7.101 +  dw 0xdef8 ;; IRQ bitmap INTD#
   7.102    db 5 ;; physical slot (0 = embedded)
   7.103    db 0 ;; reserved
   7.104  
     8.1 --- a/tools/ioemu/Makefile.target	Tue Nov 21 17:34:17 2006 +0000
     8.2 +++ b/tools/ioemu/Makefile.target	Tue Nov 21 19:22:25 2006 +0000
     8.3 @@ -298,7 +298,7 @@ endif
     8.4  ifeq ($(ARCH),ia64)
     8.5  LIBOBJS=helper2.o exec-dm.o i8259-dm.o
     8.6  else
     8.7 -LIBOBJS=helper2.o exec-dm.o i8259-dm.o rtc-dm.o
     8.8 +LIBOBJS=helper2.o exec-dm.o i8259-dm.o rtc-dm.o piix_pci-dm.o
     8.9  endif
    8.10  
    8.11  all: $(PROGS)
    8.12 @@ -360,11 +360,11 @@ ifeq ($(TARGET_BASE_ARCH), i386)
    8.13  # Hardware support
    8.14  VL_OBJS+= ide.o pckbd.o ps2.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
    8.15  ifeq ($(ARCH),ia64)
    8.16 -VL_OBJS+= fdc.o mc146818rtc.o serial.o pc.o
    8.17 +VL_OBJS+= fdc.o mc146818rtc.o serial.o pc.o piix_pci.o
    8.18  else
    8.19  VL_OBJS+= fdc.o serial.o pc.o
    8.20  endif
    8.21 -VL_OBJS+= cirrus_vga.o mixeng.o parallel.o acpi.o piix_pci.o
    8.22 +VL_OBJS+= cirrus_vga.o mixeng.o parallel.o acpi.o
    8.23  VL_OBJS+= usb-uhci.o
    8.24  VL_OBJS+= piix4acpi.o
    8.25  VL_OBJS+= xenstore.o
     9.1 --- a/tools/ioemu/target-i386-dm/i8259-dm.c	Tue Nov 21 17:34:17 2006 +0000
     9.2 +++ b/tools/ioemu/target-i386-dm/i8259-dm.c	Tue Nov 21 19:22:25 2006 +0000
     9.3 @@ -33,7 +33,7 @@ struct PicState2 {
     9.4  
     9.5  void pic_set_irq_new(void *opaque, int irq, int level)
     9.6  {
     9.7 -    xc_hvm_set_irq_level(xc_handle, domid, irq, level);
     9.8 +    xc_hvm_set_isa_irq_level(xc_handle, domid, irq, level);
     9.9  }
    9.10  
    9.11  /* obsolete function */
    10.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    10.2 +++ b/tools/ioemu/target-i386-dm/piix_pci-dm.c	Tue Nov 21 19:22:25 2006 +0000
    10.3 @@ -0,0 +1,397 @@
    10.4 +/*
    10.5 + * QEMU i440FX/PIIX3 PCI Bridge Emulation
    10.6 + *
    10.7 + * Copyright (c) 2006 Fabrice Bellard
    10.8 + * 
    10.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   10.10 + * of this software and associated documentation files (the "Software"), to deal
   10.11 + * in the Software without restriction, including without limitation the rights
   10.12 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   10.13 + * copies of the Software, and to permit persons to whom the Software is
   10.14 + * furnished to do so, subject to the following conditions:
   10.15 + *
   10.16 + * The above copyright notice and this permission notice shall be included in
   10.17 + * all copies or substantial portions of the Software.
   10.18 + *
   10.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   10.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   10.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
   10.22 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   10.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
   10.24 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
   10.25 + * THE SOFTWARE.
   10.26 + */
   10.27 +
   10.28 +#include "vl.h"
   10.29 +typedef uint32_t pci_addr_t;
   10.30 +#include "hw/pci_host.h"
   10.31 +
   10.32 +typedef PCIHostState I440FXState;
   10.33 +
   10.34 +static void i440fx_addr_writel(void* opaque, uint32_t addr, uint32_t val)
   10.35 +{
   10.36 +    I440FXState *s = opaque;
   10.37 +    s->config_reg = val;
   10.38 +}
   10.39 +
   10.40 +static uint32_t i440fx_addr_readl(void* opaque, uint32_t addr)
   10.41 +{
   10.42 +    I440FXState *s = opaque;
   10.43 +    return s->config_reg;
   10.44 +}
   10.45 +
   10.46 +static void i440fx_set_irq(PCIDevice *pci_dev, void *pic, int intx, int level)
   10.47 +{
   10.48 +    xc_hvm_set_pci_intx_level(xc_handle, domid, 0, 0, pci_dev->devfn >> 3,
   10.49 +                              intx, level);
   10.50 +}
   10.51 +
   10.52 +PCIBus *i440fx_init(void)
   10.53 +{
   10.54 +    PCIBus *b;
   10.55 +    PCIDevice *d;
   10.56 +    I440FXState *s;
   10.57 +
   10.58 +    s = qemu_mallocz(sizeof(I440FXState));
   10.59 +    b = pci_register_bus(i440fx_set_irq, NULL, 0);
   10.60 +    s->bus = b;
   10.61 +
   10.62 +    register_ioport_write(0xcf8, 4, 4, i440fx_addr_writel, s);
   10.63 +    register_ioport_read(0xcf8, 4, 4, i440fx_addr_readl, s);
   10.64 +
   10.65 +    register_ioport_write(0xcfc, 4, 1, pci_host_data_writeb, s);
   10.66 +    register_ioport_write(0xcfc, 4, 2, pci_host_data_writew, s);
   10.67 +    register_ioport_write(0xcfc, 4, 4, pci_host_data_writel, s);
   10.68 +    register_ioport_read(0xcfc, 4, 1, pci_host_data_readb, s);
   10.69 +    register_ioport_read(0xcfc, 4, 2, pci_host_data_readw, s);
   10.70 +    register_ioport_read(0xcfc, 4, 4, pci_host_data_readl, s);
   10.71 +
   10.72 +    d = pci_register_device(b, "i440FX", sizeof(PCIDevice), 0, 
   10.73 +                            NULL, NULL);
   10.74 +
   10.75 +    d->config[0x00] = 0x86; // vendor_id
   10.76 +    d->config[0x01] = 0x80;
   10.77 +    d->config[0x02] = 0x37; // device_id
   10.78 +    d->config[0x03] = 0x12;
   10.79 +    d->config[0x08] = 0x02; // revision
   10.80 +    d->config[0x0a] = 0x00; // class_sub = host2pci
   10.81 +    d->config[0x0b] = 0x06; // class_base = PCI_bridge
   10.82 +    d->config[0x0e] = 0x00; // header_type
   10.83 +    return b;
   10.84 +}
   10.85 +
   10.86 +/* PIIX3 PCI to ISA bridge */
   10.87 +
   10.88 +static PCIDevice *piix3_dev;
   10.89 +
   10.90 +static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num)
   10.91 +{
   10.92 +    /* This is the barber's pole mapping used by Xen. */
   10.93 +    return (irq_num + (pci_dev->devfn >> 3)) & 3;
   10.94 +}
   10.95 +
   10.96 +static void piix3_write_config(PCIDevice *d, 
   10.97 +                               uint32_t address, uint32_t val, int len)
   10.98 +{
   10.99 +    int i;
  10.100 +
  10.101 +    /* Scan for updates to PCI link routes (0x60-0x63). */
  10.102 +    for (i = 0; i < len; i++) {
  10.103 +        uint8_t v = (val >> (8*i)) & 0xff;
  10.104 +        if (v & 0x80)
  10.105 +            v = 0;
  10.106 +        v &= 0xf;
  10.107 +        if (((address+i) >= 0x60) && ((address+i) <= 0x63))
  10.108 +            xc_hvm_set_pci_link_route(xc_handle, domid, address + i - 0x60, v);
  10.109 +    }
  10.110 +
  10.111 +    /* Hand off to default logic. */
  10.112 +    pci_default_write_config(d, address, val, len);
  10.113 +}
  10.114 +
  10.115 +static void piix3_reset(PCIDevice *d)
  10.116 +{
  10.117 +    uint8_t *pci_conf = d->config;
  10.118 +
  10.119 +    pci_conf[0x04] = 0x07; // master, memory and I/O
  10.120 +    pci_conf[0x05] = 0x00;
  10.121 +    pci_conf[0x06] = 0x00;
  10.122 +    pci_conf[0x07] = 0x02; // PCI_status_devsel_medium
  10.123 +    pci_conf[0x4c] = 0x4d;
  10.124 +    pci_conf[0x4e] = 0x03;
  10.125 +    pci_conf[0x4f] = 0x00;
  10.126 +    pci_conf[0x60] = 0x80;
  10.127 +    pci_conf[0x61] = 0x80;
  10.128 +    pci_conf[0x62] = 0x80;
  10.129 +    pci_conf[0x63] = 0x80;
  10.130 +    pci_conf[0x69] = 0x02;
  10.131 +    pci_conf[0x70] = 0x80;
  10.132 +    pci_conf[0x76] = 0x0c;
  10.133 +    pci_conf[0x77] = 0x0c;
  10.134 +    pci_conf[0x78] = 0x02;
  10.135 +    pci_conf[0x79] = 0x00;
  10.136 +    pci_conf[0x80] = 0x00;
  10.137 +    pci_conf[0x82] = 0x00;
  10.138 +    pci_conf[0xa0] = 0x08;
  10.139 +    pci_conf[0xa0] = 0x08;
  10.140 +    pci_conf[0xa2] = 0x00;
  10.141 +    pci_conf[0xa3] = 0x00;
  10.142 +    pci_conf[0xa4] = 0x00;
  10.143 +    pci_conf[0xa5] = 0x00;
  10.144 +    pci_conf[0xa6] = 0x00;
  10.145 +    pci_conf[0xa7] = 0x00;
  10.146 +    pci_conf[0xa8] = 0x0f;
  10.147 +    pci_conf[0xaa] = 0x00;
  10.148 +    pci_conf[0xab] = 0x00;
  10.149 +    pci_conf[0xac] = 0x00;
  10.150 +    pci_conf[0xae] = 0x00;
  10.151 +}
  10.152 +
  10.153 +int piix3_init(PCIBus *bus)
  10.154 +{
  10.155 +    PCIDevice *d;
  10.156 +    uint8_t *pci_conf;
  10.157 +
  10.158 +    d = pci_register_device(bus, "PIIX3", sizeof(PCIDevice),
  10.159 +                                    -1, NULL, piix3_write_config);
  10.160 +    register_savevm("PIIX3", 0, 1, generic_pci_save, generic_pci_load, d);
  10.161 +
  10.162 +    piix3_dev = d;
  10.163 +    pci_conf = d->config;
  10.164 +
  10.165 +    pci_conf[0x00] = 0x86; // Intel
  10.166 +    pci_conf[0x01] = 0x80;
  10.167 +    pci_conf[0x02] = 0x00; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
  10.168 +    pci_conf[0x03] = 0x70;
  10.169 +    pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA
  10.170 +    pci_conf[0x0b] = 0x06; // class_base = PCI_bridge
  10.171 +    pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
  10.172 +
  10.173 +    piix3_reset(d);
  10.174 +    return d->devfn;
  10.175 +}
  10.176 +
  10.177 +/***********************************************************/
  10.178 +/* XXX: the following should be moved to the PC BIOS */
  10.179 +
  10.180 +static __attribute__((unused)) uint32_t isa_inb(uint32_t addr)
  10.181 +{
  10.182 +    return cpu_inb(NULL, addr);
  10.183 +}
  10.184 +
  10.185 +static void isa_outb(uint32_t val, uint32_t addr)
  10.186 +{
  10.187 +    cpu_outb(NULL, addr, val);
  10.188 +}
  10.189 +
  10.190 +static __attribute__((unused)) uint32_t isa_inw(uint32_t addr)
  10.191 +{
  10.192 +    return cpu_inw(NULL, addr);
  10.193 +}
  10.194 +
  10.195 +static __attribute__((unused)) void isa_outw(uint32_t val, uint32_t addr)
  10.196 +{
  10.197 +    cpu_outw(NULL, addr, val);
  10.198 +}
  10.199 +
  10.200 +static __attribute__((unused)) uint32_t isa_inl(uint32_t addr)
  10.201 +{
  10.202 +    return cpu_inl(NULL, addr);
  10.203 +}
  10.204 +
  10.205 +static __attribute__((unused)) void isa_outl(uint32_t val, uint32_t addr)
  10.206 +{
  10.207 +    cpu_outl(NULL, addr, val);
  10.208 +}
  10.209 +
  10.210 +static uint32_t pci_bios_io_addr;
  10.211 +static uint32_t pci_bios_mem_addr;
  10.212 +/* host irqs corresponding to PCI irqs A-D */
  10.213 +static uint8_t pci_irqs[4] = { 10, 11, 10, 11 };
  10.214 +
  10.215 +static void pci_config_writel(PCIDevice *d, uint32_t addr, uint32_t val)
  10.216 +{
  10.217 +    PCIBus *s = d->bus;
  10.218 +    addr |= (pci_bus_num(s) << 16) | (d->devfn << 8);
  10.219 +    pci_data_write(s, addr, val, 4);
  10.220 +}
  10.221 +
  10.222 +static void pci_config_writew(PCIDevice *d, uint32_t addr, uint32_t val)
  10.223 +{
  10.224 +    PCIBus *s = d->bus;
  10.225 +    addr |= (pci_bus_num(s) << 16) | (d->devfn << 8);
  10.226 +    pci_data_write(s, addr, val, 2);
  10.227 +}
  10.228 +
  10.229 +static void pci_config_writeb(PCIDevice *d, uint32_t addr, uint32_t val)
  10.230 +{
  10.231 +    PCIBus *s = d->bus;
  10.232 +    addr |= (pci_bus_num(s) << 16) | (d->devfn << 8);
  10.233 +    pci_data_write(s, addr, val, 1);
  10.234 +}
  10.235 +
  10.236 +static __attribute__((unused)) uint32_t pci_config_readl(PCIDevice *d, uint32_t addr)
  10.237 +{
  10.238 +    PCIBus *s = d->bus;
  10.239 +    addr |= (pci_bus_num(s) << 16) | (d->devfn << 8);
  10.240 +    return pci_data_read(s, addr, 4);
  10.241 +}
  10.242 +
  10.243 +static uint32_t pci_config_readw(PCIDevice *d, uint32_t addr)
  10.244 +{
  10.245 +    PCIBus *s = d->bus;
  10.246 +    addr |= (pci_bus_num(s) << 16) | (d->devfn << 8);
  10.247 +    return pci_data_read(s, addr, 2);
  10.248 +}
  10.249 +
  10.250 +static uint32_t pci_config_readb(PCIDevice *d, uint32_t addr)
  10.251 +{
  10.252 +    PCIBus *s = d->bus;
  10.253 +    addr |= (pci_bus_num(s) << 16) | (d->devfn << 8);
  10.254 +    return pci_data_read(s, addr, 1);
  10.255 +}
  10.256 +
  10.257 +static void pci_set_io_region_addr(PCIDevice *d, int region_num, uint32_t addr)
  10.258 +{
  10.259 +    PCIIORegion *r;
  10.260 +    uint16_t cmd;
  10.261 +    uint32_t ofs;
  10.262 +
  10.263 +    if ( region_num == PCI_ROM_SLOT ) {
  10.264 +        ofs = 0x30;
  10.265 +    }else{
  10.266 +        ofs = 0x10 + region_num * 4;
  10.267 +    }
  10.268 +
  10.269 +    pci_config_writel(d, ofs, addr);
  10.270 +    r = &d->io_regions[region_num];
  10.271 +
  10.272 +    /* enable memory mappings */
  10.273 +    cmd = pci_config_readw(d, PCI_COMMAND);
  10.274 +    if ( region_num == PCI_ROM_SLOT )
  10.275 +        cmd |= 2;
  10.276 +    else if (r->type & PCI_ADDRESS_SPACE_IO)
  10.277 +        cmd |= 1;
  10.278 +    else
  10.279 +        cmd |= 2;
  10.280 +    pci_config_writew(d, PCI_COMMAND, cmd);
  10.281 +}
  10.282 +
  10.283 +static void pci_bios_init_device(PCIDevice *d)
  10.284 +{
  10.285 +    int class;
  10.286 +    PCIIORegion *r;
  10.287 +    uint32_t *paddr;
  10.288 +    int i, pin, pic_irq, vendor_id, device_id;
  10.289 +
  10.290 +    class = pci_config_readw(d, PCI_CLASS_DEVICE);
  10.291 +    vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
  10.292 +    device_id = pci_config_readw(d, PCI_DEVICE_ID);
  10.293 +    switch(class) {
  10.294 +    case 0x0101:
  10.295 +        if (vendor_id == 0x8086 && device_id == 0x7010) {
  10.296 +            /* PIIX3 IDE */
  10.297 +            pci_config_writew(d, 0x40, 0x8000); // enable IDE0
  10.298 +            pci_config_writew(d, 0x42, 0x8000); // enable IDE1
  10.299 +            goto default_map;
  10.300 +        } else {
  10.301 +            /* IDE: we map it as in ISA mode */
  10.302 +            pci_set_io_region_addr(d, 0, 0x1f0);
  10.303 +            pci_set_io_region_addr(d, 1, 0x3f4);
  10.304 +            pci_set_io_region_addr(d, 2, 0x170);
  10.305 +            pci_set_io_region_addr(d, 3, 0x374);
  10.306 +        }
  10.307 +        break;
  10.308 +    case 0x0680:
  10.309 +        if (vendor_id == 0x8086 && device_id == 0x7113) {
  10.310 +            /*
  10.311 +             * PIIX4 ACPI PM.
  10.312 +             * Special device with special PCI config space. No ordinary BARs.
  10.313 +             */
  10.314 +            pci_config_writew(d, 0x20, 0x0000); // No smb bus IO enable
  10.315 +            pci_config_writew(d, 0x22, 0x0000);
  10.316 +            pci_config_writew(d, 0x3c, 0x0009); // Hardcoded IRQ9
  10.317 +            pci_config_writew(d, 0x3d, 0x0001);
  10.318 +        }
  10.319 +        break;
  10.320 +    case 0x0300:
  10.321 +        if (vendor_id != 0x1234)
  10.322 +            goto default_map;
  10.323 +        /* VGA: map frame buffer to default Bochs VBE address */
  10.324 +        pci_set_io_region_addr(d, 0, 0xE0000000);
  10.325 +        break;
  10.326 +    case 0x0800:
  10.327 +        /* PIC */
  10.328 +        vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
  10.329 +        device_id = pci_config_readw(d, PCI_DEVICE_ID);
  10.330 +        if (vendor_id == 0x1014) {
  10.331 +            /* IBM */
  10.332 +            if (device_id == 0x0046 || device_id == 0xFFFF) {
  10.333 +                /* MPIC & MPIC2 */
  10.334 +                pci_set_io_region_addr(d, 0, 0x80800000 + 0x00040000);
  10.335 +            }
  10.336 +        }
  10.337 +        break;
  10.338 +    case 0xff00:
  10.339 +        if (vendor_id == 0x0106b &&
  10.340 +            (device_id == 0x0017 || device_id == 0x0022)) {
  10.341 +            /* macio bridge */
  10.342 +            pci_set_io_region_addr(d, 0, 0x80800000);
  10.343 +        }
  10.344 +        break;
  10.345 +    default:
  10.346 +    default_map:
  10.347 +        /* default memory mappings */
  10.348 +        for(i = 0; i < PCI_NUM_REGIONS; i++) {
  10.349 +            r = &d->io_regions[i];
  10.350 +            if (r->size) {
  10.351 +                if (r->type & PCI_ADDRESS_SPACE_IO)
  10.352 +                    paddr = &pci_bios_io_addr;
  10.353 +                else
  10.354 +                    paddr = &pci_bios_mem_addr;
  10.355 +                *paddr = (*paddr + r->size - 1) & ~(r->size - 1);
  10.356 +                pci_set_io_region_addr(d, i, *paddr);
  10.357 +                *paddr += r->size;
  10.358 +            }
  10.359 +        }
  10.360 +        break;
  10.361 +    }
  10.362 +
  10.363 +    /* map the interrupt */
  10.364 +    pin = pci_config_readb(d, PCI_INTERRUPT_PIN);
  10.365 +    if (pin != 0) {
  10.366 +        pin = pci_slot_get_pirq(d, pin - 1);
  10.367 +        pic_irq = pci_irqs[pin];
  10.368 +        pci_config_writeb(d, PCI_INTERRUPT_LINE, pic_irq);
  10.369 +    }
  10.370 +}
  10.371 +
  10.372 +/*
  10.373 + * This function initializes the PCI devices as a normal PCI BIOS
  10.374 + * would do. It is provided just in case the BIOS has no support for
  10.375 + * PCI.
  10.376 + */
  10.377 +void pci_bios_init(void)
  10.378 +{
  10.379 +    int i, irq;
  10.380 +    uint8_t elcr[2];
  10.381 +
  10.382 +    pci_bios_io_addr = 0xc000;
  10.383 +    pci_bios_mem_addr = HVM_BELOW_4G_MMIO_START;
  10.384 +
  10.385 +    /* activate IRQ mappings */
  10.386 +    elcr[0] = 0x00;
  10.387 +    elcr[1] = 0x00;
  10.388 +    for(i = 0; i < 4; i++) {
  10.389 +        irq = pci_irqs[i];
  10.390 +        /* set to trigger level */
  10.391 +        elcr[irq >> 3] |= (1 << (irq & 7));
  10.392 +        /* activate irq remapping in PIIX */
  10.393 +        pci_config_writeb(piix3_dev, 0x60 + i, irq);
  10.394 +    }
  10.395 +    isa_outb(elcr[0], 0x4d0);
  10.396 +    isa_outb(elcr[1], 0x4d1);
  10.397 +
  10.398 +    pci_for_each_device(pci_bios_init_device);
  10.399 +}
  10.400 +
    11.1 --- a/tools/libxc/xc_misc.c	Tue Nov 21 17:34:17 2006 +0000
    11.2 +++ b/tools/libxc/xc_misc.c	Tue Nov 21 19:22:25 2006 +0000
    11.3 @@ -90,19 +90,83 @@ int xc_perfc_control(int xc_handle,
    11.4      return rc;
    11.5  }
    11.6  
    11.7 -int xc_hvm_set_irq_level(int xc_handle, domid_t dom, int irq, int level)
    11.8 +int xc_hvm_set_pci_intx_level(
    11.9 +    int xc_handle, domid_t dom,
   11.10 +    uint8_t domain, uint8_t bus, uint8_t device, uint8_t intx,
   11.11 +    unsigned int level)
   11.12  {
   11.13      DECLARE_HYPERCALL;
   11.14 -    struct xen_hvm_set_irq_level arg;
   11.15 +    struct xen_hvm_set_pci_intx_level arg;
   11.16      int rc;
   11.17  
   11.18      hypercall.op     = __HYPERVISOR_hvm_op;
   11.19 -    hypercall.arg[0] = HVMOP_set_irq_level;
   11.20 +    hypercall.arg[0] = HVMOP_set_pci_intx_level;
   11.21      hypercall.arg[1] = (unsigned long)&arg;
   11.22  
   11.23 -    arg.domid = dom;
   11.24 -    arg.irq   = irq;
   11.25 -    arg.level = level;
   11.26 +    arg.domid  = dom;
   11.27 +    arg.domain = domain;
   11.28 +    arg.bus    = bus;
   11.29 +    arg.device = device;
   11.30 +    arg.intx   = intx;
   11.31 +    arg.level  = level;
   11.32 +
   11.33 +    if ( mlock(&arg, sizeof(arg)) != 0 )
   11.34 +    {
   11.35 +        PERROR("Could not lock memory");
   11.36 +        return -1;
   11.37 +    }
   11.38 +
   11.39 +    rc = do_xen_hypercall(xc_handle, &hypercall);
   11.40 +
   11.41 +    safe_munlock(&arg, sizeof(arg));
   11.42 +
   11.43 +    return rc;
   11.44 +}
   11.45 +
   11.46 +int xc_hvm_set_isa_irq_level(
   11.47 +    int xc_handle, domid_t dom,
   11.48 +    uint8_t isa_irq,
   11.49 +    unsigned int level)
   11.50 +{
   11.51 +    DECLARE_HYPERCALL;
   11.52 +    struct xen_hvm_set_isa_irq_level arg;
   11.53 +    int rc;
   11.54 +
   11.55 +    hypercall.op     = __HYPERVISOR_hvm_op;
   11.56 +    hypercall.arg[0] = HVMOP_set_isa_irq_level;
   11.57 +    hypercall.arg[1] = (unsigned long)&arg;
   11.58 +
   11.59 +    arg.domid   = dom;
   11.60 +    arg.isa_irq = isa_irq;
   11.61 +    arg.level   = level;
   11.62 +
   11.63 +    if ( mlock(&arg, sizeof(arg)) != 0 )
   11.64 +    {
   11.65 +        PERROR("Could not lock memory");
   11.66 +        return -1;
   11.67 +    }
   11.68 +
   11.69 +    rc = do_xen_hypercall(xc_handle, &hypercall);
   11.70 +
   11.71 +    safe_munlock(&arg, sizeof(arg));
   11.72 +
   11.73 +    return rc;
   11.74 +}
   11.75 +
   11.76 +int xc_hvm_set_pci_link_route(
   11.77 +    int xc_handle, domid_t dom, uint8_t link, uint8_t isa_irq)
   11.78 +{
   11.79 +    DECLARE_HYPERCALL;
   11.80 +    struct xen_hvm_set_pci_link_route arg;
   11.81 +    int rc;
   11.82 +
   11.83 +    hypercall.op     = __HYPERVISOR_hvm_op;
   11.84 +    hypercall.arg[0] = HVMOP_set_pci_link_route;
   11.85 +    hypercall.arg[1] = (unsigned long)&arg;
   11.86 +
   11.87 +    arg.domid   = dom;
   11.88 +    arg.link    = link;
   11.89 +    arg.isa_irq = isa_irq;
   11.90  
   11.91      if ( mlock(&arg, sizeof(arg)) != 0 )
   11.92      {
    12.1 --- a/tools/libxc/xenctrl.h	Tue Nov 21 17:34:17 2006 +0000
    12.2 +++ b/tools/libxc/xenctrl.h	Tue Nov 21 19:22:25 2006 +0000
    12.3 @@ -666,6 +666,16 @@ evtchn_port_t xc_evtchn_pending(int xce_
    12.4   */
    12.5  int xc_evtchn_unmask(int xce_handle, evtchn_port_t port);
    12.6  
    12.7 -int xc_hvm_set_irq_level(int xce_handle, domid_t dom, int irq, int level);
    12.8 +int xc_hvm_set_pci_intx_level(
    12.9 +    int xce_handle, domid_t dom,
   12.10 +    uint8_t domain, uint8_t bus, uint8_t device, uint8_t intx,
   12.11 +    unsigned int level);
   12.12 +int xc_hvm_set_isa_irq_level(
   12.13 +    int xce_handle, domid_t dom,
   12.14 +    uint8_t isa_irq,
   12.15 +    unsigned int level);
   12.16 +
   12.17 +int xc_hvm_set_pci_link_route(
   12.18 +    int xce_handle, domid_t dom, uint8_t link, uint8_t isa_irq);
   12.19  
   12.20  #endif
    13.1 --- a/xen/arch/x86/hvm/Makefile	Tue Nov 21 17:34:17 2006 +0000
    13.2 +++ b/xen/arch/x86/hvm/Makefile	Tue Nov 21 19:22:25 2006 +0000
    13.3 @@ -4,11 +4,12 @@ subdir-y += vmx
    13.4  obj-y += hvm.o
    13.5  obj-y += i8254.o
    13.6  obj-y += i8259.o
    13.7 -obj-y += rtc.o
    13.8 -obj-y += pmtimer.o
    13.9  obj-y += instrlen.o
   13.10  obj-y += intercept.o
   13.11  obj-y += io.o
   13.12 +obj-y += irq.o
   13.13  obj-y += platform.o
   13.14 +obj-y += pmtimer.o
   13.15 +obj-y += rtc.o
   13.16  obj-y += vioapic.o
   13.17  obj-y += vlapic.o
    14.1 --- a/xen/arch/x86/hvm/hvm.c	Tue Nov 21 17:34:17 2006 +0000
    14.2 +++ b/xen/arch/x86/hvm/hvm.c	Tue Nov 21 19:22:25 2006 +0000
    14.3 @@ -157,7 +157,6 @@ void hvm_do_resume(struct vcpu *v)
    14.4  
    14.5  int hvm_domain_initialise(struct domain *d)
    14.6  {
    14.7 -    struct hvm_domain *platform = &d->arch.hvm_domain;
    14.8      int rc;
    14.9  
   14.10      if ( !hvm_enabled )
   14.11 @@ -168,14 +167,13 @@ int hvm_domain_initialise(struct domain 
   14.12      }
   14.13  
   14.14      spin_lock_init(&d->arch.hvm_domain.pbuf_lock);
   14.15 -    spin_lock_init(&d->arch.hvm_domain.round_robin_lock);
   14.16      spin_lock_init(&d->arch.hvm_domain.buffered_io_lock);
   14.17  
   14.18      rc = shadow_enable(d, SHM2_refcounts|SHM2_translate|SHM2_external);
   14.19      if ( rc != 0 )
   14.20          return rc;
   14.21  
   14.22 -    pic_init(&platform->vpic, pic_irq_request, &platform->interrupt_request);
   14.23 +    pic_init(domain_vpic(d));
   14.24      register_pic_io_hook(d);
   14.25  
   14.26      vioapic_init(d);
   14.27 @@ -244,12 +242,6 @@ void hvm_vcpu_destroy(struct vcpu *v)
   14.28      /*free_xen_event_channel(v, v->arch.hvm_vcpu.xen_port);*/
   14.29  }
   14.30  
   14.31 -void pic_irq_request(void *data, int level)
   14.32 -{
   14.33 -    int *interrupt_request = data;
   14.34 -    *interrupt_request = level;
   14.35 -}
   14.36 -
   14.37  int cpu_get_interrupt(struct vcpu *v, int *type)
   14.38  {
   14.39      int intno;
   14.40 @@ -259,9 +251,9 @@ int cpu_get_interrupt(struct vcpu *v, in
   14.41      if ( (intno = cpu_get_apic_interrupt(v, type)) != -1 ) {
   14.42          /* set irq request if a PIC irq is still pending */
   14.43          /* XXX: improve that */
   14.44 -        spin_lock_irqsave(&vpic->lock, flags);
   14.45 +        spin_lock_irqsave(vpic_lock(vpic), flags);
   14.46          pic_update_irq(vpic);
   14.47 -        spin_unlock_irqrestore(&vpic->lock, flags);
   14.48 +        spin_unlock_irqrestore(vpic_lock(vpic), flags);
   14.49          return intno;
   14.50      }
   14.51      /* read the irq from the PIC */
   14.52 @@ -615,6 +607,124 @@ int hvm_bringup_ap(int vcpuid, int tramp
   14.53      return rc;
   14.54  }
   14.55  
   14.56 +static int hvmop_set_pci_intx_level(
   14.57 +    XEN_GUEST_HANDLE(xen_hvm_set_pci_intx_level_t) uop)
   14.58 +{
   14.59 +    struct xen_hvm_set_pci_intx_level op;
   14.60 +    struct domain *d;
   14.61 +    int rc;
   14.62 +
   14.63 +    if ( copy_from_guest(&op, uop, 1) )
   14.64 +        return -EFAULT;
   14.65 +
   14.66 +    if ( !IS_PRIV(current->domain) )
   14.67 +        return -EPERM;
   14.68 +
   14.69 +    if ( (op.domain > 0) || (op.bus > 0) || (op.device > 31) || (op.intx > 3) )
   14.70 +        return -EINVAL;
   14.71 +
   14.72 +    d = find_domain_by_id(op.domid);
   14.73 +    if ( d == NULL )
   14.74 +        return -ESRCH;
   14.75 +
   14.76 +    rc = -EINVAL;
   14.77 +    if ( !is_hvm_domain(d) )
   14.78 +        goto out;
   14.79 +
   14.80 +    rc = 0;
   14.81 +    switch ( op.level )
   14.82 +    {
   14.83 +    case 0:
   14.84 +        hvm_pci_intx_deassert(d, op.device, op.intx);
   14.85 +        break;
   14.86 +    case 1:
   14.87 +        hvm_pci_intx_assert(d, op.device, op.intx);
   14.88 +        break;
   14.89 +    default:
   14.90 +        rc = -EINVAL;
   14.91 +        break;
   14.92 +    }
   14.93 +
   14.94 + out:
   14.95 +    put_domain(d);
   14.96 +    return rc;
   14.97 +}
   14.98 +
   14.99 +static int hvmop_set_isa_irq_level(
  14.100 +    XEN_GUEST_HANDLE(xen_hvm_set_isa_irq_level_t) uop)
  14.101 +{
  14.102 +    struct xen_hvm_set_isa_irq_level op;
  14.103 +    struct domain *d;
  14.104 +    int rc;
  14.105 +
  14.106 +    if ( copy_from_guest(&op, uop, 1) )
  14.107 +        return -EFAULT;
  14.108 +
  14.109 +    if ( !IS_PRIV(current->domain) )
  14.110 +        return -EPERM;
  14.111 +
  14.112 +    if ( op.isa_irq > 15 )
  14.113 +        return -EINVAL;
  14.114 +
  14.115 +    d = find_domain_by_id(op.domid);
  14.116 +    if ( d == NULL )
  14.117 +        return -ESRCH;
  14.118 +
  14.119 +    rc = -EINVAL;
  14.120 +    if ( !is_hvm_domain(d) )
  14.121 +        goto out;
  14.122 +
  14.123 +    rc = 0;
  14.124 +    switch ( op.level )
  14.125 +    {
  14.126 +    case 0:
  14.127 +        hvm_isa_irq_deassert(d, op.isa_irq);
  14.128 +        break;
  14.129 +    case 1:
  14.130 +        hvm_isa_irq_assert(d, op.isa_irq);
  14.131 +        break;
  14.132 +    default:
  14.133 +        rc = -EINVAL;
  14.134 +        break;
  14.135 +    }
  14.136 +
  14.137 + out:
  14.138 +    put_domain(d);
  14.139 +    return rc;
  14.140 +}
  14.141 +
  14.142 +static int hvmop_set_pci_link_route(
  14.143 +    XEN_GUEST_HANDLE(xen_hvm_set_pci_link_route_t) uop)
  14.144 +{
  14.145 +    struct xen_hvm_set_pci_link_route op;
  14.146 +    struct domain *d;
  14.147 +    int rc;
  14.148 +
  14.149 +    if ( copy_from_guest(&op, uop, 1) )
  14.150 +        return -EFAULT;
  14.151 +
  14.152 +    if ( !IS_PRIV(current->domain) )
  14.153 +        return -EPERM;
  14.154 +
  14.155 +    if ( (op.link > 3) || (op.isa_irq > 15) )
  14.156 +        return -EINVAL;
  14.157 +
  14.158 +    d = find_domain_by_id(op.domid);
  14.159 +    if ( d == NULL )
  14.160 +        return -ESRCH;
  14.161 +
  14.162 +    rc = -EINVAL;
  14.163 +    if ( !is_hvm_domain(d) )
  14.164 +        goto out;
  14.165 +
  14.166 +    rc = 0;
  14.167 +    hvm_set_pci_link_route(d, op.link, op.isa_irq);
  14.168 +
  14.169 + out:
  14.170 +    put_domain(d);
  14.171 +    return rc;
  14.172 +}
  14.173 +
  14.174  long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE(void) arg)
  14.175  
  14.176  {
  14.177 @@ -687,6 +797,9 @@ long do_hvm_op(unsigned long op, XEN_GUE
  14.178                      goto param_fail;
  14.179                  d->arch.hvm_domain.buffered_io_va = (unsigned long)p;
  14.180                  break;
  14.181 +            case HVM_PARAM_CALLBACK_IRQ:
  14.182 +                hvm_set_callback_gsi(d, a.value);
  14.183 +                break;
  14.184              }
  14.185              d->arch.hvm_domain.params[a.index] = a.value;
  14.186              rc = 0;
  14.187 @@ -702,31 +815,20 @@ long do_hvm_op(unsigned long op, XEN_GUE
  14.188          break;
  14.189      }
  14.190  
  14.191 -    case HVMOP_set_irq_level:
  14.192 -    {
  14.193 -        struct xen_hvm_set_irq_level op;
  14.194 -        struct domain *d;
  14.195 -
  14.196 -        if ( copy_from_guest(&op, arg, 1) )
  14.197 -            return -EFAULT;
  14.198 -
  14.199 -        if ( !IS_PRIV(current->domain) )
  14.200 -            return -EPERM;
  14.201 +    case HVMOP_set_pci_intx_level:
  14.202 +        rc = hvmop_set_pci_intx_level(
  14.203 +            guest_handle_cast(arg, xen_hvm_set_pci_intx_level_t));
  14.204 +        break;
  14.205  
  14.206 -        d = find_domain_by_id(op.domid);
  14.207 -        if ( d == NULL )
  14.208 -            return -ESRCH;
  14.209 +    case HVMOP_set_isa_irq_level:
  14.210 +        rc = hvmop_set_isa_irq_level(
  14.211 +            guest_handle_cast(arg, xen_hvm_set_isa_irq_level_t));
  14.212 +        break;
  14.213  
  14.214 -        rc = -EINVAL;
  14.215 -        if ( is_hvm_domain(d) )
  14.216 -        {
  14.217 -            pic_set_irq(domain_vpic(d), op.irq, op.level);
  14.218 -            rc = 0;
  14.219 -        }
  14.220 -
  14.221 -        put_domain(d);
  14.222 +    case HVMOP_set_pci_link_route:
  14.223 +        rc = hvmop_set_pci_link_route(
  14.224 +            guest_handle_cast(arg, xen_hvm_set_pci_link_route_t));
  14.225          break;
  14.226 -    }
  14.227  
  14.228      default:
  14.229      {
    15.1 --- a/xen/arch/x86/hvm/i8259.c	Tue Nov 21 17:34:17 2006 +0000
    15.2 +++ b/xen/arch/x86/hvm/i8259.c	Tue Nov 21 19:22:25 2006 +0000
    15.3 @@ -42,7 +42,7 @@ static inline void pic_set_irq1(PicState
    15.4  {
    15.5      int mask;
    15.6  
    15.7 -    ASSERT(spin_is_locked(&s->pics_state->lock));
    15.8 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
    15.9  
   15.10      mask = 1 << irq;
   15.11      if (s->elcr & mask) {
   15.12 @@ -72,7 +72,7 @@ static inline int get_priority(PicState 
   15.13  {
   15.14      int priority;
   15.15  
   15.16 -    ASSERT(spin_is_locked(&s->pics_state->lock));
   15.17 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
   15.18  
   15.19      if (mask == 0)
   15.20          return 8;
   15.21 @@ -87,9 +87,9 @@ static int pic_get_irq(PicState *s)
   15.22  {
   15.23      int mask, cur_priority, priority;
   15.24  
   15.25 -    ASSERT(spin_is_locked(&s->pics_state->lock));
   15.26 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
   15.27  
   15.28 -    mask = (s->irr|s->irr_xen) & ~s->imr;
   15.29 +    mask = s->irr & ~s->imr;
   15.30      priority = get_priority(s, mask);
   15.31      if (priority == 8)
   15.32          return -1;
   15.33 @@ -115,7 +115,7 @@ void pic_update_irq(struct vpic *vpic)
   15.34  {
   15.35      int irq2, irq;
   15.36  
   15.37 -    ASSERT(spin_is_locked(&vpic->lock));
   15.38 +    ASSERT(spin_is_locked(vpic_lock(vpic)));
   15.39  
   15.40      /* first look at slave pic */
   15.41      irq2 = pic_get_irq(&vpic->pics[1]);
   15.42 @@ -126,56 +126,21 @@ void pic_update_irq(struct vpic *vpic)
   15.43      }
   15.44      /* look at requested irq */
   15.45      irq = pic_get_irq(&vpic->pics[0]);
   15.46 -    if (irq >= 0) {
   15.47 -        vpic->irq_request(vpic->irq_request_opaque, 1);
   15.48 -    }
   15.49 -}
   15.50 -
   15.51 -void pic_set_xen_irq(void *opaque, int irq, int level)
   15.52 -{
   15.53 -    struct vpic *vpic = opaque;
   15.54 -    unsigned long flags;
   15.55 -    PicState *ps;
   15.56 -
   15.57 -    spin_lock_irqsave(&vpic->lock, flags);
   15.58 -
   15.59 -    vioapic_set_xen_irq(current->domain, irq, level);
   15.60 -
   15.61 -    /* Set it on the 8259s */
   15.62 -    ps = &vpic->pics[irq >> 3];
   15.63 -    if (!(ps->elcr & (1 << (irq & 7))))
   15.64 -	gdprintk(XENLOG_WARNING, "edge-triggered override IRQ?\n");
   15.65 -    if (level) {
   15.66 -	ps->irr_xen |= 1 << (irq & 7);
   15.67 -    } else {
   15.68 -	ps->irr_xen &= ~(1 << (irq & 7));
   15.69 -    }
   15.70 -
   15.71 -    pic_update_irq(vpic);
   15.72 -    spin_unlock_irqrestore(&vpic->lock, flags);
   15.73 +    if (irq >= 0)
   15.74 +        vpic->irq_pending = 1;
   15.75  }
   15.76  
   15.77  void pic_set_irq(struct vpic *vpic, int irq, int level)
   15.78  {
   15.79 -    unsigned long flags;
   15.80 -
   15.81 -    if ( irq < 0 )
   15.82 -        return;
   15.83 -
   15.84 -    spin_lock_irqsave(&vpic->lock, flags);
   15.85 -    vioapic_set_irq(vpic_domain(vpic), irq, level);
   15.86 -    if ( irq < 16 )
   15.87 -    {
   15.88 -        pic_set_irq1(&vpic->pics[irq >> 3], irq & 7, level);
   15.89 -        pic_update_irq(vpic);
   15.90 -    }
   15.91 -    spin_unlock_irqrestore(&vpic->lock, flags);
   15.92 +    ASSERT(spin_is_locked(vpic_lock(vpic)));
   15.93 +    pic_set_irq1(&vpic->pics[irq >> 3], irq & 7, level);
   15.94 +    pic_update_irq(vpic);
   15.95  }
   15.96  
   15.97  /* acknowledge interrupt 'irq' */
   15.98  static inline void pic_intack(PicState *s, int irq)
   15.99  {
  15.100 -    ASSERT(spin_is_locked(&s->pics_state->lock));
  15.101 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
  15.102  
  15.103      if (s->auto_eoi) {
  15.104          if (s->rotate_on_auto_eoi)
  15.105 @@ -193,7 +158,7 @@ static int pic_read_irq(struct vpic *vpi
  15.106      int irq, irq2, intno;
  15.107      unsigned long flags;
  15.108  
  15.109 -    spin_lock_irqsave(&vpic->lock, flags);
  15.110 +    spin_lock_irqsave(vpic_lock(vpic), flags);
  15.111      irq = pic_get_irq(&vpic->pics[0]);
  15.112      if (irq >= 0) {
  15.113          pic_intack(&vpic->pics[0], irq);
  15.114 @@ -218,7 +183,7 @@ static int pic_read_irq(struct vpic *vpi
  15.115  	gdprintk(XENLOG_WARNING, "Spurious irq on master i8259.\n");
  15.116      }
  15.117      pic_update_irq(vpic);
  15.118 -    spin_unlock_irqrestore(&vpic->lock, flags);
  15.119 +    spin_unlock_irqrestore(vpic_lock(vpic), flags);
  15.120  
  15.121      return intno;
  15.122  }
  15.123 @@ -227,7 +192,7 @@ static void pic_reset(void *opaque)
  15.124  {
  15.125      PicState *s = opaque;
  15.126  
  15.127 -    ASSERT(spin_is_locked(&s->pics_state->lock));
  15.128 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
  15.129  
  15.130      s->last_irr = 0;
  15.131      s->irr = 0;
  15.132 @@ -251,7 +216,7 @@ static void pic_ioport_write(void *opaqu
  15.133      PicState *s = opaque;
  15.134      int priority, cmd, irq;
  15.135  
  15.136 -    ASSERT(spin_is_locked(&s->pics_state->lock));
  15.137 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
  15.138  
  15.139      addr &= 1;
  15.140      if (addr == 0) {
  15.141 @@ -259,7 +224,7 @@ static void pic_ioport_write(void *opaqu
  15.142              /* init */
  15.143              pic_reset(s);
  15.144              /* deassert a pending interrupt */
  15.145 -            s->pics_state->irq_request(s->pics_state->irq_request_opaque, 0);
  15.146 +            s->pics_state->irq_pending = 0;
  15.147              s->init_state = 1;
  15.148              s->init4 = val & 1;
  15.149              if (val & 0x02)
  15.150 @@ -342,7 +307,7 @@ static uint32_t pic_poll_read (PicState 
  15.151  {
  15.152      int ret;
  15.153  
  15.154 -    ASSERT(spin_is_locked(&s->pics_state->lock));
  15.155 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
  15.156  
  15.157      ret = pic_get_irq(s);
  15.158      if (ret >= 0) {
  15.159 @@ -351,7 +316,6 @@ static uint32_t pic_poll_read (PicState 
  15.160              s->pics_state->pics[0].irr &= ~(1 << 2);
  15.161          }
  15.162          s->irr &= ~(1 << ret);
  15.163 -        s->irr_xen &= ~(1 << ret);
  15.164          s->isr &= ~(1 << ret);
  15.165          if (addr1 >> 7 || ret != 2)
  15.166              pic_update_irq(s->pics_state);
  15.167 @@ -369,7 +333,7 @@ static uint32_t pic_ioport_read(void *op
  15.168      unsigned int addr;
  15.169      int ret;
  15.170  
  15.171 -    ASSERT(spin_is_locked(&s->pics_state->lock));
  15.172 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
  15.173  
  15.174      addr = addr1;
  15.175      addr &= 1;
  15.176 @@ -381,7 +345,7 @@ static uint32_t pic_ioport_read(void *op
  15.177              if (s->read_reg_select)
  15.178                  ret = s->isr;
  15.179              else
  15.180 -                ret = s->irr | s->irr_xen;
  15.181 +                ret = s->irr;
  15.182          } else {
  15.183              ret = s->imr;
  15.184          }
  15.185 @@ -393,7 +357,7 @@ static void elcr_ioport_write(void *opaq
  15.186  {
  15.187      PicState *s = opaque;
  15.188  
  15.189 -    ASSERT(spin_is_locked(&s->pics_state->lock));
  15.190 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
  15.191  
  15.192      s->elcr = val & s->elcr_mask;
  15.193  }
  15.194 @@ -407,7 +371,7 @@ static uint32_t elcr_ioport_read(void *o
  15.195  /* XXX: add generic master/slave system */
  15.196  static void pic_init1(int io_addr, int elcr_addr, PicState *s)
  15.197  {
  15.198 -    ASSERT(spin_is_locked(&s->pics_state->lock));
  15.199 +    ASSERT(spin_is_locked(vpic_lock(s->pics_state)));
  15.200  
  15.201      pic_reset(s);
  15.202  
  15.203 @@ -416,23 +380,20 @@ static void pic_init1(int io_addr, int e
  15.204      s->elcr = 0xff & s->elcr_mask;
  15.205  }
  15.206  
  15.207 -void pic_init(struct vpic *vpic, void (*irq_request)(void *, int),
  15.208 -              void *irq_request_opaque)
  15.209 +void pic_init(struct vpic *vpic)
  15.210  {
  15.211      unsigned long flags;
  15.212  
  15.213      memset(vpic, 0, sizeof(*vpic));
  15.214 -    spin_lock_init(&vpic->lock);
  15.215 +    spin_lock_init(vpic_lock(vpic));
  15.216      vpic->pics[0].pics_state = vpic;
  15.217      vpic->pics[1].pics_state = vpic;
  15.218      vpic->pics[0].elcr_mask = 0xf8;
  15.219      vpic->pics[1].elcr_mask = 0xde;
  15.220 -    spin_lock_irqsave(&vpic->lock, flags);
  15.221 +    spin_lock_irqsave(vpic_lock(vpic), flags);
  15.222      pic_init1(0x20, 0x4d0, &vpic->pics[0]);
  15.223      pic_init1(0xa0, 0x4d1, &vpic->pics[1]);
  15.224 -    spin_unlock_irqrestore(&vpic->lock, flags);
  15.225 -    vpic->irq_request = irq_request;
  15.226 -    vpic->irq_request_opaque = irq_request_opaque;
  15.227 +    spin_unlock_irqrestore(vpic_lock(vpic), flags);
  15.228  }
  15.229  
  15.230  static int intercept_pic_io(ioreq_t *p)
  15.231 @@ -452,16 +413,16 @@ static int intercept_pic_io(ioreq_t *p)
  15.232              (void)hvm_copy_from_guest_phys(&data, p->data, p->size);
  15.233          else
  15.234              data = p->data;
  15.235 -        spin_lock_irqsave(&pic->lock, flags);
  15.236 +        spin_lock_irqsave(vpic_lock(pic), flags);
  15.237          pic_ioport_write((void*)&pic->pics[p->addr>>7],
  15.238                  (uint32_t) p->addr, (uint32_t) (data & 0xff));
  15.239 -        spin_unlock_irqrestore(&pic->lock, flags);
  15.240 +        spin_unlock_irqrestore(vpic_lock(pic), flags);
  15.241      }
  15.242      else {
  15.243 -        spin_lock_irqsave(&pic->lock, flags);
  15.244 +        spin_lock_irqsave(vpic_lock(pic), flags);
  15.245          data = pic_ioport_read(
  15.246              (void*)&pic->pics[p->addr>>7], (uint32_t) p->addr);
  15.247 -        spin_unlock_irqrestore(&pic->lock, flags);
  15.248 +        spin_unlock_irqrestore(vpic_lock(pic), flags);
  15.249          if ( p->data_is_ptr )
  15.250              (void)hvm_copy_to_guest_phys(p->data, &data, p->size);
  15.251          else
  15.252 @@ -487,10 +448,10 @@ static int intercept_elcr_io(ioreq_t *p)
  15.253              (void)hvm_copy_from_guest_phys(&data, p->data, p->size);
  15.254          else
  15.255              data = p->data;
  15.256 -        spin_lock_irqsave(&vpic->lock, flags);
  15.257 +        spin_lock_irqsave(vpic_lock(vpic), flags);
  15.258          elcr_ioport_write((void*)&vpic->pics[p->addr&1],
  15.259                  (uint32_t) p->addr, (uint32_t)( data & 0xff));
  15.260 -        spin_unlock_irqrestore(&vpic->lock, flags);
  15.261 +        spin_unlock_irqrestore(vpic_lock(vpic), flags);
  15.262      }
  15.263      else {
  15.264          data = (u64) elcr_ioport_read(
  15.265 @@ -522,7 +483,7 @@ int cpu_get_pic_interrupt(struct vcpu *v
  15.266      if ( !vlapic_accept_pic_intr(v) )
  15.267          return -1;
  15.268  
  15.269 -    if (cmpxchg(&plat->interrupt_request, 1, 0) != 1)
  15.270 +    if ( xchg(&plat->irq.vpic.irq_pending, 0) == 0 )
  15.271          return -1;
  15.272  
  15.273      /* read the irq from the PIC */
    16.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    16.2 +++ b/xen/arch/x86/hvm/irq.c	Tue Nov 21 19:22:25 2006 +0000
    16.3 @@ -0,0 +1,227 @@
    16.4 +/******************************************************************************
    16.5 + * irq.c
    16.6 + * 
    16.7 + * Interrupt distribution and delivery logic.
    16.8 + * 
    16.9 + * Copyright (c) 2006, K A Fraser, XenSource Inc.
   16.10 + *
   16.11 + * This program is free software; you can redistribute it and/or modify it
   16.12 + * under the terms and conditions of the GNU General Public License,
   16.13 + * version 2, as published by the Free Software Foundation.
   16.14 + *
   16.15 + * This program is distributed in the hope it will be useful, but WITHOUT
   16.16 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   16.17 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   16.18 + * more details.
   16.19 + *
   16.20 + * You should have received a copy of the GNU General Public License along with
   16.21 + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
   16.22 + * Place - Suite 330, Boston, MA 02111-1307 USA.
   16.23 + */
   16.24 +
   16.25 +#include <xen/config.h>
   16.26 +#include <xen/types.h>
   16.27 +#include <xen/event.h>
   16.28 +#include <xen/sched.h>
   16.29 +#include <asm/hvm/domain.h>
   16.30 +
   16.31 +void hvm_pci_intx_assert(
   16.32 +    struct domain *d, unsigned int device, unsigned int intx)
   16.33 +{
   16.34 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
   16.35 +    unsigned int gsi, link, isa_irq;
   16.36 +
   16.37 +    ASSERT((device <= 31) && (intx <= 3));
   16.38 +
   16.39 +    spin_lock(&hvm_irq->lock);
   16.40 +
   16.41 +    if ( __test_and_set_bit(device*4 + intx, &hvm_irq->pci_intx) )
   16.42 +        goto out;
   16.43 +
   16.44 +    gsi = hvm_pci_intx_gsi(device, intx);
   16.45 +    if ( hvm_irq->gsi_assert_count[gsi]++ == 0 )
   16.46 +        vioapic_irq_positive_edge(d, gsi);
   16.47 +
   16.48 +    link    = hvm_pci_intx_link(device, intx);
   16.49 +    isa_irq = hvm_irq->pci_link_route[link];
   16.50 +    if ( (hvm_irq->pci_link_assert_count[link]++ == 0) && isa_irq &&
   16.51 +         (hvm_irq->gsi_assert_count[isa_irq]++ == 0) )
   16.52 +    {
   16.53 +        vioapic_irq_positive_edge(d, isa_irq);
   16.54 +        pic_set_irq(&hvm_irq->vpic, isa_irq, 1);
   16.55 +    }
   16.56 +
   16.57 + out:
   16.58 +    spin_unlock(&hvm_irq->lock);
   16.59 +}
   16.60 +
   16.61 +void hvm_pci_intx_deassert(
   16.62 +    struct domain *d, unsigned int device, unsigned int intx)
   16.63 +{
   16.64 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
   16.65 +    unsigned int gsi, link, isa_irq;
   16.66 +
   16.67 +    ASSERT((device <= 31) && (intx <= 3));
   16.68 +
   16.69 +    spin_lock(&hvm_irq->lock);
   16.70 +
   16.71 +    if ( !__test_and_clear_bit(device*4 + intx, &hvm_irq->pci_intx) )
   16.72 +        goto out;
   16.73 +
   16.74 +    gsi = hvm_pci_intx_gsi(device, intx);
   16.75 +    --hvm_irq->gsi_assert_count[gsi];
   16.76 +
   16.77 +    link    = hvm_pci_intx_link(device, intx);
   16.78 +    isa_irq = hvm_irq->pci_link_route[link];
   16.79 +    if ( (--hvm_irq->pci_link_assert_count[link] == 0) && isa_irq &&
   16.80 +         (--hvm_irq->gsi_assert_count[isa_irq] == 0) )
   16.81 +        pic_set_irq(&hvm_irq->vpic, isa_irq, 0);
   16.82 +
   16.83 + out:
   16.84 +    spin_unlock(&hvm_irq->lock);
   16.85 +}
   16.86 +
   16.87 +void hvm_isa_irq_assert(
   16.88 +    struct domain *d, unsigned int isa_irq)
   16.89 +{
   16.90 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
   16.91 +
   16.92 +    ASSERT(isa_irq <= 15);
   16.93 +
   16.94 +    spin_lock(&hvm_irq->lock);
   16.95 +
   16.96 +    if ( !__test_and_set_bit(isa_irq, &hvm_irq->isa_irq) &&
   16.97 +         (hvm_irq->gsi_assert_count[isa_irq]++ == 0) )
   16.98 +    {
   16.99 +        vioapic_irq_positive_edge(d, isa_irq);
  16.100 +        pic_set_irq(&hvm_irq->vpic, isa_irq, 1);
  16.101 +    }
  16.102 +
  16.103 +    spin_unlock(&hvm_irq->lock);
  16.104 +}
  16.105 +
  16.106 +void hvm_isa_irq_deassert(
  16.107 +    struct domain *d, unsigned int isa_irq)
  16.108 +{
  16.109 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
  16.110 +
  16.111 +    ASSERT(isa_irq <= 15);
  16.112 +
  16.113 +    spin_lock(&hvm_irq->lock);
  16.114 +
  16.115 +    if ( __test_and_clear_bit(isa_irq, &hvm_irq->isa_irq) &&
  16.116 +         (--hvm_irq->gsi_assert_count[isa_irq] == 0) )
  16.117 +        pic_set_irq(&hvm_irq->vpic, isa_irq, 0);
  16.118 +
  16.119 +    spin_unlock(&hvm_irq->lock);
  16.120 +}
  16.121 +
  16.122 +void hvm_set_callback_irq_level(void)
  16.123 +{
  16.124 +    struct vcpu *v = current;
  16.125 +    struct domain *d = v->domain;
  16.126 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
  16.127 +    unsigned int gsi = hvm_irq->callback_gsi;
  16.128 +
  16.129 +    /* Fast lock-free tests. */
  16.130 +    if ( (v->vcpu_id != 0) || (gsi == 0) )
  16.131 +        return;
  16.132 +
  16.133 +    spin_lock(&hvm_irq->lock);
  16.134 +
  16.135 +    gsi = hvm_irq->callback_gsi;
  16.136 +    if ( gsi == 0 )
  16.137 +        goto out;
  16.138 +
  16.139 +    if ( local_events_need_delivery() )
  16.140 +    {
  16.141 +        if ( !__test_and_set_bit(0, &hvm_irq->callback_irq_wire) &&
  16.142 +             (hvm_irq->gsi_assert_count[gsi]++ == 0) )
  16.143 +        {
  16.144 +            vioapic_irq_positive_edge(d, gsi);
  16.145 +            if ( gsi <= 15 )
  16.146 +                pic_set_irq(&hvm_irq->vpic, gsi, 1);
  16.147 +        }
  16.148 +    }
  16.149 +    else
  16.150 +    {
  16.151 +        if ( __test_and_clear_bit(0, &hvm_irq->callback_irq_wire) &&
  16.152 +             (--hvm_irq->gsi_assert_count[gsi] == 0) )
  16.153 +        {
  16.154 +            if ( gsi <= 15 )
  16.155 +                pic_set_irq(&hvm_irq->vpic, gsi, 0);
  16.156 +        }
  16.157 +    }
  16.158 +
  16.159 + out:
  16.160 +    spin_unlock(&hvm_irq->lock);
  16.161 +}
  16.162 +
  16.163 +void hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq)
  16.164 +{
  16.165 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
  16.166 +    u8 old_isa_irq;
  16.167 +
  16.168 +    ASSERT((link <= 3) && (isa_irq <= 15));
  16.169 +
  16.170 +    spin_lock(&hvm_irq->lock);
  16.171 +
  16.172 +    old_isa_irq = hvm_irq->pci_link_route[link];
  16.173 +    if ( old_isa_irq == isa_irq )
  16.174 +        goto out;
  16.175 +    hvm_irq->pci_link_route[link] = isa_irq;
  16.176 +
  16.177 +    if ( hvm_irq->pci_link_assert_count[link] == 0 )
  16.178 +        goto out;
  16.179 +
  16.180 +    if ( old_isa_irq && (--hvm_irq->gsi_assert_count[old_isa_irq] == 0) )
  16.181 +        pic_set_irq(&hvm_irq->vpic, isa_irq, 0);
  16.182 +
  16.183 +    if ( isa_irq && (hvm_irq->gsi_assert_count[isa_irq]++ == 0) )
  16.184 +    {
  16.185 +        vioapic_irq_positive_edge(d, isa_irq);
  16.186 +        pic_set_irq(&hvm_irq->vpic, isa_irq, 1);
  16.187 +    }
  16.188 +
  16.189 + out:
  16.190 +    spin_unlock(&hvm_irq->lock);
  16.191 +
  16.192 +    dprintk(XENLOG_G_INFO, "Dom%u PCI link %u changed %u -> %u\n",
  16.193 +            d->domain_id, link, old_isa_irq, isa_irq);
  16.194 +}
  16.195 +
  16.196 +void hvm_set_callback_gsi(struct domain *d, unsigned int gsi)
  16.197 +{
  16.198 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
  16.199 +    unsigned int old_gsi;
  16.200 +
  16.201 +    if ( gsi >= ARRAY_SIZE(hvm_irq->gsi_assert_count) )
  16.202 +        gsi = 0;
  16.203 +
  16.204 +    spin_lock(&hvm_irq->lock);
  16.205 +
  16.206 +    old_gsi = hvm_irq->callback_gsi;
  16.207 +    if ( old_gsi == gsi )
  16.208 +        goto out;
  16.209 +    hvm_irq->callback_gsi = gsi;
  16.210 +
  16.211 +    if ( !test_bit(0, &hvm_irq->callback_irq_wire) )
  16.212 +        goto out;
  16.213 +
  16.214 +    if ( old_gsi && (--hvm_irq->gsi_assert_count[old_gsi] == 0) )
  16.215 +        if ( old_gsi <= 15 )
  16.216 +            pic_set_irq(&hvm_irq->vpic, old_gsi, 0);
  16.217 +
  16.218 +    if ( gsi && (hvm_irq->gsi_assert_count[gsi]++ == 0) )
  16.219 +    {
  16.220 +        vioapic_irq_positive_edge(d, gsi);
  16.221 +        if ( gsi <= 15 )
  16.222 +            pic_set_irq(&hvm_irq->vpic, gsi, 1);
  16.223 +    }
  16.224 +
  16.225 + out:
  16.226 +    spin_unlock(&hvm_irq->lock);
  16.227 +
  16.228 +    dprintk(XENLOG_G_INFO, "Dom%u callback GSI changed %u -> %u\n",
  16.229 +            d->domain_id, old_gsi, gsi);
  16.230 +}
    17.1 --- a/xen/arch/x86/hvm/rtc.c	Tue Nov 21 17:34:17 2006 +0000
    17.2 +++ b/xen/arch/x86/hvm/rtc.c	Tue Nov 21 19:22:25 2006 +0000
    17.3 @@ -34,12 +34,10 @@
    17.4  void rtc_pie_callback(void *opaque)
    17.5  {
    17.6      RTCState *s = opaque;
    17.7 -    struct hvm_domain *plat = &s->vcpu->domain->arch.hvm_domain;
    17.8 -    struct vpic       *pic  = &plat->vpic;
    17.9      /* Record that we have fired */
   17.10      s->cmos_data[RTC_REG_C] |= (RTC_IRQF|RTC_PF); /* 0xc0 */
   17.11      /* Fire */
   17.12 -    pic_set_irq(pic, s->irq, 1);
   17.13 +    hvm_isa_irq_assert(s->vcpu->domain, s->irq);
   17.14      /* Remember to fire again */
   17.15      s->next_pie = NOW() + s->period;
   17.16      set_timer(&s->pie_timer, s->next_pie);
   17.17 @@ -53,8 +51,9 @@ static void rtc_timer_update(RTCState *s
   17.18      int period;
   17.19  
   17.20      period_code = s->cmos_data[RTC_REG_A] & RTC_RATE_SELECT;
   17.21 -    if (period_code != 0 && (s->cmos_data[RTC_REG_B] & RTC_PIE)) {
   17.22 -        if (period_code <= 2)
   17.23 +    if ( (period_code != 0) && (s->cmos_data[RTC_REG_B] & RTC_PIE) )
   17.24 +    {
   17.25 +        if ( period_code <= 2 )
   17.26              period_code += 7;
   17.27          
   17.28          period = 1 << (period_code - 1); /* period in 32 Khz cycles */
   17.29 @@ -65,7 +64,9 @@ static void rtc_timer_update(RTCState *s
   17.30  #endif
   17.31          s->next_pie = NOW() + s->period;
   17.32          set_timer(&s->pie_timer, s->next_pie);
   17.33 -    } else {
   17.34 +    }
   17.35 +    else
   17.36 +    {
   17.37          stop_timer(&s->pie_timer);
   17.38      }
   17.39  }
   17.40 @@ -76,80 +77,84 @@ static int rtc_ioport_write(void *opaque
   17.41  {
   17.42      RTCState *s = opaque;
   17.43  
   17.44 -    if ((addr & 1) == 0) {
   17.45 +    if ( (addr & 1) == 0 )
   17.46 +    {
   17.47          s->cmos_index = data & 0x7f;
   17.48 -        if (s->cmos_index < RTC_SIZE)
   17.49 -            return 1;
   17.50 -    } else if (s->cmos_index < RTC_SIZE) {
   17.51 +        return (s->cmos_index < RTC_SIZE);
   17.52 +    }
   17.53 +
   17.54 +    if (s->cmos_index >= RTC_SIZE)
   17.55 +        return 0;
   17.56 +
   17.57  #ifdef DEBUG_RTC
   17.58 -        printk("HVM_RTC: write index=0x%02x val=0x%02x\n",
   17.59 -               s->cmos_index, data);
   17.60 -#endif        
   17.61 -        switch(s->cmos_index) {
   17.62 -        case RTC_SECONDS_ALARM:
   17.63 -        case RTC_MINUTES_ALARM:
   17.64 -        case RTC_HOURS_ALARM:
   17.65 -            s->cmos_data[s->cmos_index] = data;
   17.66 -            break;
   17.67 -        case RTC_SECONDS:
   17.68 -        case RTC_MINUTES:
   17.69 -        case RTC_HOURS:
   17.70 -        case RTC_DAY_OF_WEEK:
   17.71 -        case RTC_DAY_OF_MONTH:
   17.72 -        case RTC_MONTH:
   17.73 -        case RTC_YEAR:
   17.74 -            s->cmos_data[s->cmos_index] = data;
   17.75 -            /* if in set mode, do not update the time */
   17.76 -            if (!(s->cmos_data[RTC_REG_B] & RTC_SET)) {
   17.77 +    printk("HVM_RTC: write index=0x%02x val=0x%02x\n",
   17.78 +           s->cmos_index, data);
   17.79 +#endif
   17.80 +
   17.81 +    switch ( s->cmos_index )
   17.82 +    {
   17.83 +    case RTC_SECONDS_ALARM:
   17.84 +    case RTC_MINUTES_ALARM:
   17.85 +    case RTC_HOURS_ALARM:
   17.86 +        s->cmos_data[s->cmos_index] = data;
   17.87 +        break;
   17.88 +    case RTC_SECONDS:
   17.89 +    case RTC_MINUTES:
   17.90 +    case RTC_HOURS:
   17.91 +    case RTC_DAY_OF_WEEK:
   17.92 +    case RTC_DAY_OF_MONTH:
   17.93 +    case RTC_MONTH:
   17.94 +    case RTC_YEAR:
   17.95 +        s->cmos_data[s->cmos_index] = data;
   17.96 +        /* if in set mode, do not update the time */
   17.97 +        if ( !(s->cmos_data[RTC_REG_B] & RTC_SET) )
   17.98 +            rtc_set_time(s);
   17.99 +        break;
  17.100 +    case RTC_REG_A:
  17.101 +        /* UIP bit is read only */
  17.102 +        s->cmos_data[RTC_REG_A] = (data & ~RTC_UIP) |
  17.103 +            (s->cmos_data[RTC_REG_A] & RTC_UIP);
  17.104 +        rtc_timer_update(s);
  17.105 +        break;
  17.106 +    case RTC_REG_B:
  17.107 +        if ( data & RTC_SET )
  17.108 +        {
  17.109 +            /* set mode: reset UIP mode */
  17.110 +            s->cmos_data[RTC_REG_A] &= ~RTC_UIP;
  17.111 +            data &= ~RTC_UIE;
  17.112 +        }
  17.113 +        else
  17.114 +        {
  17.115 +            /* if disabling set mode, update the time */
  17.116 +            if ( s->cmos_data[RTC_REG_B] & RTC_SET )
  17.117                  rtc_set_time(s);
  17.118 -            }
  17.119 -            break;
  17.120 -        case RTC_REG_A:
  17.121 -            /* UIP bit is read only */
  17.122 -            s->cmos_data[RTC_REG_A] = (data & ~RTC_UIP) |
  17.123 -                (s->cmos_data[RTC_REG_A] & RTC_UIP);
  17.124 -            rtc_timer_update(s);
  17.125 -            break;
  17.126 -        case RTC_REG_B:
  17.127 -            if (data & RTC_SET) {
  17.128 -                /* set mode: reset UIP mode */
  17.129 -                s->cmos_data[RTC_REG_A] &= ~RTC_UIP;
  17.130 -                data &= ~RTC_UIE;
  17.131 -            } else {
  17.132 -                /* if disabling set mode, update the time */
  17.133 -                if (s->cmos_data[RTC_REG_B] & RTC_SET) {
  17.134 -                    rtc_set_time(s);
  17.135 -                }
  17.136 -            }
  17.137 -            s->cmos_data[RTC_REG_B] = data;
  17.138 -            rtc_timer_update(s);
  17.139 -            break;
  17.140 -        case RTC_REG_C:
  17.141 -        case RTC_REG_D:
  17.142 -            /* cannot write to them */
  17.143 -            break;
  17.144          }
  17.145 -        return 1;
  17.146 +        s->cmos_data[RTC_REG_B] = data;
  17.147 +        rtc_timer_update(s);
  17.148 +        break;
  17.149 +    case RTC_REG_C:
  17.150 +    case RTC_REG_D:
  17.151 +        /* cannot write to them */
  17.152 +        break;
  17.153      }
  17.154 -    return 0;
  17.155 +
  17.156 +    return 1;
  17.157  }
  17.158  
  17.159  static inline int to_bcd(RTCState *s, int a)
  17.160  {
  17.161 -    if (s->cmos_data[RTC_REG_B] & 0x04) {
  17.162 +    if ( s->cmos_data[RTC_REG_B] & 0x04 )
  17.163          return a;
  17.164 -    } else {
  17.165 +    else
  17.166          return ((a / 10) << 4) | (a % 10);
  17.167 -    }
  17.168  }
  17.169  
  17.170  static inline int from_bcd(RTCState *s, int a)
  17.171  {
  17.172 -    if (s->cmos_data[RTC_REG_B] & 0x04) {
  17.173 +    if ( s->cmos_data[RTC_REG_B] & 0x04 )
  17.174          return a;
  17.175 -    } else {
  17.176 +    else
  17.177          return ((a >> 4) * 10) + (a & 0x0f);
  17.178 -    }
  17.179  }
  17.180  
  17.181  static void rtc_set_time(RTCState *s)
  17.182 @@ -159,10 +164,9 @@ static void rtc_set_time(RTCState *s)
  17.183      tm->tm_sec = from_bcd(s, s->cmos_data[RTC_SECONDS]);
  17.184      tm->tm_min = from_bcd(s, s->cmos_data[RTC_MINUTES]);
  17.185      tm->tm_hour = from_bcd(s, s->cmos_data[RTC_HOURS] & 0x7f);
  17.186 -    if (!(s->cmos_data[RTC_REG_B] & 0x02) &&
  17.187 -        (s->cmos_data[RTC_HOURS] & 0x80)) {
  17.188 +    if ( !(s->cmos_data[RTC_REG_B] & 0x02) &&
  17.189 +         (s->cmos_data[RTC_HOURS] & 0x80) )
  17.190          tm->tm_hour += 12;
  17.191 -    }
  17.192      tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]);
  17.193      tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]);
  17.194      tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
  17.195 @@ -175,13 +179,16 @@ static void rtc_copy_date(RTCState *s)
  17.196  
  17.197      s->cmos_data[RTC_SECONDS] = to_bcd(s, tm->tm_sec);
  17.198      s->cmos_data[RTC_MINUTES] = to_bcd(s, tm->tm_min);
  17.199 -    if (s->cmos_data[RTC_REG_B] & RTC_24H) {
  17.200 +    if ( s->cmos_data[RTC_REG_B] & RTC_24H )
  17.201 +    {
  17.202          /* 24 hour format */
  17.203          s->cmos_data[RTC_HOURS] = to_bcd(s, tm->tm_hour);
  17.204 -    } else {
  17.205 +    }
  17.206 +    else
  17.207 +    {
  17.208          /* 12 hour format */
  17.209          s->cmos_data[RTC_HOURS] = to_bcd(s, tm->tm_hour % 12);
  17.210 -        if (tm->tm_hour >= 12)
  17.211 +        if ( tm->tm_hour >= 12 )
  17.212              s->cmos_data[RTC_HOURS] |= 0x80;
  17.213      }
  17.214      s->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday);
  17.215 @@ -197,13 +204,12 @@ static int get_days_in_month(int month, 
  17.216          31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 
  17.217      };
  17.218      int d;
  17.219 -    if ((unsigned )month >= 12)
  17.220 +    if ( (unsigned)month >= 12 )
  17.221          return 31;
  17.222      d = days_tab[month];
  17.223 -    if (month == 1) {
  17.224 -        if ((year % 4) == 0 && ((year % 100) != 0 || (year % 400) == 0))
  17.225 +    if ( month == 1 )
  17.226 +        if ( (year % 4) == 0 && ((year % 100) != 0 || (year % 400) == 0) )
  17.227              d++;
  17.228 -    }
  17.229      return d;
  17.230  }
  17.231  
  17.232 @@ -248,16 +254,18 @@ static void rtc_update_second(void *opaq
  17.233      RTCState *s = opaque;
  17.234  
  17.235      /* if the oscillator is not in normal operation, we do not update */
  17.236 -    if ((s->cmos_data[RTC_REG_A] & RTC_DIV_CTL) != RTC_REF_CLCK_32KHZ) {
  17.237 +    if ( (s->cmos_data[RTC_REG_A] & RTC_DIV_CTL) != RTC_REF_CLCK_32KHZ )
  17.238 +    {
  17.239          s->next_second_time += 1000000000ULL;
  17.240          set_timer(&s->second_timer, s->next_second_time);
  17.241 -    } else {
  17.242 +    }
  17.243 +    else
  17.244 +    {
  17.245          rtc_next_second(&s->current_tm);
  17.246          
  17.247 -        if (!(s->cmos_data[RTC_REG_B] & RTC_SET)) {
  17.248 -            /* update in progress bit */
  17.249 +        if ( !(s->cmos_data[RTC_REG_B] & RTC_SET) )
  17.250              s->cmos_data[RTC_REG_A] |= RTC_UIP;
  17.251 -        }
  17.252 +
  17.253          /* Delay time before update cycle */
  17.254          set_timer(&s->second_timer2, s->next_second_time + 244000);
  17.255      }
  17.256 @@ -266,33 +274,32 @@ static void rtc_update_second(void *opaq
  17.257  static void rtc_update_second2(void *opaque)
  17.258  {
  17.259      RTCState *s = opaque;
  17.260 -    struct hvm_domain *plat = &s->vcpu->domain->arch.hvm_domain;
  17.261 -    struct vpic       *pic  = &plat->vpic;
  17.262  
  17.263 -    if (!(s->cmos_data[RTC_REG_B] & RTC_SET)) {
  17.264 +    if ( !(s->cmos_data[RTC_REG_B] & RTC_SET) )
  17.265          rtc_copy_date(s);
  17.266 -    }
  17.267  
  17.268      /* check alarm */
  17.269 -    if (s->cmos_data[RTC_REG_B] & RTC_AIE) {
  17.270 -        if (((s->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0 ||
  17.271 -             s->cmos_data[RTC_SECONDS_ALARM] == s->current_tm.tm_sec) &&
  17.272 -            ((s->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0 ||
  17.273 -             s->cmos_data[RTC_MINUTES_ALARM] == s->current_tm.tm_mon) &&
  17.274 -            ((s->cmos_data[RTC_HOURS_ALARM] & 0xc0) == 0xc0 ||
  17.275 -             s->cmos_data[RTC_HOURS_ALARM] == s->current_tm.tm_hour)) {
  17.276 -
  17.277 +    if ( s->cmos_data[RTC_REG_B] & RTC_AIE )
  17.278 +    {
  17.279 +        if ( ((s->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0 ||
  17.280 +              s->cmos_data[RTC_SECONDS_ALARM] == s->current_tm.tm_sec) &&
  17.281 +             ((s->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0 ||
  17.282 +              s->cmos_data[RTC_MINUTES_ALARM] == s->current_tm.tm_mon) &&
  17.283 +             ((s->cmos_data[RTC_HOURS_ALARM] & 0xc0) == 0xc0 ||
  17.284 +              s->cmos_data[RTC_HOURS_ALARM] == s->current_tm.tm_hour) )
  17.285 +        {
  17.286              s->cmos_data[RTC_REG_C] |= 0xa0; 
  17.287 -            pic_set_irq(pic, s->irq, 0);
  17.288 -            pic_set_irq(pic, s->irq, 1);
  17.289 +            hvm_isa_irq_deassert(s->vcpu->domain, s->irq);
  17.290 +            hvm_isa_irq_assert(s->vcpu->domain, s->irq);
  17.291          }
  17.292      }
  17.293  
  17.294      /* update ended interrupt */
  17.295 -    if (s->cmos_data[RTC_REG_B] & RTC_UIE) {
  17.296 +    if ( s->cmos_data[RTC_REG_B] & RTC_UIE )
  17.297 +    {
  17.298          s->cmos_data[RTC_REG_C] |= 0x90; 
  17.299 -        pic_set_irq(pic, s->irq, 0);
  17.300 -        pic_set_irq(pic, s->irq, 1);
  17.301 +        hvm_isa_irq_deassert(s->vcpu->domain, s->irq);
  17.302 +        hvm_isa_irq_assert(s->vcpu->domain, s->irq);
  17.303      }
  17.304  
  17.305      /* clear update in progress bit */
  17.306 @@ -305,41 +312,41 @@ static void rtc_update_second2(void *opa
  17.307  static uint32_t rtc_ioport_read(void *opaque, uint32_t addr)
  17.308  {
  17.309      RTCState *s = opaque;
  17.310 -    struct hvm_domain *plat = &s->vcpu->domain->arch.hvm_domain;
  17.311 -    struct vpic       *pic  = &plat->vpic;
  17.312      int ret;
  17.313  
  17.314 -    if ((addr & 1) == 0) {
  17.315 +    if ( (addr & 1) == 0 )
  17.316          return 0xff;
  17.317 -    } else {
  17.318 -        switch(s->cmos_index) {
  17.319 -        case RTC_SECONDS:
  17.320 -        case RTC_MINUTES:
  17.321 -        case RTC_HOURS:
  17.322 -        case RTC_DAY_OF_WEEK:
  17.323 -        case RTC_DAY_OF_MONTH:
  17.324 -        case RTC_MONTH:
  17.325 -        case RTC_YEAR:
  17.326 -            ret = s->cmos_data[s->cmos_index];
  17.327 -            break;
  17.328 -        case RTC_REG_A:
  17.329 -            ret = s->cmos_data[s->cmos_index];
  17.330 -            break;
  17.331 -        case RTC_REG_C:
  17.332 -            ret = s->cmos_data[s->cmos_index];
  17.333 -            pic_set_irq(pic, s->irq, 0);
  17.334 -            s->cmos_data[RTC_REG_C] = 0x00; 
  17.335 -            break;
  17.336 -        default:
  17.337 -            ret = s->cmos_data[s->cmos_index];
  17.338 -            break;
  17.339 -        }
  17.340 +
  17.341 +    switch ( s->cmos_index )
  17.342 +    {
  17.343 +    case RTC_SECONDS:
  17.344 +    case RTC_MINUTES:
  17.345 +    case RTC_HOURS:
  17.346 +    case RTC_DAY_OF_WEEK:
  17.347 +    case RTC_DAY_OF_MONTH:
  17.348 +    case RTC_MONTH:
  17.349 +    case RTC_YEAR:
  17.350 +        ret = s->cmos_data[s->cmos_index];
  17.351 +        break;
  17.352 +    case RTC_REG_A:
  17.353 +        ret = s->cmos_data[s->cmos_index];
  17.354 +        break;
  17.355 +    case RTC_REG_C:
  17.356 +        ret = s->cmos_data[s->cmos_index];
  17.357 +        hvm_isa_irq_deassert(s->vcpu->domain, s->irq);
  17.358 +        s->cmos_data[RTC_REG_C] = 0x00; 
  17.359 +        break;
  17.360 +    default:
  17.361 +        ret = s->cmos_data[s->cmos_index];
  17.362 +        break;
  17.363 +    }
  17.364 +
  17.365  #ifdef DEBUG_RTC
  17.366 -        printk("HVM_RTC: read index=0x%02x val=0x%02x\n",
  17.367 -               s->cmos_index, ret);
  17.368 +    printk("HVM_RTC: read index=0x%02x val=0x%02x\n",
  17.369 +           s->cmos_index, ret);
  17.370  #endif
  17.371 -        return ret;
  17.372 -    }
  17.373 +
  17.374 +    return ret;
  17.375  }
  17.376  
  17.377  static int handle_rtc_io(ioreq_t *p)
  17.378 @@ -347,20 +354,23 @@ static int handle_rtc_io(ioreq_t *p)
  17.379      struct vcpu *v = current;
  17.380      struct RTCState *vrtc = &v->domain->arch.hvm_domain.pl_time.vrtc;
  17.381  
  17.382 -    if (p->size != 1 ||
  17.383 -        p->data_is_ptr ||
  17.384 -        p->type != IOREQ_TYPE_PIO){
  17.385 +    if ( (p->size != 1) || p->data_is_ptr || (p->type != IOREQ_TYPE_PIO) )
  17.386 +    {
  17.387          printk("HVM_RTC: wrong RTC IO!\n");
  17.388          return 1;
  17.389      }
  17.390      
  17.391 -    if (p->dir == 0) { /* write */
  17.392 -        if (rtc_ioport_write(vrtc, p->addr, p->data & 0xFF))
  17.393 +    if ( p->dir == 0 ) /* write */
  17.394 +    {
  17.395 +        if ( rtc_ioport_write(vrtc, p->addr, p->data & 0xFF) )
  17.396              return 1;
  17.397 -    } else if (p->dir == 1 && vrtc->cmos_index < RTC_SIZE) { /* read */
  17.398 +    }
  17.399 +    else if ( (p->dir == 1) && (vrtc->cmos_index < RTC_SIZE) ) /* read */
  17.400 +    {
  17.401          p->data = rtc_ioport_read(vrtc, p->addr);
  17.402          return 1;
  17.403      }
  17.404 +
  17.405      return 0;
  17.406  }
  17.407  
    18.1 --- a/xen/arch/x86/hvm/svm/intr.c	Tue Nov 21 17:34:17 2006 +0000
    18.2 +++ b/xen/arch/x86/hvm/svm/intr.c	Tue Nov 21 19:22:25 2006 +0000
    18.3 @@ -65,8 +65,6 @@ asmlinkage void svm_intr_assist(void)
    18.4      struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb;
    18.5      struct hvm_domain *plat=&v->domain->arch.hvm_domain;
    18.6      struct periodic_time *pt = &plat->pl_time.periodic_tm;
    18.7 -    struct vpic *pic= &plat->vpic;
    18.8 -    int callback_irq;
    18.9      int intr_type = APIC_DM_EXTINT;
   18.10      int intr_vector = -1;
   18.11      int re_injecting = 0;
   18.12 @@ -119,18 +117,11 @@ asmlinkage void svm_intr_assist(void)
   18.13      {
   18.14          if ( (v->vcpu_id == 0) && pt->enabled && pt->pending_intr_nr )
   18.15          {
   18.16 -            pic_set_irq(pic, pt->irq, 0);
   18.17 -            pic_set_irq(pic, pt->irq, 1);
   18.18 +            hvm_isa_irq_deassert(current->domain, pt->irq);
   18.19 +            hvm_isa_irq_assert(current->domain, pt->irq);
   18.20          }
   18.21  
   18.22 -        if ( v->vcpu_id == 0 )
   18.23 -        {
   18.24 -            callback_irq =
   18.25 -                v->domain->arch.hvm_domain.params[HVM_PARAM_CALLBACK_IRQ];
   18.26 -            if ( callback_irq != 0 )
   18.27 -                pic_set_xen_irq(pic, callback_irq,
   18.28 -                                local_events_need_delivery());
   18.29 -        }
   18.30 +        hvm_set_callback_irq_level();
   18.31  
   18.32          if ( cpu_has_pending_irq(v) )
   18.33              intr_vector = cpu_get_interrupt(v, &intr_type);
    19.1 --- a/xen/arch/x86/hvm/vioapic.c	Tue Nov 21 17:34:17 2006 +0000
    19.2 +++ b/xen/arch/x86/hvm/vioapic.c	Tue Nov 21 19:22:25 2006 +0000
    19.3 @@ -42,14 +42,13 @@
    19.4  
    19.5  /* HACK: Route IRQ0 only to VCPU0 to prevent time jumps. */
    19.6  #define IRQ0_SPECIAL_ROUTING 1
    19.7 -#ifdef IRQ0_SPECIAL_ROUTING
    19.8 -static int redir_warning_done = 0; 
    19.9 -#endif
   19.10  
   19.11  #if defined(__ia64__)
   19.12  #define opt_hvm_debug_level opt_vmx_debug_level
   19.13  #endif
   19.14  
   19.15 +static void vioapic_deliver(struct vioapic *vioapic, int irq);
   19.16 +
   19.17  static unsigned long vioapic_read_indirect(struct vioapic *vioapic,
   19.18                                             unsigned long addr,
   19.19                                             unsigned long length)
   19.20 @@ -122,19 +121,48 @@ static unsigned long vioapic_read(struct
   19.21      return result;
   19.22  }
   19.23  
   19.24 -static void vioapic_update_imr(struct vioapic *vioapic, int index)
   19.25 +static void vioapic_write_redirent(
   19.26 +    struct vioapic *vioapic, unsigned int idx, int top_word, uint32_t val)
   19.27  {
   19.28 -    if ( vioapic->redirtbl[index].fields.mask )
   19.29 -        set_bit(index, &vioapic->imr);
   19.30 +    struct domain *d = vioapic_domain(vioapic);
   19.31 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
   19.32 +    union vioapic_redir_entry *pent, ent;
   19.33 +
   19.34 +    spin_lock(&hvm_irq->lock);
   19.35 +
   19.36 +    pent = &vioapic->redirtbl[idx];
   19.37 +    ent  = *pent;
   19.38 +
   19.39 +    if ( top_word )
   19.40 +    {
   19.41 +        /* Contains only the dest_id. */
   19.42 +        ent.bits = (uint32_t)ent.bits | ((uint64_t)val << 32);
   19.43 +    }
   19.44      else
   19.45 -        clear_bit(index, &vioapic->imr);
   19.46 +    {
   19.47 +        /* Remote IRR and Delivery Status are read-only. */
   19.48 +        ent.bits = ((ent.bits >> 32) << 32) | val;
   19.49 +        ent.fields.delivery_status = 0;
   19.50 +        ent.fields.remote_irr = pent->fields.remote_irr;
   19.51 +    }
   19.52 +
   19.53 +    *pent = ent;
   19.54 +
   19.55 +    if ( (ent.fields.trig_mode == VIOAPIC_LEVEL_TRIG) &&
   19.56 +         !ent.fields.mask &&
   19.57 +         !ent.fields.remote_irr &&
   19.58 +         hvm_irq->gsi_assert_count[idx] )
   19.59 +    {
   19.60 +        pent->fields.remote_irr = 1;
   19.61 +        vioapic_deliver(vioapic, idx);
   19.62 +    }
   19.63 +
   19.64 +    spin_unlock(&hvm_irq->lock);
   19.65  }
   19.66  
   19.67 -
   19.68 -static void vioapic_write_indirect(struct vioapic *vioapic,
   19.69 -                                   unsigned long addr,
   19.70 -                                   unsigned long length,
   19.71 -                                   unsigned long val)
   19.72 +static void vioapic_write_indirect(
   19.73 +    struct vioapic *vioapic, unsigned long addr,
   19.74 +    unsigned long length, unsigned long val)
   19.75  {
   19.76      switch ( vioapic->ioregsel )
   19.77      {
   19.78 @@ -154,7 +182,6 @@ static void vioapic_write_indirect(struc
   19.79      default:
   19.80      {
   19.81          uint32_t redir_index = (vioapic->ioregsel - 0x10) >> 1;
   19.82 -        uint64_t redir_content;
   19.83  
   19.84          HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "vioapic_write_indirect "
   19.85                      "change redir index %x val %lx\n",
   19.86 @@ -167,38 +194,11 @@ static void vioapic_write_indirect(struc
   19.87              break;
   19.88          }
   19.89  
   19.90 -        redir_content = vioapic->redirtbl[redir_index].bits;
   19.91 -
   19.92 -        if ( vioapic->ioregsel & 0x1 )
   19.93 -        {
   19.94 -#ifdef IRQ0_SPECIAL_ROUTING
   19.95 -            if ( !redir_warning_done && (redir_index == 0) &&
   19.96 -                 ((val >> 24) != 0) )
   19.97 -            {
   19.98 -                /*
   19.99 -                 * Cannot yet handle delivering PIT interrupts to any VCPU != 
  19.100 -                 * 0. Needs proper fixing, but for now simply spit a warning 
  19.101 -                 * that we're going to ignore the target in practice and always
  19.102 -                 * deliver to VCPU 0.
  19.103 -                 */
  19.104 -                printk("IO-APIC: PIT (IRQ0) redirect to VCPU %lx "
  19.105 -                       "will be ignored.\n", val >> 24); 
  19.106 -                redir_warning_done = 1;
  19.107 -            }
  19.108 -#endif
  19.109 -            redir_content = (((uint64_t)val & 0xffffffff) << 32) |
  19.110 -                (redir_content & 0xffffffff);
  19.111 -        }
  19.112 -        else
  19.113 -        {
  19.114 -            redir_content = ((redir_content >> 32) << 32) |
  19.115 -                (val & 0xffffffff);
  19.116 -        }
  19.117 -        vioapic->redirtbl[redir_index].bits = redir_content;
  19.118 -        vioapic_update_imr(vioapic, redir_index);
  19.119 +        vioapic_write_redirent(
  19.120 +            vioapic, redir_index, vioapic->ioregsel&1, val);
  19.121          break;
  19.122      }
  19.123 -    } /* switch */
  19.124 +    }
  19.125  }
  19.126  
  19.127  static void vioapic_write(struct vcpu *v,
  19.128 @@ -245,27 +245,13 @@ struct hvm_mmio_handler vioapic_mmio_han
  19.129      .write_handler = vioapic_write
  19.130  };
  19.131  
  19.132 -static void vioapic_reset(struct vioapic *vioapic)
  19.133 +static void ioapic_inj_irq(
  19.134 +    struct vioapic *vioapic,
  19.135 +    struct vlapic *target,
  19.136 +    uint8_t vector,
  19.137 +    uint8_t trig_mode,
  19.138 +    uint8_t delivery_mode)
  19.139  {
  19.140 -    int i;
  19.141 -
  19.142 -    memset(vioapic, 0, sizeof(*vioapic));
  19.143 -
  19.144 -    for ( i = 0; i < VIOAPIC_NUM_PINS; i++ )
  19.145 -    {
  19.146 -        vioapic->redirtbl[i].fields.mask = 0x1;
  19.147 -        vioapic_update_imr(vioapic, i);
  19.148 -    }
  19.149 -}
  19.150 -
  19.151 -static int ioapic_inj_irq(struct vioapic *vioapic,
  19.152 -                          struct vlapic * target,
  19.153 -                          uint8_t vector,
  19.154 -                          uint8_t trig_mode,
  19.155 -                          uint8_t delivery_mode)
  19.156 -{
  19.157 -    int result = 0;
  19.158 -
  19.159      HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic_inj_irq "
  19.160                  "irq %d trig %d delive mode %d\n",
  19.161                  vector, trig_mode, delivery_mode);
  19.162 @@ -274,30 +260,23 @@ static int ioapic_inj_irq(struct vioapic
  19.163      {
  19.164      case dest_Fixed:
  19.165      case dest_LowestPrio:
  19.166 -        if ( vlapic_set_irq(target, vector, trig_mode) && (trig_mode == 1) )
  19.167 -            gdprintk(XENLOG_WARNING, "level interrupt before cleared\n");
  19.168 -        result = 1;
  19.169 +        if ( vlapic_set_irq(target, vector, trig_mode) )
  19.170 +            vcpu_kick(vlapic_vcpu(target));
  19.171          break;
  19.172      default:
  19.173          gdprintk(XENLOG_WARNING, "error delivery mode %d\n", delivery_mode);
  19.174          break;
  19.175      }
  19.176 -
  19.177 -    return result;
  19.178  }
  19.179  
  19.180 -static uint32_t ioapic_get_delivery_bitmask(struct vioapic *vioapic,
  19.181 -                                            uint16_t dest,
  19.182 -                                            uint8_t dest_mode,
  19.183 -                                            uint8_t vector,
  19.184 -                                            uint8_t delivery_mode)
  19.185 +static uint32_t ioapic_get_delivery_bitmask(
  19.186 +    struct vioapic *vioapic, uint16_t dest, uint8_t dest_mode)
  19.187  {
  19.188      uint32_t mask = 0;
  19.189      struct vcpu *v;
  19.190  
  19.191      HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic_get_delivery_bitmask "
  19.192 -                "dest %d dest_mode %d vector %d del_mode %d\n",
  19.193 -                dest, dest_mode, vector, delivery_mode);
  19.194 +                "dest %d dest_mode %d\n", dest, dest_mode);
  19.195  
  19.196      if ( dest_mode == 0 ) /* Physical mode. */
  19.197      {
  19.198 @@ -325,12 +304,12 @@ static uint32_t ioapic_get_delivery_bitm
  19.199      }
  19.200  
  19.201   out:
  19.202 -    HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic_get_delivery_bitmask "
  19.203 -                "mask %x\n", mask);
  19.204 +    HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic_get_delivery_bitmask mask %x\n",
  19.205 +                mask);
  19.206      return mask;
  19.207  }
  19.208  
  19.209 -static void ioapic_deliver(struct vioapic *vioapic, int irq)
  19.210 +static void vioapic_deliver(struct vioapic *vioapic, int irq)
  19.211  {
  19.212      uint16_t dest = vioapic->redirtbl[irq].fields.dest_id;
  19.213      uint8_t dest_mode = vioapic->redirtbl[irq].fields.dest_mode;
  19.214 @@ -341,13 +320,14 @@ static void ioapic_deliver(struct vioapi
  19.215      struct vlapic *target;
  19.216      struct vcpu *v;
  19.217  
  19.218 +    ASSERT(spin_is_locked(&vioapic_domain(vioapic)->arch.hvm_domain.irq.lock));
  19.219 +
  19.220      HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
  19.221                  "dest=%x dest_mode=%x delivery_mode=%x "
  19.222                  "vector=%x trig_mode=%x\n",
  19.223                  dest, dest_mode, delivery_mode, vector, trig_mode);
  19.224  
  19.225 -    deliver_bitmask = ioapic_get_delivery_bitmask(
  19.226 -        vioapic, dest, dest_mode, vector, delivery_mode);
  19.227 +    deliver_bitmask = ioapic_get_delivery_bitmask(vioapic, dest, dest_mode);
  19.228      if ( !deliver_bitmask )
  19.229      {
  19.230          HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic deliver "
  19.231 @@ -373,7 +353,6 @@ static void ioapic_deliver(struct vioapi
  19.232          if ( target != NULL )
  19.233          {
  19.234              ioapic_inj_irq(vioapic, target, vector, trig_mode, delivery_mode);
  19.235 -            vcpu_kick(vlapic_vcpu(target));
  19.236          }
  19.237          else
  19.238          {
  19.239 @@ -405,7 +384,6 @@ static void ioapic_deliver(struct vioapi
  19.240                  target = vcpu_vlapic(v);
  19.241                  ioapic_inj_irq(vioapic, target, vector,
  19.242                                 trig_mode, delivery_mode);
  19.243 -                vcpu_kick(vlapic_vcpu(target));
  19.244              }
  19.245          }
  19.246          break;
  19.247 @@ -422,98 +400,32 @@ static void ioapic_deliver(struct vioapi
  19.248      }
  19.249  }
  19.250  
  19.251 -static int ioapic_get_highest_irq(struct vioapic *vioapic)
  19.252 +void vioapic_irq_positive_edge(struct domain *d, unsigned int irq)
  19.253  {
  19.254 -    uint32_t irqs = vioapic->irr | vioapic->irr_xen;
  19.255 -    irqs &= ~vioapic->isr & ~vioapic->imr;
  19.256 -    return fls(irqs) - 1;
  19.257 -}
  19.258 -
  19.259 -static void service_ioapic(struct vioapic *vioapic)
  19.260 -{
  19.261 -    int irq;
  19.262 +    struct vioapic *vioapic = domain_vioapic(d);
  19.263 +    union vioapic_redir_entry *ent;
  19.264  
  19.265 -    while ( (irq = ioapic_get_highest_irq(vioapic)) != -1 )
  19.266 -    {
  19.267 -        HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "service_ioapic highest irq %x\n", irq);
  19.268 +    HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic_irq_positive_edge irq %x", irq);
  19.269  
  19.270 -        if ( !test_bit(irq, &vioapic->imr) )
  19.271 -            ioapic_deliver(vioapic, irq);
  19.272 +    ASSERT(irq < VIOAPIC_NUM_PINS);
  19.273 +    ASSERT(spin_is_locked(&d->arch.hvm_domain.irq.lock));
  19.274  
  19.275 -        if ( vioapic->redirtbl[irq].fields.trig_mode == VIOAPIC_LEVEL_TRIG )
  19.276 -            vioapic->isr |= (1 << irq);
  19.277 +    ent = &vioapic->redirtbl[irq];
  19.278 +    if ( ent->fields.mask )
  19.279 +        return;
  19.280  
  19.281 -        vioapic->irr     &= ~(1 << irq);
  19.282 -        vioapic->irr_xen &= ~(1 << irq);
  19.283 +    if ( ent->fields.trig_mode == VIOAPIC_EDGE_TRIG )
  19.284 +    {
  19.285 +        vioapic_deliver(vioapic, irq);
  19.286 +    }
  19.287 +    else if ( !ent->fields.remote_irr )
  19.288 +    {
  19.289 +        ent->fields.remote_irr = 1;
  19.290 +        vioapic_deliver(vioapic, irq);
  19.291      }
  19.292  }
  19.293  
  19.294 -void vioapic_set_xen_irq(struct domain *d, int irq, int level)
  19.295 -{
  19.296 -    struct vioapic *vioapic = domain_vioapic(d);
  19.297 -
  19.298 -    if ( vioapic->redirtbl[irq].fields.mask )
  19.299 -        return;
  19.300 -
  19.301 -    if ( vioapic->redirtbl[irq].fields.trig_mode == VIOAPIC_EDGE_TRIG )
  19.302 -        gdprintk(XENLOG_WARNING, "Forcing edge triggered APIC irq %d?\n", irq);
  19.303 -
  19.304 -    if ( level )
  19.305 -        vioapic->irr_xen |= 1 << irq;
  19.306 -    else
  19.307 -        vioapic->irr_xen &= ~(1 << irq);
  19.308 -
  19.309 -    service_ioapic(vioapic);
  19.310 -}
  19.311 -
  19.312 -void vioapic_set_irq(struct domain *d, int irq, int level)
  19.313 -{
  19.314 -    struct vioapic *vioapic = domain_vioapic(d);
  19.315 -    uint32_t bit;
  19.316 -
  19.317 -    HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic_set_irq irq %x level %x", 
  19.318 -                irq, level);
  19.319 -
  19.320 -    if ( (irq < 0) || (irq >= VIOAPIC_NUM_PINS) )
  19.321 -        return;
  19.322 -
  19.323 -    if ( vioapic->redirtbl[irq].fields.mask )
  19.324 -        return;
  19.325 -
  19.326 -    HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "vioapic_set_irq entry %x "
  19.327 -                "vector %x delivery_mode %x dest_mode %x delivery_status %x "
  19.328 -                "polarity %x remote_irr %x trig_mode %x mask %x dest_id %x\n",
  19.329 -                irq,
  19.330 -                vioapic->redirtbl[irq].fields.vector,
  19.331 -                vioapic->redirtbl[irq].fields.delivery_mode,
  19.332 -                vioapic->redirtbl[irq].fields.dest_mode,
  19.333 -                vioapic->redirtbl[irq].fields.delivery_status,
  19.334 -                vioapic->redirtbl[irq].fields.polarity,
  19.335 -                vioapic->redirtbl[irq].fields.remote_irr,
  19.336 -                vioapic->redirtbl[irq].fields.trig_mode,
  19.337 -                vioapic->redirtbl[irq].fields.mask,
  19.338 -                vioapic->redirtbl[irq].fields.dest_id);
  19.339 -
  19.340 -    bit = 1 << irq;
  19.341 -    if ( vioapic->redirtbl[irq].fields.trig_mode == VIOAPIC_LEVEL_TRIG )
  19.342 -    {
  19.343 -        if ( level )
  19.344 -            vioapic->irr |= bit;
  19.345 -        else
  19.346 -            vioapic->irr &= ~bit;
  19.347 -    }
  19.348 -    else
  19.349 -    {
  19.350 -        if ( level )
  19.351 -            /* XXX No irr clear for edge interrupt */
  19.352 -            vioapic->irr |= bit;
  19.353 -    }
  19.354 -
  19.355 -    service_ioapic(vioapic);
  19.356 -}
  19.357 -
  19.358 -/* XXX If level interrupt, use vector->irq table for performance */
  19.359 -static int get_redir_num(struct vioapic *vioapic, int vector)
  19.360 +static int get_eoi_gsi(struct vioapic *vioapic, int vector)
  19.361  {
  19.362      int i;
  19.363  
  19.364 @@ -527,29 +439,40 @@ static int get_redir_num(struct vioapic 
  19.365  void vioapic_update_EOI(struct domain *d, int vector)
  19.366  {
  19.367      struct vioapic *vioapic = domain_vioapic(d);
  19.368 -    int redir_num;
  19.369 +    struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
  19.370 +    union vioapic_redir_entry *ent;
  19.371 +    int gsi;
  19.372  
  19.373 -    if ( (redir_num = get_redir_num(vioapic, vector)) == -1 )
  19.374 +    spin_lock(&hvm_irq->lock);
  19.375 +
  19.376 +    if ( (gsi = get_eoi_gsi(vioapic, vector)) == -1 )
  19.377      {
  19.378          gdprintk(XENLOG_WARNING, "Can't find redir item for %d EOI\n", vector);
  19.379 -        return;
  19.380 +        goto out;
  19.381      }
  19.382  
  19.383 -    if ( !test_and_clear_bit(redir_num, &vioapic->isr) )
  19.384 +    ent = &vioapic->redirtbl[gsi];
  19.385 +
  19.386 +    ent->fields.remote_irr = 0;
  19.387 +    if ( (ent->fields.trig_mode == VIOAPIC_LEVEL_TRIG) &&
  19.388 +         !ent->fields.mask &&
  19.389 +         hvm_irq->gsi_assert_count[gsi] )
  19.390      {
  19.391 -        gdprintk(XENLOG_WARNING, "redir %d not set for %d EOI\n",
  19.392 -                 redir_num, vector);
  19.393 -        return;
  19.394 +        ent->fields.remote_irr = 1;
  19.395 +        vioapic_deliver(vioapic, gsi);
  19.396      }
  19.397 +
  19.398 + out:
  19.399 +    spin_unlock(&hvm_irq->lock);
  19.400  }
  19.401  
  19.402  void vioapic_init(struct domain *d)
  19.403  {
  19.404      struct vioapic *vioapic = domain_vioapic(d);
  19.405 +    int i;
  19.406  
  19.407 -    HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "vioapic_init\n");
  19.408 -
  19.409 -    vioapic_reset(vioapic);
  19.410 -
  19.411 +    memset(vioapic, 0, sizeof(*vioapic));
  19.412 +    for ( i = 0; i < VIOAPIC_NUM_PINS; i++ )
  19.413 +        vioapic->redirtbl[i].fields.mask = 1;
  19.414      vioapic->base_address = VIOAPIC_DEFAULT_BASE_ADDRESS;
  19.415  }
    20.1 --- a/xen/arch/x86/hvm/vlapic.c	Tue Nov 21 17:34:17 2006 +0000
    20.2 +++ b/xen/arch/x86/hvm/vlapic.c	Tue Nov 21 19:22:25 2006 +0000
    20.3 @@ -152,7 +152,7 @@ int vlapic_set_irq(struct vlapic *vlapic
    20.4  {
    20.5      int ret;
    20.6  
    20.7 -    ret = vlapic_test_and_set_irr(vec, vlapic);
    20.8 +    ret = !vlapic_test_and_set_irr(vec, vlapic);
    20.9      if ( trig )
   20.10          vlapic_set_vector(vec, vlapic->regs + APIC_TMR);
   20.11  
   20.12 @@ -371,9 +371,7 @@ struct vlapic *apic_round_robin(
   20.13      int next, old;
   20.14      struct vlapic *target = NULL;
   20.15  
   20.16 -    spin_lock(&d->arch.hvm_domain.round_robin_lock);
   20.17 -
   20.18 -    old = next = d->arch.hvm_domain.round_info[vector];
   20.19 +    old = next = d->arch.hvm_domain.irq.round_robin_prev_vcpu;
   20.20  
   20.21      do {
   20.22          if ( ++next == MAX_VIRT_CPUS ) 
   20.23 @@ -386,8 +384,7 @@ struct vlapic *apic_round_robin(
   20.24          target = NULL;
   20.25      } while ( next != old );
   20.26  
   20.27 -    d->arch.hvm_domain.round_info[vector] = next;
   20.28 -    spin_unlock(&d->arch.hvm_domain.round_robin_lock);
   20.29 +    d->arch.hvm_domain.irq.round_robin_prev_vcpu = next;
   20.30  
   20.31      return target;
   20.32  }
   20.33 @@ -863,7 +860,7 @@ int cpu_has_pending_irq(struct vcpu *v)
   20.34      if ( !vlapic_accept_pic_intr(v) )
   20.35          return 0;
   20.36  
   20.37 -    return plat->interrupt_request;
   20.38 +    return plat->irq.vpic.irq_pending;
   20.39  }
   20.40  
   20.41  void vlapic_post_injection(struct vcpu *v, int vector, int deliver_mode)
    21.1 --- a/xen/arch/x86/hvm/vmx/io.c	Tue Nov 21 17:34:17 2006 +0000
    21.2 +++ b/xen/arch/x86/hvm/vmx/io.c	Tue Nov 21 19:22:25 2006 +0000
    21.3 @@ -98,23 +98,17 @@ asmlinkage void vmx_intr_assist(void)
    21.4      struct vlapic *vlapic = vcpu_vlapic(v);
    21.5      struct hvm_domain *plat=&v->domain->arch.hvm_domain;
    21.6      struct periodic_time *pt = &plat->pl_time.periodic_tm;
    21.7 -    struct vpic *pic= &plat->vpic;
    21.8      unsigned int idtv_info_field;
    21.9      unsigned long inst_len;
   21.10      int    has_ext_irq;
   21.11  
   21.12 -    if ( (v->vcpu_id == 0) && pt->enabled && pt->pending_intr_nr ) {
   21.13 -        pic_set_irq(pic, pt->irq, 0);
   21.14 -        pic_set_irq(pic, pt->irq, 1);
   21.15 +    if ( (v->vcpu_id == 0) && pt->enabled && pt->pending_intr_nr )
   21.16 +    {
   21.17 +        hvm_isa_irq_deassert(current->domain, pt->irq);
   21.18 +        hvm_isa_irq_assert(current->domain, pt->irq);
   21.19      }
   21.20  
   21.21 -    if (v->vcpu_id == 0) {
   21.22 -        int callback_irq;
   21.23 -        callback_irq =
   21.24 -            v->domain->arch.hvm_domain.params[HVM_PARAM_CALLBACK_IRQ];
   21.25 -        if ( callback_irq != 0 )
   21.26 -            pic_set_xen_irq(pic, callback_irq, local_events_need_delivery());
   21.27 -    }
   21.28 +    hvm_set_callback_irq_level();
   21.29  
   21.30      if ( vlapic->flush_tpr_threshold )
   21.31          update_tpr_threshold(vlapic);
    22.1 --- a/xen/include/asm-x86/hvm/domain.h	Tue Nov 21 17:34:17 2006 +0000
    22.2 +++ b/xen/include/asm-x86/hvm/domain.h	Tue Nov 21 19:22:25 2006 +0000
    22.3 @@ -16,16 +16,15 @@
    22.4   * You should have received a copy of the GNU General Public License along with
    22.5   * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
    22.6   * Place - Suite 330, Boston, MA 02111-1307 USA.
    22.7 - *
    22.8   */
    22.9  
   22.10  #ifndef __ASM_X86_HVM_DOMAIN_H__
   22.11  #define __ASM_X86_HVM_DOMAIN_H__
   22.12  
   22.13 -#include <asm/hvm/vpic.h>
   22.14 +#include <asm/hvm/irq.h>
   22.15  #include <asm/hvm/vpt.h>
   22.16  #include <asm/hvm/vlapic.h>
   22.17 -#include <asm/hvm/vioapic.h>
   22.18 +#include <asm/hvm/io.h>
   22.19  #include <public/hvm/params.h>
   22.20  
   22.21  struct hvm_domain {
   22.22 @@ -35,13 +34,9 @@ struct hvm_domain {
   22.23      s64                    tsc_frequency;
   22.24      struct pl_time         pl_time;
   22.25  
   22.26 -    struct vpic            vpic;
   22.27 -    struct vioapic         vioapic;
   22.28      struct hvm_io_handler  io_handler;
   22.29  
   22.30 -    unsigned char          round_info[256];
   22.31 -    spinlock_t             round_robin_lock;
   22.32 -    int                    interrupt_request;
   22.33 +    struct hvm_irq         irq;
   22.34  
   22.35      /* hvm_print_line() logging. */
   22.36      char                   pbuf[80];
    23.1 --- a/xen/include/asm-x86/hvm/io.h	Tue Nov 21 17:34:17 2006 +0000
    23.2 +++ b/xen/include/asm-x86/hvm/io.h	Tue Nov 21 19:22:25 2006 +0000
    23.3 @@ -147,7 +147,6 @@ extern void send_pio_req(unsigned long p
    23.4  extern void handle_mmio(unsigned long gpa);
    23.5  extern void hvm_interrupt_post(struct vcpu *v, int vector, int type);
    23.6  extern void hvm_io_assist(struct vcpu *v);
    23.7 -extern void pic_irq_request(void *data, int level);
    23.8  extern int cpu_get_interrupt(struct vcpu *v, int *type);
    23.9  extern int cpu_has_pending_irq(struct vcpu *v);
   23.10  
    24.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    24.2 +++ b/xen/include/asm-x86/hvm/irq.h	Tue Nov 21 19:22:25 2006 +0000
    24.3 @@ -0,0 +1,107 @@
    24.4 +/******************************************************************************
    24.5 + * irq.h
    24.6 + * 
    24.7 + * Interrupt distribution and delivery logic.
    24.8 + * 
    24.9 + * Copyright (c) 2006, K A Fraser, XenSource Inc.
   24.10 + *
   24.11 + * This program is free software; you can redistribute it and/or modify it
   24.12 + * under the terms and conditions of the GNU General Public License,
   24.13 + * version 2, as published by the Free Software Foundation.
   24.14 + *
   24.15 + * This program is distributed in the hope it will be useful, but WITHOUT
   24.16 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   24.17 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   24.18 + * more details.
   24.19 + *
   24.20 + * You should have received a copy of the GNU General Public License along with
   24.21 + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
   24.22 + * Place - Suite 330, Boston, MA 02111-1307 USA.
   24.23 + */
   24.24 +
   24.25 +#ifndef __ASM_X86_HVM_IRQ_H__
   24.26 +#define __ASM_X86_HVM_IRQ_H__
   24.27 +
   24.28 +#include <xen/types.h>
   24.29 +#include <xen/spinlock.h>
   24.30 +#include <asm/hvm/vpic.h>
   24.31 +#include <asm/hvm/vioapic.h>
   24.32 +
   24.33 +struct hvm_irq {
   24.34 +    /* Lock protects access to all other fields. */
   24.35 +    spinlock_t lock;
   24.36 +
   24.37 +    /*
   24.38 +     * Virtual interrupt wires for a single PCI bus.
   24.39 +     * Indexed by: device*4 + INTx#.
   24.40 +     */
   24.41 +    DECLARE_BITMAP(pci_intx, 32*4);
   24.42 +
   24.43 +    /*
   24.44 +     * Virtual interrupt wires for ISA devices.
   24.45 +     * Indexed by ISA IRQ (assumes no ISA-device IRQ sharing).
   24.46 +     */
   24.47 +    DECLARE_BITMAP(isa_irq, 16);
   24.48 +
   24.49 +    /* Virtual interrupt wire and GSI link for paravirtual platform driver. */
   24.50 +    DECLARE_BITMAP(callback_irq_wire, 1);
   24.51 +    unsigned int callback_gsi;
   24.52 +
   24.53 +    /*
   24.54 +     * PCI-ISA interrupt router.
   24.55 +     * Each PCI <device:INTx#> is 'wire-ORed' into one of four links using
   24.56 +     * the traditional 'barber's pole' mapping ((device + INTx#) & 3).
   24.57 +     * The router provides a programmable mapping from each link to a GSI.
   24.58 +     */
   24.59 +    u8 pci_link_route[4];
   24.60 +
   24.61 +    /* Number of INTx wires asserting each PCI-ISA link. */
   24.62 +    u8 pci_link_assert_count[4];
   24.63 +
   24.64 +    /*
   24.65 +     * Number of wires asserting each GSI.
   24.66 +     * 
   24.67 +     * GSIs 0-15 are the ISA IRQs. ISA devices map directly into this space.
   24.68 +     * PCI links map into this space via the PCI-ISA bridge.
   24.69 +     * 
   24.70 +     * GSIs 16+ are used only be PCI devices. The mapping from PCI device to
   24.71 +     * GSI is as follows: ((device*4 + device/8 + INTx#) & 31) + 16
   24.72 +     */
   24.73 +    u8 gsi_assert_count[VIOAPIC_NUM_PINS];
   24.74 +
   24.75 +    /*
   24.76 +     * GSIs map onto PIC/IO-APIC in the usual way:
   24.77 +     *  0-7:  Master 8259 PIC, IO-APIC pins 0-7
   24.78 +     *  8-15: Slave  8259 PIC, IO-APIC pins 8-15
   24.79 +     *  16+ : IO-APIC pins 16+
   24.80 +     */
   24.81 +    struct vpic    vpic;
   24.82 +    struct vioapic vioapic;
   24.83 +
   24.84 +    /* Last VCPU that was delivered a LowestPrio interrupt. */
   24.85 +    u8 round_robin_prev_vcpu;
   24.86 +};
   24.87 +
   24.88 +#define hvm_pci_intx_gsi(dev, intx)  \
   24.89 +    (((((dev)<<2) + ((dev)>>3) + (intx)) & 31) + 16)
   24.90 +#define hvm_pci_intx_link(dev, intx) \
   24.91 +    (((dev) + (intx)) & 3)
   24.92 +
   24.93 +/* Modify state of a PCI INTx wire. */
   24.94 +void hvm_pci_intx_assert(
   24.95 +    struct domain *d, unsigned int device, unsigned int intx);
   24.96 +void hvm_pci_intx_deassert(
   24.97 +    struct domain *d, unsigned int device, unsigned int intx);
   24.98 +
   24.99 +/* Modify state of an ISA device's IRQ wire. */
  24.100 +void hvm_isa_irq_assert(
  24.101 +    struct domain *d, unsigned int isa_irq);
  24.102 +void hvm_isa_irq_deassert(
  24.103 +    struct domain *d, unsigned int isa_irq);
  24.104 +
  24.105 +void hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq);
  24.106 +
  24.107 +void hvm_set_callback_irq_level(void);
  24.108 +void hvm_set_callback_gsi(struct domain *d, unsigned int gsi);
  24.109 +
  24.110 +#endif /* __ASM_X86_HVM_IRQ_H__ */
    25.1 --- a/xen/include/asm-x86/hvm/vioapic.h	Tue Nov 21 17:34:17 2006 +0000
    25.2 +++ b/xen/include/asm-x86/hvm/vioapic.h	Tue Nov 21 19:22:25 2006 +0000
    25.3 @@ -1,5 +1,4 @@
    25.4  /*
    25.5 - *
    25.6   *  Copyright (C) 2001  MandrakeSoft S.A.
    25.7   *
    25.8   *    MandrakeSoft S.A.
    25.9 @@ -32,6 +31,9 @@
   25.10  
   25.11  #ifdef __ia64__
   25.12  #define VIOAPIC_IS_IOSAPIC 1
   25.13 +#define VIOAPIC_NUM_PINS  24
   25.14 +#else
   25.15 +#define VIOAPIC_NUM_PINS  48 /* 16 ISA IRQs, 32 non-legacy PCI IRQS. */
   25.16  #endif
   25.17  
   25.18  #if !VIOAPIC_IS_IOSAPIC
   25.19 @@ -40,8 +42,6 @@
   25.20  #define VIOAPIC_VERSION_ID 0x21 /* IOSAPIC version */
   25.21  #endif
   25.22  
   25.23 -#define VIOAPIC_NUM_PINS 24
   25.24 -
   25.25  #define VIOAPIC_EDGE_TRIG  0
   25.26  #define VIOAPIC_LEVEL_TRIG 1
   25.27  
   25.28 @@ -58,9 +58,9 @@
   25.29  #define VIOAPIC_REG_VERSION 0x01
   25.30  #define VIOAPIC_REG_ARB_ID  0x02 /* x86 IOAPIC only */
   25.31  
   25.32 -#define domain_vioapic(d) (&(d)->arch.hvm_domain.vioapic)
   25.33 +#define domain_vioapic(d) (&(d)->arch.hvm_domain.irq.vioapic)
   25.34  #define vioapic_domain(v) (container_of((v), struct domain, \
   25.35 -                                        arch.hvm_domain.vioapic))
   25.36 +                                        arch.hvm_domain.irq.vioapic))
   25.37  
   25.38  union vioapic_redir_entry
   25.39  {
   25.40 @@ -86,19 +86,13 @@ union vioapic_redir_entry
   25.41  };
   25.42  
   25.43  struct vioapic {
   25.44 -    uint32_t irr;
   25.45 -    uint32_t irr_xen; /* interrupts forced on by the hypervisor. */
   25.46 -    uint32_t isr;     /* This is used for level trigger */
   25.47 -    uint32_t imr;
   25.48 -    uint32_t ioregsel;
   25.49 -    uint32_t id;
   25.50 +    uint32_t ioregsel, id;
   25.51      unsigned long base_address;
   25.52      union vioapic_redir_entry redirtbl[VIOAPIC_NUM_PINS];
   25.53  };
   25.54  
   25.55  void vioapic_init(struct domain *d);
   25.56 -void vioapic_set_xen_irq(struct domain *d, int irq, int level);
   25.57 -void vioapic_set_irq(struct domain *d, int irq, int level);
   25.58 +void vioapic_irq_positive_edge(struct domain *d, unsigned int irq);
   25.59  void vioapic_update_EOI(struct domain *d, int vector);
   25.60  
   25.61  #endif /* __ASM_X86_HVM_VIOAPIC_H__ */
    26.1 --- a/xen/include/asm-x86/hvm/vpic.h	Tue Nov 21 17:34:17 2006 +0000
    26.2 +++ b/xen/include/asm-x86/hvm/vpic.h	Tue Nov 21 19:22:25 2006 +0000
    26.3 @@ -26,14 +26,14 @@
    26.4  #ifndef __ASM_X86_HVM_VPIC_H__
    26.5  #define __ASM_X86_HVM_VPIC_H__
    26.6  
    26.7 -#define domain_vpic(d) (&(d)->arch.hvm_domain.vpic)
    26.8 -#define vpic_domain(v) (container_of((v), struct domain, arch.hvm_domain.vpic))
    26.9 +#define domain_vpic(d) (&(d)->arch.hvm_domain.irq.vpic)
   26.10 +#define vpic_domain(v) (container_of((v), struct domain, \
   26.11 +                                     arch.hvm_domain.irq.vpic))
   26.12 +#define vpic_lock(v)   (&container_of((v), struct hvm_irq, vpic)->lock)
   26.13  
   26.14  typedef struct PicState {
   26.15      uint8_t last_irr; /* edge detection */
   26.16      uint8_t irr; /* interrupt request register */
   26.17 -    uint8_t irr_xen; /* interrupts forced on by the hypervisor e.g.
   26.18 -			the callback irq. */
   26.19      uint8_t imr; /* interrupt mask register */
   26.20      uint8_t isr; /* interrupt service register */
   26.21      uint8_t priority_add; /* highest irq priority */
   26.22 @@ -54,17 +54,11 @@ typedef struct PicState {
   26.23  struct vpic {
   26.24      /* 0 is master pic, 1 is slave pic */
   26.25      PicState pics[2];
   26.26 -    void (*irq_request)(void *opaque, int level);
   26.27 -    void *irq_request_opaque;
   26.28 -    /* IOAPIC callback support */
   26.29 -    spinlock_t lock;
   26.30 +    int irq_pending;
   26.31  };
   26.32  
   26.33 -void pic_set_xen_irq(void *opaque, int irq, int level);
   26.34  void pic_set_irq(struct vpic *vpic, int irq, int level);
   26.35 -void pic_init(struct vpic *vpic,
   26.36 -              void (*irq_request)(void *, int),
   26.37 -              void *irq_request_opaque);
   26.38 +void pic_init(struct vpic *vpic);
   26.39  void pic_update_irq(struct vpic *vpic); /* Caller must hold vpic->lock */
   26.40  void register_pic_io_hook(struct domain *d);
   26.41  int cpu_get_pic_interrupt(struct vcpu *v, int *type);
    27.1 --- a/xen/include/public/hvm/hvm_op.h	Tue Nov 21 17:34:17 2006 +0000
    27.2 +++ b/xen/include/public/hvm/hvm_op.h	Tue Nov 21 19:22:25 2006 +0000
    27.3 @@ -2,24 +2,52 @@
    27.4  #define __XEN_PUBLIC_HVM_HVM_OP_H__
    27.5  
    27.6  /* Get/set subcommands: extra argument == pointer to xen_hvm_param struct. */
    27.7 -#define HVMOP_set_param     0
    27.8 -#define HVMOP_get_param     1
    27.9 +#define HVMOP_set_param           0
   27.10 +#define HVMOP_get_param           1
   27.11  struct xen_hvm_param {
   27.12 -    domid_t domid;     /* IN */
   27.13 +    domid_t  domid;    /* IN */
   27.14      uint32_t index;    /* IN */
   27.15      uint64_t value;    /* IN/OUT */
   27.16  };
   27.17  typedef struct xen_hvm_param xen_hvm_param_t;
   27.18  DEFINE_XEN_GUEST_HANDLE(xen_hvm_param_t);
   27.19  
   27.20 -/* Set the logical level of one of a domain's IRQ lines. */
   27.21 -#define HVMOP_set_irq_level 2
   27.22 -struct xen_hvm_set_irq_level {
   27.23 -    domid_t  domid;    /* Domain to be updated.          */
   27.24 -    uint16_t level;    /* New level of the IRQ (0 or 1). */
   27.25 -    uint32_t irq;      /* IRQ to be updated.             */
   27.26 +/* Set the logical level of one of a domain's PCI INTx wires. */
   27.27 +#define HVMOP_set_pci_intx_level  2
   27.28 +struct xen_hvm_set_pci_intx_level {
   27.29 +    /* Domain to be updated. */
   27.30 +    domid_t  domid;
   27.31 +    /* PCI INTx identification in PCI topology (domain:bus:device:intx). */
   27.32 +    uint8_t  domain, bus, device, intx;
   27.33 +    /* Assertion level (0 = unasserted, 1 = asserted). */
   27.34 +    uint8_t  level;
   27.35  };
   27.36 -typedef struct xen_hvm_set_irq_level xen_hvm_set_irq_level_t;
   27.37 -DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_irq_level_t);
   27.38 +typedef struct xen_hvm_set_pci_intx_level xen_hvm_set_pci_intx_level_t;
   27.39 +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_pci_intx_level_t);
   27.40 +
   27.41 +/* Set the logical level of one of a domain's ISA IRQ wires. */
   27.42 +#define HVMOP_set_isa_irq_level   3
   27.43 +struct xen_hvm_set_isa_irq_level {
   27.44 +    /* Domain to be updated. */
   27.45 +    domid_t  domid;
   27.46 +    /* ISA device identification, by ISA IRQ (0-15). */
   27.47 +    uint8_t  isa_irq;
   27.48 +    /* Assertion level (0 = unasserted, 1 = asserted). */
   27.49 +    uint8_t  level;
   27.50 +};
   27.51 +typedef struct xen_hvm_set_isa_irq_level xen_hvm_set_isa_irq_level_t;
   27.52 +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_isa_irq_level_t);
   27.53 +
   27.54 +#define HVMOP_set_pci_link_route  4
   27.55 +struct xen_hvm_set_pci_link_route {
   27.56 +    /* Domain to be updated. */
   27.57 +    domid_t  domid;
   27.58 +    /* PCI link identifier (0-3). */
   27.59 +    uint8_t  link;
   27.60 +    /* ISA IRQ (1-15), or 0 (disable link). */
   27.61 +    uint8_t  isa_irq;
   27.62 +};
   27.63 +typedef struct xen_hvm_set_pci_link_route xen_hvm_set_pci_link_route_t;
   27.64 +DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_pci_link_route_t);
   27.65  
   27.66  #endif /* __XEN_PUBLIC_HVM_HVM_OP_H__ */