direct-io.hg

changeset 6017:ebf05456ee11

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Fix my previous patch to the trap-frame creation code
in Xen. I was clobbering an in-use register (AL): use
CH instead.
Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Thu Aug 04 17:37:09 2005 +0000 (2005-08-04)
parents 8004acaa6684
children 61cbf8f977ef
files xen/arch/x86/x86_32/entry.S xen/arch/x86/x86_64/entry.S
line diff
     1.1 --- a/xen/arch/x86/x86_32/entry.S	Thu Aug 04 16:53:30 2005 +0000
     1.2 +++ b/xen/arch/x86/x86_32/entry.S	Thu Aug 04 17:37:09 2005 +0000
     1.3 @@ -335,8 +335,8 @@ FLT14:  movl %eax,%gs:(%esi)
     1.4          movl VCPU_vcpu_info(%ebx),%eax
     1.5          pushl VCPUINFO_upcall_mask(%eax)
     1.6          testb $TBF_INTERRUPT,%cl
     1.7 -        setnz %al                        # TBF_INTERRUPT -> set upcall mask
     1.8 -        orb  %al,VCPUINFO_upcall_mask(%eax)
     1.9 +        setnz %ch                        # TBF_INTERRUPT -> set upcall mask
    1.10 +        orb  %ch,VCPUINFO_upcall_mask(%eax)
    1.11          popl %eax
    1.12          shll $16,%eax                    # Bits 16-23: saved_upcall_mask
    1.13          movw UREGS_cs+4(%esp),%ax        # Bits  0-15: CS

     2.1 --- a/xen/arch/x86/x86_64/entry.S	Thu Aug 04 16:53:30 2005 +0000
     2.2 +++ b/xen/arch/x86/x86_64/entry.S	Thu Aug 04 17:37:09 2005 +0000
     2.3 @@ -314,8 +314,8 @@ FLT4:   movq  %rax,16(%rsi)             
     2.4          movq  VCPU_vcpu_info(%rbx),%rax
     2.5          pushq VCPUINFO_upcall_mask(%rax)
     2.6          testb $TBF_INTERRUPT,%cl
     2.7 -        setnz %al                       # TBF_INTERRUPT -> set upcall mask
     2.8 -        orb   %al,VCPUINFO_upcall_mask(%rax)
     2.9 +        setnz %ch                       # TBF_INTERRUPT -> set upcall mask
    2.10 +        orb   %ch,VCPUINFO_upcall_mask(%rax)
    2.11          popq  %rax
    2.12          shlq  $32,%rax                  # Bits 32-39: saved_upcall_mask
    2.13          movw  UREGS_cs+8(%rsp),%ax      # Bits  0-15: CS