direct-io.hg

changeset 10796:e5c7350b8cbb

[IA64] clean up pal_emul.c compiler warnings

This patch cleans up some compiler warnings in pal_emul.c. The
problem was that a struct ia64_pal_retval was being used to return
the results from emulated PAL calls, but not all of the fields
were being initialized. Given that fields were not initialized,
I was also thinking that there might be a remote chance of data
leaking between vcpu's -- but I haven't convinced myself that
that could actually happen.

Signed-off-by: Al Stone <ahs3@fc.hp.com>
[whitespace and line wrapping cleanup throughout file]
Signed-off-by: Alex Williamson <alex.williamson@hp.com>
author awilliam@xenbuild.aw
date Mon Jul 10 13:53:17 2006 -0600 (2006-07-10)
parents 8ad37880564d
children 7538ae7ea365
files xen/arch/ia64/vmx/pal_emul.c
line diff
     1.1 --- a/xen/arch/ia64/vmx/pal_emul.c	Mon Jul 10 13:12:41 2006 -0600
     1.2 +++ b/xen/arch/ia64/vmx/pal_emul.c	Mon Jul 10 13:53:17 2006 -0600
     1.3 @@ -27,17 +27,36 @@
     1.4  #include <xen/hypercall.h>
     1.5  #include <public/sched.h>
     1.6  
     1.7 -static void
     1.8 -get_pal_parameters (VCPU *vcpu, UINT64 *gr29,
     1.9 -			UINT64 *gr30, UINT64 *gr31) {
    1.10 +/*
    1.11 + * Handy macros to make sure that the PAL return values start out
    1.12 + * as something meaningful.
    1.13 + */
    1.14 +#define INIT_PAL_STATUS_UNIMPLEMENTED(x)		\
    1.15 +	{						\
    1.16 +		x.status = PAL_STATUS_UNIMPLEMENTED;	\
    1.17 +		x.v0 = 0;				\
    1.18 +		x.v1 = 0;				\
    1.19 +		x.v2 = 0;				\
    1.20 +	}
    1.21  
    1.22 -  	vcpu_get_gr_nat(vcpu,29,gr29);
    1.23 -  	vcpu_get_gr_nat(vcpu,30,gr30); 
    1.24 -  	vcpu_get_gr_nat(vcpu,31,gr31);
    1.25 +#define INIT_PAL_STATUS_SUCCESS(x)			\
    1.26 +	{						\
    1.27 +	       	x.status = PAL_STATUS_SUCCESS;		\
    1.28 +		x.v0 = 0;				\
    1.29 +		x.v1 = 0;				\
    1.30 +		x.v2 = 0;				\
    1.31 +	}
    1.32 +
    1.33 +static void
    1.34 +get_pal_parameters(VCPU *vcpu, UINT64 *gr29, UINT64 *gr30, UINT64 *gr31) {
    1.35 +
    1.36 +	vcpu_get_gr_nat(vcpu,29,gr29);
    1.37 +	vcpu_get_gr_nat(vcpu,30,gr30); 
    1.38 +	vcpu_get_gr_nat(vcpu,31,gr31);
    1.39  }
    1.40  
    1.41  static void
    1.42 -set_pal_result (VCPU *vcpu,struct ia64_pal_retval result) {
    1.43 +set_pal_result(VCPU *vcpu,struct ia64_pal_retval result) {
    1.44  
    1.45  	vcpu_set_gr(vcpu,8, result.status,0);
    1.46  	vcpu_set_gr(vcpu,9, result.v0,0);
    1.47 @@ -46,58 +65,60 @@ set_pal_result (VCPU *vcpu,struct ia64_p
    1.48  }
    1.49  
    1.50  static void
    1.51 -set_sal_result (VCPU *vcpu,struct sal_ret_values result) {
    1.52 +set_sal_result(VCPU *vcpu,struct sal_ret_values result) {
    1.53  
    1.54  	vcpu_set_gr(vcpu,8, result.r8,0);
    1.55  	vcpu_set_gr(vcpu,9, result.r9,0);
    1.56  	vcpu_set_gr(vcpu,10, result.r10,0);
    1.57  	vcpu_set_gr(vcpu,11, result.r11,0);
    1.58  }
    1.59 +
    1.60  static struct ia64_pal_retval
    1.61 -pal_cache_flush (VCPU *vcpu) {
    1.62 +pal_cache_flush(VCPU *vcpu) {
    1.63  	UINT64 gr28,gr29, gr30, gr31;
    1.64  	struct ia64_pal_retval result;
    1.65  
    1.66 -	get_pal_parameters (vcpu, &gr29, &gr30, &gr31);
    1.67 -	vcpu_get_gr_nat(vcpu,28,&gr28);
    1.68 +	get_pal_parameters(vcpu, &gr29, &gr30, &gr31);
    1.69 +	vcpu_get_gr_nat(vcpu, 28, &gr28);
    1.70  
    1.71  	/* Always call Host Pal in int=1 */
    1.72 -	gr30 = gr30 &(~(0x2UL));
    1.73 +	gr30 = gr30 & ~0x2UL;
    1.74  
    1.75 -	/* call Host PAL cache flush */
    1.76 -	result=ia64_pal_call_static(gr28 ,gr29, gr30,gr31,1);  // Clear psr.ic when call PAL_CACHE_FLUSH
    1.77 +	/*
    1.78 +	 * Call Host PAL cache flush
    1.79 +	 * Clear psr.ic when call PAL_CACHE_FLUSH
    1.80 +	 */
    1.81 +	result = ia64_pal_call_static(gr28 ,gr29, gr30, gr31, 1);
    1.82  
    1.83  	/* If host PAL call is interrupted, then loop to complete it */
    1.84 -//	while (result.status == 1) {
    1.85 -//		ia64_pal_call_static(gr28 ,gr29, gr30, 
    1.86 -//				result.v1,1LL);
    1.87 -//	}
    1.88 -	if(result.status != 0) {
    1.89 -        	panic_domain(vcpu_regs(vcpu),"PAL_CACHE_FLUSH ERROR, status %ld", result.status);
    1.90 -	}
    1.91 +//	while (result.status == 1)
    1.92 +//		ia64_pal_call_static(gr28 ,gr29, gr30, result.v1, 1LL);
    1.93 +//
    1.94 +	if (result.status != 0)
    1.95 +		panic_domain(vcpu_regs(vcpu), "PAL_CACHE_FLUSH ERROR, "
    1.96 +		             "status %ld", result.status);
    1.97  
    1.98  	return result;
    1.99  }
   1.100  
   1.101  static struct ia64_pal_retval
   1.102 -pal_vm_tr_read (VCPU *vcpu ) {
   1.103 +pal_vm_tr_read(VCPU *vcpu) {
   1.104  	struct ia64_pal_retval result;
   1.105  
   1.106 -	result.status= -1; //unimplemented
   1.107 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.108  
   1.109  	return result;
   1.110  }
   1.111  
   1.112 -
   1.113  static struct ia64_pal_retval
   1.114 -pal_prefetch_visibility (VCPU *vcpu)  {
   1.115 +pal_prefetch_visibility(VCPU *vcpu) {
   1.116  	/* Due to current MM virtualization algorithm,
   1.117  	 * We do not allow guest to change mapping attribute.
   1.118  	 * Thus we will not support PAL_PREFETCH_VISIBILITY
   1.119  	 */
   1.120  	struct ia64_pal_retval result;
   1.121  
   1.122 -	result.status= -1; //unimplemented
   1.123 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.124  
   1.125  	return result;
   1.126  }
   1.127 @@ -106,290 +127,315 @@ static struct ia64_pal_retval
   1.128  pal_platform_addr(VCPU *vcpu) {
   1.129  	struct ia64_pal_retval result;
   1.130  
   1.131 -	result.status= 0; //success
   1.132 +	INIT_PAL_STATUS_SUCCESS(result);
   1.133 +
   1.134 +	return result;
   1.135 +}
   1.136 +
   1.137 +static struct ia64_pal_retval
   1.138 +pal_halt(VCPU *vcpu) {
   1.139 +	//bugbug: to be implement. 
   1.140 +	struct ia64_pal_retval result;
   1.141 +
   1.142 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.143 +
   1.144 +	return result;
   1.145 +}
   1.146 +
   1.147 +static struct ia64_pal_retval
   1.148 +pal_halt_light(VCPU *vcpu) {
   1.149 +	struct ia64_pal_retval result;
   1.150 +	
   1.151 +	if (SPURIOUS_VECTOR == vmx_check_pending_irq(vcpu))
   1.152 +		do_sched_op_compat(SCHEDOP_block, 0);
   1.153 +	    
   1.154 +	INIT_PAL_STATUS_SUCCESS(result);
   1.155 +
   1.156 +	return result;
   1.157 +}
   1.158 +
   1.159 +static struct ia64_pal_retval
   1.160 +pal_cache_read(VCPU *vcpu) {
   1.161 +	struct ia64_pal_retval result;
   1.162 +
   1.163 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.164 +
   1.165 +	return result;
   1.166 +}
   1.167 +
   1.168 +static struct ia64_pal_retval
   1.169 +pal_cache_write(VCPU *vcpu) {
   1.170 +	struct ia64_pal_retval result;
   1.171 +
   1.172 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.173  
   1.174  	return result;
   1.175  }
   1.176  
   1.177  static struct ia64_pal_retval
   1.178 -pal_halt (VCPU *vcpu) {
   1.179 -	//bugbug: to be implement. 
   1.180 +pal_bus_get_features(VCPU *vcpu) {
   1.181  	struct ia64_pal_retval result;
   1.182  
   1.183 -	result.status= -1; //unimplemented
   1.184 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.185  
   1.186  	return result;
   1.187  }
   1.188  
   1.189 -
   1.190  static struct ia64_pal_retval
   1.191 -pal_halt_light (VCPU *vcpu) {
   1.192 +pal_cache_summary(VCPU *vcpu) {
   1.193  	struct ia64_pal_retval result;
   1.194 -	
   1.195 -	if(SPURIOUS_VECTOR==vmx_check_pending_irq(vcpu))
   1.196 -		do_sched_op_compat(SCHEDOP_block,0);
   1.197 -	    
   1.198 -	result.status= 0;
   1.199 +
   1.200 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.201 +
   1.202  	return result;
   1.203  }
   1.204  
   1.205  static struct ia64_pal_retval
   1.206 -pal_cache_read (VCPU *vcpu) {
   1.207 +pal_cache_init(VCPU *vcpu) {
   1.208  	struct ia64_pal_retval result;
   1.209  
   1.210 -	result.status= -1; //unimplemented
   1.211 +	INIT_PAL_STATUS_SUCCESS(result);
   1.212  
   1.213  	return result;
   1.214  }
   1.215  
   1.216  static struct ia64_pal_retval
   1.217 -pal_cache_write (VCPU *vcpu) {
   1.218 +pal_cache_info(VCPU *vcpu) {
   1.219 +	struct ia64_pal_retval result;
   1.220 +
   1.221 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.222 +
   1.223 +	return result;
   1.224 +}
   1.225 +
   1.226 +static struct ia64_pal_retval
   1.227 +pal_cache_prot_info(VCPU *vcpu) {
   1.228  	struct ia64_pal_retval result;
   1.229  
   1.230 -	result.status= -1; //unimplemented
   1.231 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.232 +
   1.233 +	return result;
   1.234 +}
   1.235 +
   1.236 +static struct ia64_pal_retval
   1.237 +pal_mem_attrib(VCPU *vcpu) {
   1.238 +	struct ia64_pal_retval result;
   1.239 +
   1.240 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.241 +
   1.242 +	return result;
   1.243 +}
   1.244 +
   1.245 +static struct ia64_pal_retval
   1.246 +pal_debug_info(VCPU *vcpu) {
   1.247 +	struct ia64_pal_retval result;
   1.248 +
   1.249 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.250  
   1.251  	return result;
   1.252  }
   1.253  
   1.254  static struct ia64_pal_retval
   1.255 -pal_bus_get_features(VCPU *vcpu){
   1.256 +pal_fixed_addr(VCPU *vcpu) {
   1.257  	struct ia64_pal_retval result;
   1.258  
   1.259 -	result.status= -1; //unimplemented
   1.260 -	return result;
   1.261 -}
   1.262 -
   1.263 -static struct ia64_pal_retval
   1.264 -pal_cache_summary(VCPU *vcpu){
   1.265 -	struct ia64_pal_retval result;
   1.266 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.267  
   1.268 -	result.status= -1; //unimplemented
   1.269 -	return result;
   1.270 -}
   1.271 -
   1.272 -static struct ia64_pal_retval
   1.273 -pal_cache_init(VCPU *vcpu){
   1.274 -	struct ia64_pal_retval result;
   1.275 -	result.status=0;
   1.276  	return result;
   1.277  }
   1.278  
   1.279  static struct ia64_pal_retval
   1.280 -pal_cache_info(VCPU *vcpu){
   1.281 +pal_freq_base(VCPU *vcpu) {
   1.282  	struct ia64_pal_retval result;
   1.283 +	struct ia64_sal_retval isrv;
   1.284  
   1.285 -	result.status= -1; //unimplemented
   1.286 -	return result;
   1.287 -}
   1.288 -
   1.289 -static struct ia64_pal_retval
   1.290 -pal_cache_prot_info(VCPU *vcpu){
   1.291 -	struct ia64_pal_retval result;
   1.292 -
   1.293 -	result.status= -1; //unimplemented
   1.294 +	PAL_CALL(result,PAL_FREQ_BASE, 0, 0, 0);
   1.295 +	/*
   1.296 +	 * PAL_FREQ_BASE may not be implemented in some platforms,
   1.297 +	 * call SAL instead.
   1.298 +	 */
   1.299 +	if (result.v0 == 0) {
   1.300 +		SAL_CALL(isrv, SAL_FREQ_BASE, 
   1.301 +		         SAL_FREQ_BASE_PLATFORM, 0, 0, 0, 0, 0, 0);
   1.302 +		result.status = isrv.status;
   1.303 +		result.v0 = isrv.v0;
   1.304 +		result.v1 = result.v2 = 0;
   1.305 +	}
   1.306  	return result;
   1.307  }
   1.308  
   1.309  static struct ia64_pal_retval
   1.310 -pal_mem_attrib(VCPU *vcpu){
   1.311 +pal_freq_ratios(VCPU *vcpu) {
   1.312  	struct ia64_pal_retval result;
   1.313  
   1.314 -	result.status= -1; //unimplemented
   1.315 +	PAL_CALL(result, PAL_FREQ_RATIOS, 0, 0, 0);
   1.316  	return result;
   1.317  }
   1.318  
   1.319  static struct ia64_pal_retval
   1.320 -pal_debug_info(VCPU *vcpu){
   1.321 +pal_halt_info(VCPU *vcpu) {
   1.322  	struct ia64_pal_retval result;
   1.323  
   1.324 -	result.status= -1; //unimplemented
   1.325 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.326 +
   1.327  	return result;
   1.328  }
   1.329  
   1.330  static struct ia64_pal_retval
   1.331 -pal_fixed_addr(VCPU *vcpu){
   1.332 +pal_logical_to_physica(VCPU *vcpu) {
   1.333  	struct ia64_pal_retval result;
   1.334  
   1.335 -	result.status= -1; //unimplemented
   1.336 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.337 +
   1.338  	return result;
   1.339  }
   1.340  
   1.341  static struct ia64_pal_retval
   1.342 -pal_freq_base(VCPU *vcpu){
   1.343 -    struct ia64_pal_retval result;
   1.344 -    struct ia64_sal_retval isrv;
   1.345 -
   1.346 -    PAL_CALL(result,PAL_FREQ_BASE, 0, 0, 0);
   1.347 -    if(result.v0 == 0){ //PAL_FREQ_BASE may not be implemented in some platforms, call SAL instead.
   1.348 -        SAL_CALL(isrv, SAL_FREQ_BASE, 
   1.349 -                SAL_FREQ_BASE_PLATFORM, 0, 0, 0, 0, 0, 0);
   1.350 -        result.status = isrv.status;
   1.351 -        result.v0 = isrv.v0;
   1.352 -        result.v1 = result.v2 =0;
   1.353 -    }
   1.354 -    return result;
   1.355 -}
   1.356 -
   1.357 -static struct ia64_pal_retval
   1.358 -pal_freq_ratios(VCPU *vcpu){
   1.359 -    struct ia64_pal_retval result;
   1.360 -
   1.361 -    PAL_CALL(result,PAL_FREQ_RATIOS, 0, 0, 0);
   1.362 -    return result;
   1.363 -}
   1.364 -
   1.365 -static struct ia64_pal_retval
   1.366 -pal_halt_info(VCPU *vcpu){
   1.367 +pal_perf_mon_info(VCPU *vcpu) {
   1.368  	struct ia64_pal_retval result;
   1.369  
   1.370 -	result.status= -1; //unimplemented
   1.371 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.372 +
   1.373  	return result;
   1.374  }
   1.375  
   1.376  static struct ia64_pal_retval
   1.377 -pal_logical_to_physica(VCPU *vcpu){
   1.378 +pal_proc_get_features(VCPU *vcpu) {
   1.379  	struct ia64_pal_retval result;
   1.380  
   1.381 -	result.status= -1; //unimplemented
   1.382 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.383 +
   1.384 +	return result;
   1.385 +}
   1.386 +
   1.387 +static struct ia64_pal_retval
   1.388 +pal_ptce_info(VCPU *vcpu) {
   1.389 +	struct ia64_pal_retval result;
   1.390 +
   1.391 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.392 +
   1.393  	return result;
   1.394  }
   1.395  
   1.396  static struct ia64_pal_retval
   1.397 -pal_perf_mon_info(VCPU *vcpu){
   1.398 +pal_register_info(VCPU *vcpu) {
   1.399  	struct ia64_pal_retval result;
   1.400  
   1.401 -	result.status= -1; //unimplemented
   1.402 -	return result;
   1.403 -}
   1.404 -
   1.405 -static struct ia64_pal_retval
   1.406 -pal_proc_get_features(VCPU *vcpu){
   1.407 -	struct ia64_pal_retval result;
   1.408 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.409  
   1.410 -	result.status= -1; //unimplemented
   1.411 -	return result;
   1.412 -}
   1.413 -
   1.414 -static struct ia64_pal_retval
   1.415 -pal_ptce_info(VCPU *vcpu){
   1.416 -	struct ia64_pal_retval result;
   1.417 -
   1.418 -	result.status= -1; //unimplemented
   1.419  	return result;
   1.420  }
   1.421  
   1.422  static struct ia64_pal_retval
   1.423 -pal_register_info(VCPU *vcpu){
   1.424 +pal_rse_info(VCPU *vcpu) {
   1.425  	struct ia64_pal_retval result;
   1.426  
   1.427 -	result.status= -1; //unimplemented
   1.428 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.429 +
   1.430  	return result;
   1.431  }
   1.432  
   1.433  static struct ia64_pal_retval
   1.434 -pal_rse_info(VCPU *vcpu){
   1.435 +pal_test_info(VCPU *vcpu) {
   1.436  	struct ia64_pal_retval result;
   1.437  
   1.438 -	result.status= -1; //unimplemented
   1.439 -	return result;
   1.440 -}
   1.441 -static struct ia64_pal_retval
   1.442 -pal_test_info(VCPU *vcpu){
   1.443 -	struct ia64_pal_retval result;
   1.444 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.445  
   1.446 -	result.status= -1; //unimplemented
   1.447  	return result;
   1.448  }
   1.449  
   1.450  static struct ia64_pal_retval
   1.451 -pal_vm_summary(VCPU *vcpu){
   1.452 +pal_vm_summary(VCPU *vcpu) {
   1.453  	pal_vm_info_1_u_t vminfo1;
   1.454  	pal_vm_info_2_u_t vminfo2;	
   1.455  	struct ia64_pal_retval result;
   1.456  	
   1.457 -	PAL_CALL(result,PAL_VM_SUMMARY,0,0,0);
   1.458 -	if(!result.status){
   1.459 +	PAL_CALL(result, PAL_VM_SUMMARY, 0, 0, 0);
   1.460 +	if (!result.status) {
   1.461  		vminfo1.pvi1_val = result.v0;
   1.462  		vminfo1.pal_vm_info_1_s.max_itr_entry = NITRS -1;
   1.463  		vminfo1.pal_vm_info_1_s.max_dtr_entry = NDTRS -1;
   1.464  		result.v0 = vminfo1.pvi1_val;
   1.465  		vminfo2.pal_vm_info_2_s.impl_va_msb = GUEST_IMPL_VA_MSB;
   1.466 -		vminfo2.pal_vm_info_2_s.rid_size = current->domain->arch.rid_bits;
   1.467 +		vminfo2.pal_vm_info_2_s.rid_size =
   1.468 +		                             current->domain->arch.rid_bits;
   1.469  		result.v1 = vminfo2.pvi2_val;
   1.470  	} 
   1.471  	return result;
   1.472  }
   1.473  
   1.474  static struct ia64_pal_retval
   1.475 -pal_vm_info(VCPU *vcpu){
   1.476 +pal_vm_info(VCPU *vcpu) {
   1.477  	struct ia64_pal_retval result;
   1.478  
   1.479 -	result.status= -1; //unimplemented
   1.480 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.481 +
   1.482  	return result;
   1.483  }
   1.484  
   1.485  static struct ia64_pal_retval
   1.486 -pal_vm_page_size(VCPU *vcpu){
   1.487 +pal_vm_page_size(VCPU *vcpu) {
   1.488  	struct ia64_pal_retval result;
   1.489  
   1.490 -	result.status= -1; //unimplemented
   1.491 +	INIT_PAL_STATUS_UNIMPLEMENTED(result);
   1.492 +
   1.493  	return result;
   1.494  }
   1.495 +
   1.496  void
   1.497 -pal_emul( VCPU *vcpu) {
   1.498 +pal_emul(VCPU *vcpu) {
   1.499  	UINT64 gr28;
   1.500  	struct ia64_pal_retval result;
   1.501  
   1.502 -
   1.503  	vcpu_get_gr_nat(vcpu,28,&gr28);  //bank1
   1.504  
   1.505  	switch (gr28) {
   1.506  		case PAL_CACHE_FLUSH:
   1.507 -			result = pal_cache_flush (vcpu);
   1.508 +			result = pal_cache_flush(vcpu);
   1.509  			break;
   1.510  
   1.511  		case PAL_PREFETCH_VISIBILITY:
   1.512 -			result = pal_prefetch_visibility (vcpu);
   1.513 +			result = pal_prefetch_visibility(vcpu);
   1.514  			break;
   1.515  
   1.516  		case PAL_VM_TR_READ:
   1.517 -			result = pal_vm_tr_read (vcpu);
   1.518 +			result = pal_vm_tr_read(vcpu);
   1.519  			break;
   1.520  
   1.521  		case PAL_HALT:
   1.522 -			result = pal_halt (vcpu);
   1.523 +			result = pal_halt(vcpu);
   1.524  			break;
   1.525  
   1.526  		case PAL_HALT_LIGHT:
   1.527 -			result = pal_halt_light (vcpu);
   1.528 +			result = pal_halt_light(vcpu);
   1.529  			break;
   1.530  
   1.531  		case PAL_CACHE_READ:
   1.532 -			result = pal_cache_read (vcpu);
   1.533 +			result = pal_cache_read(vcpu);
   1.534  			break;
   1.535  
   1.536  		case PAL_CACHE_WRITE:
   1.537 -			result = pal_cache_write (vcpu);
   1.538 +			result = pal_cache_write(vcpu);
   1.539  			break;
   1.540  
   1.541  		case PAL_PLATFORM_ADDR:
   1.542 -			result = pal_platform_addr (vcpu);
   1.543 +			result = pal_platform_addr(vcpu);
   1.544  			break;
   1.545  
   1.546  		case PAL_FREQ_RATIOS:
   1.547 -			result = pal_freq_ratios (vcpu);
   1.548 +			result = pal_freq_ratios(vcpu);
   1.549  			break;
   1.550  
   1.551  		case PAL_FREQ_BASE:
   1.552 -			result = pal_freq_base (vcpu);
   1.553 +			result = pal_freq_base(vcpu);
   1.554  			break;
   1.555  
   1.556  		case PAL_BUS_GET_FEATURES :
   1.557 -			result = pal_bus_get_features (vcpu);
   1.558 +			result = pal_bus_get_features(vcpu);
   1.559  			break;
   1.560  
   1.561  		case PAL_CACHE_SUMMARY :
   1.562 -			result = pal_cache_summary (vcpu);
   1.563 +			result = pal_cache_summary(vcpu);
   1.564  			break;
   1.565  
   1.566  		case PAL_CACHE_INIT :
   1.567 @@ -461,17 +507,18 @@ pal_emul( VCPU *vcpu) {
   1.568  			break;
   1.569  
   1.570  		default:
   1.571 -			panic_domain(vcpu_regs(vcpu),"pal_emul(): guest call unsupported pal" );
   1.572 -  }
   1.573 -		set_pal_result (vcpu, result);
   1.574 +			panic_domain(vcpu_regs(vcpu),"pal_emul(): guest "
   1.575 +			             "call unsupported pal" );
   1.576 +	}
   1.577 +	set_pal_result(vcpu, result);
   1.578  }
   1.579  
   1.580  void
   1.581  sal_emul(VCPU *v) {
   1.582  	struct sal_ret_values result;
   1.583 -	result = sal_emulator(vcpu_get_gr(v,32),vcpu_get_gr(v,33),
   1.584 -	                      vcpu_get_gr(v,34),vcpu_get_gr(v,35),
   1.585 -	                      vcpu_get_gr(v,36),vcpu_get_gr(v,37),
   1.586 -	                      vcpu_get_gr(v,38),vcpu_get_gr(v,39));
   1.587 +	result = sal_emulator(vcpu_get_gr(v, 32), vcpu_get_gr(v, 33),
   1.588 +	                      vcpu_get_gr(v, 34), vcpu_get_gr(v, 35),
   1.589 +	                      vcpu_get_gr(v, 36), vcpu_get_gr(v, 37),
   1.590 +	                      vcpu_get_gr(v, 38), vcpu_get_gr(v, 39));
   1.591  	set_sal_result(v, result);	
   1.592  }